A sensor transaction scheduling algorithm for maintaining real-time data temporal validity

A new scheduling algorithm called deferrable scheduling with time slice exchange (DS-EXC) was proposed to maintain the temporal validity of real-time data. In DS-EXC, the time slice exchange method was designed to further defer the release time of transaction instances derived by the deferrable scheduling algorithm (DS-FP). In this way, more CPU time would be left for lower priority transactions and other transactions. In order to minimize the scheduling overhead, an off-line scheme was designed. In particular, the schedule for a transaction set is generated off-line until a repeating pattern is found, and then the pattern is used to construct the schedule on-line. The performance of DS-EXC was evaluated by sets of experiments. The results show that DS-EXC outperforms DS-FP in terms of increasing schedulable ratio. It also provides better performance under mixed workloads.

Efficacy of Real-Time Transaction Processing System

Real-Time Transaction Processing System(RTTPS)is a type of e-government that processes documents using electronic communication technology.In this time of the pandemic,the study contributes to the necessity to perform more processing online and less face-to-face.In terms of retrieving information,a comparison between Porter’s Stemming algorithm and this study was performed.The study aims to design a database that will serve as a repository of information in retrieving information and also to examine the efficacy of the real-time process in securing the government requirements using the Technology Acceptance Model.The respondents of this study have perceived ease of use and usefulness on the impact when securing the community tax certificate.

An On-Line Scheduler over Hard Real-Time Communication System

By thorough research on the prominent periodic and aperiodic scheduling algorithms,anon-line hard real-time scheduler is presented,which is applicable to the scheduling of packets over a link.This scheduler,based on both Rate Monotonic,pinwheel scheduling algorithm Sr and Polling Serverscheduling algorithms,can rapidly judge the schedulability and then automatically generate a bus tablefor the scheduling algorithm to schedule the packets as the periodic packets.The implementation of thescheduler is simple and easy to use,and it is effective for the utilization of bus link.The orderly executionof the bus table can not only guarantee the performance of the hard real time but also avoid the blockageand interruption of the message transmission.So the scheduler perfectly meets the demand of hard real-time communication system on the field bus domain.

An integrated DBP for streams with （m, k）-firm real-time guarantee

(m, k)-firm real-time or weakly hard real-time (WHRT) guarantee is becoming attractive as it closes the gap between hard and soft (or probabilistic) real-time guarantee, and enables finer granularity of real-time QoS through adjusting m and k. For multiple streams with (m, k)-firm constraint sharing a single server, an on-line priority assignment policy based on the most recent k-length history of each stream called distance based priority (DBP) has been proposed to assign priority.In case of priority equality among these head-of-queue instances, Earliest Deadline First (EDF) is used. Under the context of WHRT schedule theory, DBP is the most popular, gets much attention and has many applications due to its straightforward priority assignment policy and easy implementation. However, DBP combined with EDF cannot always provide good performance, mainly because the initial DBP does not underline the rich information on deadline met/missed distribution,specially streams in various failure states which will travel different distances to restore success states. Considering how to effectively restore the success state of each individual stream from a failure state, an integrated DBP utilizing deadline met/missed distribution is proposed in this paper. Simulation results validated the performance improvement of this pro-posal.

Validation concurrency control protocol in parallel real-time database systems

In parallel real-time database systems, concurrency control protocols must satisfy time constraints as well as the integrity constraints. The authors present a validation concurrency control(VCC) protocol, which can enhance the performance of real-time concurrency control mechanism by reducing the number of transactions that might miss their deadlines, and compare the performance of validation concurrency control protocol with that of HP2PL(High priority two phase locking) protocol and OCC-TI-WAIT-50(Optimistic concurrency control-time interval-wait-50) protocol under shared-disk architecture by simulation. The simulation results reveal that the protocol the author presented can effectively reduce the number of transactions restarting which might miss their deadlines and performs better than HP2PL and OCC-TI-WAIT-50. It works well when arrival rate of transaction is lesser than threshold. However, due to resource contention the percentage of missing deadline increases sharply when arrival rate is greater than the threshold.

Schedulability analysis for linear transactions under fixed priority hybrid scheduling

In hard real-time systems, schedulability analysis is not only one of the important means of guaranteeing the timelines of embedded software but also one of the fundamental theories of applying other new techniques, such as energy savings and fault tolerance. However, most of the existing schedulability analysis methods assume that schedulers use preemptive scheduling or non-preemptive scheduling. In this paper, we present a schedulability analysis method, i.e., the worst-case hybrid scheduling (WCHS) algorithm, which considers the influence of release jitters of transactions and extends schedulability analysis theory to timing analysis of linear transactions under fixed priority hybrid scheduling. To the best of our knowledge, this method is the first one on timing analysis of linear transactions under hybrid scheduling. An example is employed to demonstrate the use of this method. Experiments show that this method has lower computational complexity while keeping correctness, and that hybrid scheduling has little influence on the average worst-case response time (WCRT), but a negative impact on the schedulability of systems.

短事务、强实时双机容错系统的研究

在军事、工业控制以及电子商务系统中存在着大量的高可用、短事务、强实时应用 .在这些应用中 ,采用双机系统具有较高的性能价格比 ,如何保证双机系统的强实时性、高可用度和服务“不断流” ,是其中的关键技术难题 .文中着重论述了系统可用度、故障检测、结果判别和状态切换中的关键问题 .在理论的指导下 ,给出了实现策略和实际测试数据 .测试数据表明本方案完全满足系统的要求 ,并且在具体工程实践中得到了应用 ,取得了明显的效果 .

基于PCIE的高速光纤图像实时采集系统设计

利用PCI Express(PCIE)总线及DMA数据传输技术,设计光纤图像实时采集系统。利用FPGA中的PCIE硬核实现了PCIE总线的DMA传输,同时介绍了整个采集系统的数据流和光纤接口模块的设计。测试结果表明,系统DMA数据传输速度可达到138 MB/s,完全满足高速光纤图像实时采集的需要。

实时数据库事务的主-从并发控制方法

提出了一种针对实时数据库的主-从并发控制策略：从并发控制解决同类事务间的读写冲突，主并发控制解决不同类事务类间的读写冲突．并指出，这种主-从并发控制模型的性能要优于单一并发控制算法．

Credit Determination of Fibre Channel in Avionics Environment

Fibre channel （FC） is the main candidate architecture for ＂unified network＂. Flow control deals with the problem in which a device receives frames faster than it can process them. Credit is an important service parameter for fibre channel flow control. Configuring the credit reasonably can avoid buffer overflow in nodes. This paper derives the mathematic relationships among credit, bandwidth and message sets under real-time condition according as three main topologies of fibre channel, and proposes the credit determination and the optimal credit for typical message sets. This study is based on the features of hard real-time communications in avionics environment.

Conceptual model of real-time IoT systems

We address a special kind of Internet of Things (IoT) systems that are also real-time. We call them real-time IoT (RT-IoT) systems. An RT-IoT system needs to meet timing constraints of system delay, clock synchronization, deadline, and so on. The timing constraints turn to be more stringent as we get closer to the physical things. Based on the reference architecture of IoT (ISO/IEC 30141), the RT-IoT conceptual model is established. The idea of edge subsystem is introduced. The sensing & con-trolling domain is the basis of the edge subsystem, and the edge subsystem usually must meet the hard real-time constraints. The model includes four perspectives, the time view, computation view, communication view, and control view. Each view looks, from a different angle, at how the time parameters impact an RT-IoT system.

硬盘测试软件设计与测试

硬盘作为计算机中存储数据的主要载体,其性能的好坏直接决定着整个计算机系统性能的高低。本文设计实现了一种硬盘测试软件,主要模拟硬盘实际I/O读写情况,发出读操作命令,然后统计、计算测试过程中的各个参数指标值。测试的性能参数包括:瞬时、平均、最大数据传速率,平均、最大读操作响应时间,读操作次数,读错误次数及CPU占用率等。分析测试结果知,在硬盘基本性能参数测试时,顺序读操作测试的硬盘瞬时数据传输率随着读操作数据块的增加先增大后减小;随机读操作比相应数据块大小的顺序读操作的数据传输率小。模拟测试流媒体文件服务时,多用户的总数据传输率比单用户时的数据传输率要小得多。

Epoch-based Application Collaboration for Sensing Data Analysis

The application collaboration was addressed to provide energy-efficient data services for distributed sensing applications to collaboratively interacting to achieve a desired global objective not detectable by any single cluster. An epoch-based transaction model was proposed by using the concept of sphere of control （SoC）, and a collaborative sensing application can be dynamically formed as a nested architecture composed of time-synchronized applications. By loosening the rigid constraints of ACID to adapt the requirements of sensor networks, the submission, rollback and consistency rules ware educed and a two-phrase submission protocol was designed. Finally, it was illustrated that the model is capable of providing an adaptive formal template for sensing application collaboration. Our performance evaluations show that by applying the two-phrase submission protocol, we can significantly improve the number of reported answers and response time, raise resource utilization, and reduce the energy cansumption and data loss.

Admission Control of VL in AFDX Under HRT Constraints

Avionics full duplex switched ethernet（AFDX） is a switched interconnection technology developed to provide reliable data exchange with strong data transmission time guarantees in internal communication of the spacecraft or aircraft.Virtual link（VL） is an important concept of AFDX to meet quality of service（QoS） requirements in terms of end-to-end message deadlines.A VL admission control algorithm in AFDX network under hard real-time（HRT） constraints is studied.Based on the scheduling prin-ciple of AFDX protocol,a packet scheduling scheme under HRT constraints is proposed,and after that an efficient VL admission control algorithm is presented.Analytical proof that the algorithm can effectively determine whether VL should be admitted is given.Finally simulative examples are presented to promote the conclusion.

Reducing the Upper Bound Delay by Optimizing Bank-to-Core Mapping

Nowadays, inter-task interferences are the main difficulty in analyzing the timing behavior of multicores. The timing predictable embedded multicore architecture MERASA, which allows safe worst-case execution time （WCET） estimations, has emerged as an attractive solution. In the architecture, WCET can be estimated by the upper bound delay （UBD） which can be bounded by the interference-aware bus arbiter （IABA） and the dynamic cache partitioning such as columnization or bankization. However, this architecture faces a dilemma between decreasing UBD and efficient shared cache utilization. To obtain tighter WCET estimation, we propose a novel approach that reduces UBD by optimizing bank-to-core mapping on the multicore system with IABA and the two-level partitioned cache. For this, we first present a new UBD computation model based on the analysis of inter-task interference delay, and then put forward the core-sequence optimization method of bank-to-core mapping and the optimizing algorithms with the minimum UBD. Experimental results demonstrate that our approach can reduce WCET from 4% to 37%.