Impact of Native Defects in the High Dielectric Constant Oxide HfSiO_4 on MOS Device Performance

Native dejects in HfSiO4 are investigated by first principles calculations. Transition levels of native detects can be accurately described by employing the nonlocal HSE06 hybrid functional. This methodology overcomes the band gap problem in traditional functionals. By band alignments among the Si, GaAs and HfSiO4. we are able to determine the position of defect levels in Si and GaAs relative to the HfSiO4 band gap. We evaluate the. possibility of these defects acting as fixed charge. Native defects lead to the change of valence and conduction band offsets. Gate leakage current is evaluated by the band offset. In addition, we also investigate diffusions of native defects, and discuss how they affect the MOS device performance.

Dielectric polymer based electrolytes for high-performance all-solid-state lithium metal batteries

Solid polymer electrolytes (SPEs) are urgently required for achieving practical all-solid-state lithium metal batteries (ASSLMBs) but remain plagued by low ionic conductivity.Herein,we propose a strategy of salt polarization to fabricate a highly ion-conductive SPE by employing a high-dielectric polymer that can interact strongly with lithium salts.Such a polymer with large dipole moments can guide lithium cations (Li^(+)) to be arranged along the chain,forming a continuous pathway for Li^(+) hopping within the SPE.The as-fabricated SPE,poly(vinylidene difluoride)(PVDF)-LiN(SO_(2)F)_(2)(LiFSI),has an extraordinarily high dielectric constant (up to 10^(8)) and ultrahigh ionic conductivity (0.77×10^(-3)S cm^(-1)).Based on the PVDF–LiFSI SPE,the assembled Li metal symmetrical cell shows excellent Li plating/stripping reversibility at 0.1 m A cm^(-2),0.1 m Ah cm^(-2)over 1500 h^(-1) the ASS LiFePO_(4) batteries deliver long-term cycling stability at 1 C over 350 cycles (2.74 mg cm^(-2)) and an ultralong cycling lifespan of over 2600 h(100 cycles) with high loading (11.5 mg cm^(-2)) at 28°C.First-principles calculations further reveal the ion-dipole interactions-controlled conduction of Li^(+) in PVDF–LiFSI SPE along the PVDF chain.This work highlights the critical role of dielectric permittivity in SPE,and provides a promising path towards high-energy,long-cycling lifespan ASSLMBs.

Gate Current for MOSFETs with High k Dielectric Materials

The MOSFET gate currents of high k gate dielectrics due to direct tunneling are investigated by using a new direct tunneling current model developed.The model includes both the inversion layer quantization effect with finite barrier height and the polysilicon depletion effect.The impacts of dielectric constant and conduction band offset as well as the band gap on the gate current are discussed.The results indicate that the gate dielectric materials with higher dielectric constant,larger conduction band offset and the larger band gap are necessary to reduce the gate current.The calculated results can be used as a guide to select the appropriate high k gate dielectric materials for MOSFETs.

High Refractive Index Ti3O5 Films for Dielectric Metasurfaces

Ti33O55 films are deposited with the help of an electron beam evaporator for their applications in metasurfaces. The film of subwavelength （632nm） thickness is deposited on a silicon substrate and annealed at 400℃. The ellipsometry result shows a high refractive index above 2.5 with the minimum absorption coefficient in the visible region, which is necessary for high efficiency of transparent metasurfaces. Atomic force microscopy analysis is employed to measure the roughness of the as-deposited films. It is seen from micrographs that the deposited films are very smooth with the minimum roughness to prevent scattering and absorption losses for metasurface devices. The absence of grains and cracks can be seen by scanning electron microscope analysis, which is favorable for electron beam lithography. Fourier transform infrared spectroscopy reveals the transmission and reflection obtained from the film deposited on glass substrates. The as-deposited film shows high transmission above 60%, which is in good agreement with metasurfaces.

Designing high k dielectric films with LiPON-Al_(2)O_(3)hybrid structure by atomic layer deposition

A large amount of ultra-low-power consumption electronic devices are urgently needed in the new era of the internet of things,which demand relatively low frequency response.Here,atomic layer deposition has been utilized to fabricate the ion polarization dielectric of the Li PON-Al_(2)O_(3) hybrid structure.The Li PON thin film is periodically stacked in the Al_(2)O_(3) matrix.This hybrid structure presents a frequency-dependent dielectric constant,of which k is significantly higher than the aluminum oxide matrix from 1 k Hz to 200 k Hz in frequency.The increased dielectric constant is attributed to the lithium ions shifting locally upon the applied electrical field,which shows an additional polarization to the Al_(2)O_(3) matrix.This work provides a new strategy with promising potential to engineers for the dielectric constant of the gate oxide and sheds light on the application of electrolyte/dielectric hybrid structure in a variety of devices from capacitors to transistors.

Wide-Temperature-Range Dielectric Permittivity Measurement under High Pressure

Two measurement systems are developed for in-situ dielectric property measurement under high pressure in a wide-temperature range from 77K to 1273 K. The high-temperature system ranging from room temperature up to 1273K is equipped with a hexahedron anvils press, while the low-temperature system ranging from liquid nitrogen temperature to normal condition is equipped using the piston cylinder setup with a specially designed sample chamber. Using these configurations, the dielectric property measurement of ferroelectrie BaTiO3 and multiferroie Tm0.5Gd0.5MnO3 compounds are demonstrated, which proves the validity of the systems through the tuning of the polarization and phase transition boundary by high pressure. These two systems will be equally applicable to a wide variety of electronic and transport property measurements of insulators, semiconductors, as well as battery materials.

Dielectric nanocomposites with superb high-temperature capacitive performance based on high intrinsic dielectric constant polymer

Advancements in power electronics necessitate dielectric polymer films capable of operating at high temperatures and possessing high energy density.Although significant strides have been achieved by integrating inorganic fillers into high-temperature polymer matrices,the inherently low dielectric constants of these matrices have tempered the magnitude of success.In this work,we report an innovative nanocomposite based on sulfonylated polyimide(SPI),distinguished by the incorporation of sulfonyl groups within the SPI backbone and the inclusion of wide bandgap hafnium dioxide(HfO_(2))nanofillers.The nanocomposite has demonstrated notable enhancements in thermal stability,dielectric properties,and capacitive performance at elevated temperatures.Detailed simulations at both molecular and mesoscopic levels have elucidated the mechanisms behind these improvements,which could be attributed to confined segmental motion,an optimized electronic band structure,and a diminished incidence of dielectric breakdown ascribed to the presence of sulfonyl groups.Remarkably,the SPI-HfO_(2)nanocomposite demonstrates a high charge-discharge efficiency of 95.7%at an elevated temperature of 150℃and an applied electric field of 200 MV/m.Furthermore,it achieves a maximum discharged energy density of 2.71 J/cm^(3),signalling its substantial potential for energy storage applications under extreme conditions.

Novel high- with low specific on-resistance high voltage lateral double-diffused MOSFET

A novel voltage-withstand substrate with high-K（HK, k 〉 3.9, k is the relative permittivity） dielectric and low specific on-resistance（Ron,sp） bulk-silicon, high-voltage LDMOS（HKLR LDMOS）is proposed in this paper. The high-K dielectric and highly doped interface N＋-layer are made in bulk silicon to reduce the surface field drift region. The high-K dielectric can fully assist in depleting the drift region to increase the drift doping concentration（Nd） and reshape the electric field distribution. The highly doped N＋-layer under the high-K dielectric acts as a low resistance path to reduce the Ron,sp. The new device with the high breakdown voltage（BV）, the low Ron,sp, and the excellent figure of merit（FOM = BV^2/Ron,sp） is obtained. The BV of HKLR LDMOS is 534 V, Ron,sp is 70.6 m？·cm^2, and FOM is 4.039 MW·cm^（-2）.

Manipulating dielectric property of polymer coatings toward highretention-rate lithium metal full batteries under harsh critical conditions

Lithium(Li)metal batteries(LMBs)can potentially deliver much higher energy density but remain plagued by uncontrollable Li plating with dendrite growth,unstable interfaces,and highly abundant excess Li(>50 mAh·cm^(-2)).Herein,different from the artificial layer or three-dimensional(3D)matrix host constructions,various dielectric polymers are initially well-comprehensively investigated from experimental characterizations to theoretical simulation to evaluate their functions in modulating Li ion distribution.As a proof of concept,a 3D interwoven high dielectric functional polymer(HDFP)nanofiber network with polar C-F dipole moments electrospun on copper(Cu)foil is designed,realizing uniform and controllable Li deposition capacity up to 5.0 mAh·cm^(-2),thereby enabling stable Li plating/stripping cycling over 1400 h at 1.0 mA·cm^(-2).More importantly,under the highcathode loading(~3.1 mAh·cm^(-2))and only 0.6×excess Li(N/P ratio of 1.6),the full cells retain capacity retention of 97.4%after 200 cycles at 3.36 mA·cm^(-2)and achieve high energy density(297.7 Wh·kg^(-1)at cell-level)under lean electrolyte conditions(15μL),much better than ever-reported literatures.Our work provides a new direction for designing high dielectric polymer coating toward high-retention-rate practical Li full batteries.

Energy-band alignment of atomic layer deposited(HfO_2)_x(Al_2O_3)_(1-x) gate dielectrics on 4H-SiC

We study a series of（HfO2）x（Al2O3）1-x /4H-SiC MOS capacitors. It is shown that the conduction band offset of HfO2 is 0.5 e V and the conduction band offset of Hf AlO is 1.11–1.72 e V. The conduction band offsets of（Hf O2）x（Al2O3）1-x are increased with the increase of the Al composition, and the（HfO2）x（Al2O3）1-x offer acceptable barrier heights（〉 1 e V）for both electrons and holes. With a higher conduction band offset,（Hf O2）x（Al2O3）1-x/4H-SiC MOS capacitors result in a ～ 3 orders of magnitude lower gate leakage current at an effective electric field of 15 MV/cm and roughly the same effective breakdown field of ～ 25 MV/cm compared to HfO2. Considering the tradeoff among the band gap, the band offset, and the dielectric constant, we conclude that the optimum Al2O3 concentration is about 30% for an alternative gate dielectric in 4H-Si C power MOS-based transistors.

High entropy dielectrics

High entropy oxides(HEO)are single-phase solid solutions which are formed by the incorporation of five or more elements into a cationic sublattice in equal or near-equal atomic proportions.Its unique structural features and the possibility of targeted access to certain functions have attracted great interest from researchers.In this review,we summarize the recent advances in the electronic field of high-entropy oxides.We emphasize the following three fundamental aspects of high-entropy oxides:(1)The conductivity mechanism of metal oxides;(2)the factors affecting the formation of single-phase oxides;and(3)the electrical properties and applications of high-entropy oxides.The purpose of this review is to provide new directions for designing and tailoring the functional properties of relevant electronic materials via a comprehensive overview of the literature on the field of high-entropy oxide electrical properties.

Significantly Enhanced Energy Storage Performances of PEI-based Composites Utilizing Surface Functionalized ZrO_(2) Nanoparticles for High-Temperature Application

Polymer dielectrics with a high energy density and an available energy storage capacity have been playing an important role in advanced electronics and power systems. Nevertheless, the use of polymer dielectrics in harsh environments is limited by their low energy density at high temperatures. Herein, zirconium dioxide(ZrO_(2)) nanoparticles were decorated with amino group utilizing 4,4-methylenebis(phenyl isocyanate)(AMEO) and successfully incorporated into polyetherimide(PEI) matrix. The dielectric properties, breakdown strength, and energy storage performances of PEI/ZrO_(2)-AMEO nanocomposites were investigated from 25 ℃ to 150 ℃. It is found that the combination of moderate bandgap ZrO_(2) with modest dielectric constant and polar groups at interface with deep trap can offer an available strategy to simultaneously increase the dielectric constant and breakdown strength of polymer dielectrics. As a result, the composites containing ZrO_(2)-AMEO exhibit excellent energy storage performance at elevated temperatures. Specially, the PEI-based composites with 3 vol% ZrO_(2)-AMEO display a maximum discharged energy density(U_(d)) of 3.1 J/cm^(3) at 150 ℃, presenting 90% higher than that of neat PEI. This study may help to better develop the polymer-based dielectric composite applied at elevated temperatures.

Synthesis of Large-Sized van der Waals Layered MoO_(3) Single Crystals with Improved Dielectric Performance

The applications of two-dimensional semiconductors strictly require the reliable integration of ultrathin high-κdielectric materials on the semiconductor surface to enable fine gate control and low power consumption.As layered oxide materials,MoO_(3) can be potentially used as a high-κtwo-dimensional material with a larger bandgap and high electron affinity.In this work,relying on the oxidization of molybdenum chlorides,we have synthesizedα-MoO_(3) single crystals,which can be easily exfoliated into flakes with thicknesses of a few nanometers and sizes of hundreds of micrometers and fine thermal stability.Based on measurement results of conventional metal/insulator/metal devices and graphene based dual-gate devices,the as-received MoO_(3) nanosheets exhibit improved dielectric performance,including high dielectric constants and competitive breakdown field strength.Our work demonstrates that MoO_(3) with improved crystalline quality is a promising candidate for dielectric materials with a large gate capacitance in future electronics based on two-dimensional materials.

Aluminum doping for optimization of ultrathin and high-k dielectric layer based on SrTiO3

An ultrathin SrTiO3 dielectric layer is optimized through Al doping to solve the problems existing in development of ultra-high-k oxide MOS capacitors.Through post-deposition annealing,Al doping induces changes in the electronic structure of SrTiO3,thereby effectively reducing leakage current to <10^-8 A/cm^2 at 0.5 MV/cm but maintains good capacitance values(ε> 80) of ultrathin SrTMO3 MOS capacitors.Strontium titanate(SrTiO3) is a high-k material but its bandgap is smaller than that of other oxide dielectrics(e.g.,SiO2,Al2 O3).Consequently,an ultrathin SrTiO3 film may have a high tunneling leakage current,which is not suitable for capacitor-based applications.To improve the performance of metal-oxide-semiconductor(MOS) capacitors using SrTiO3,an approach based on homogenous and uniform aluminum doping to SrTiO3 through co-sputtering is introduced.The bandgap of a pristine SrTiO3 film showed an increase of 0.5 eV after Al doping.Furthermore,Al doping decreased the leakage current of SrTiO3/Si-based MOS capacitors by more than five orders of magnitude(at the level of nanoampere per square centimeter).Importantly,a dielectric constant of 81.3 and equivalent oxide thickness less than 5 A were achieved in an 8-nm-thick Al-doped SrTiO3 film owing to changes in its crystal structure and conduction band edge electronic structure.Thus,the obtained data show the effectiveness of the proposed approach for solving the problems existing in the development of ultra-high-k oxide MOS capacitors.

Deep eutectic solvent inclusions for high-k composite dielectric elastomers

Recent advances in novel electroactive devices have placed new requirements on material development.High-performance dielectric elastomers with good mechanical stretchability and high dielectric constant are under high demand.However,the current strategy for fabricating these materials suffers from high cost or low thermal stability,which greatly hinders large-scale industrial production.Herein,we have successfully developed a novel strategy for improving the dielectric constant of polymeric elastomers via deep eutectic solvent inclusion by taking advantage of the low cost,convenient and environmentally benign synthesis process and high ionic conductivity from deep eutectic solvents.The as-prepared composite elastomers showed good stretchability and a greatly enhanced dielectric constant with a negligible increase in dielectric dissipation.Moreover,we have proven the universality of our strategy by using different types of deep eutectic solvents.It is believed that low-cost,easy-synthesis and environmentally friendly deep eutectic solvents including composite elastomers are highly suitable for large-scale industrial production and can greatly broaden the application fields of dielectric elastomers.

Challenges of Process Technology in 32nm Technology Node

According to the international technology roadmap for semiconductors （ITRS）,32nm technology node will be introduced around 2009. Scaling of CMOS logic devices from 45 to 32nm node has come across significant barriers. Overcoming these pitch-scaling induced barriers requires integrating the most advanced process technologies into product manufacturing. This paper reviews and discusses new technology applications that could be potentially integrated into 32nm node in the following areas：extension of immersion lithography,mobility enhancement substrate technology,metal/ high-k （MHK） gate stack, ultra-shallow junction （USJ） and other strain enhancement engineering methods, including stress proximity effect （SPT）, dual stress liner （DSL）, stress memorization technique （SMT）, high aspect ratio process （HARP） for STI and PMD,embedded SiGe （for pFET） and SiC （for nFET） source/drain （S/D） using selective epitaxial growth （SEG） method,metallization for middle of line （MOL） and back-end of line （BEOL） ,and ultra low-k （ULK） integration.

A review of rare-earth oxide films as high k dielectrics in MOS devices——Commemorating the 100th anniversary of the birth of Academician Guangxian Xu

Recently,rare-earth oxide films have attracted more and more attention as gate dielectrics in metaloxide-semiconductor(MOS)devices,showing the advantages of high dielectric constant(k value),large band gap(Eg)and outstanding physical and chemical stability in contact with silicon substrates.This paper reviews the recent development of rare earth oxide-based gate dielectric films.Aiming at the problem that k value of rare earth oxides(REOs)is generally inversely proportio nal to the band gap value,one of the biggest technical obstacles of high k films,we reviewed three strategies reported in recent papers,namely doping modification,nitriding treatment and multilayer composite,which can provide some insights for long-term development of MOS devices in integrated circuit(IC).

Refractive index measurement of dielectric samples using highly focused radially polarized light(Invited Paper)

In this Letter, a refractive index measurement of a dielectric sample using highly focused radially polarized light is reported. Through imaging analysis of the optical field at the pupil plane of a high numerical aperture （NA） objective lens reflected by the sample under study, the Brewster angle is found. Employing a high NA objective lens allows the measurement of multiple angles of incidence from 0° to 64° in a single shot. The refractive index of the sample is estimated using the measured Brewster angle. The experimental results are compared with the theoretical images computed with the Fresnel theory, and a good agreement is obtained.

Analytical modeling of the direct tunneling current through high-k gate stacks for long-channel cylindrical surrounding-gate MOSFETs

An analytical direct tunneling gate current model for cylindrical surrounding gate（CSG） MOSFETs with high-k gate stacks is developed. It is found that the direct tunneling gate current is a strong function of the gate＇s oxide thickness, but that it is less affected by the change in channel radius. It is also revealed that when the thickness of the equivalent oxide is constant, the thinner the first layer, the smaller the direct tunneling gate current.Moreover, it can be seen that the dielectric with a higher dielectric constant shows a lower tunneling current than expected. The accuracy of the analytical model is verified by the good agreement of its results with those obtained by the three-dimensional numerical device simulator ISE.

Effect of carbon-doping on structural and dielectric properties of zinc oxide

In this paper,Carbon-doped Zinc Oxide(C-ZnO)samples were prepared using the solid-state reaction method.The influence of carbon-doping on the structural and dielectric properties of ZnO samples was studied.The shift in the highest peak position(101)in XRD patterns of carbon-doped samples was observed.The Raman peak at 581 cm^(-1) in undoped ZnO was shifted and broadened in carbon-doped ZnO samples.The ZnO samples doped with carbon show higher values of dielectric constant(~2400 at 1 kHz)compared to pure ZnO(~9 at 1 kHz)which was due to increase in native point defects in the samples.The ac conductivity(σ_(ac))value of the carbon-doped sample was enhanced by 103 times for((ZnO)_(0.9) C_(0.1))sample.