Low-Noise Amplification, Detection and Spectroscopy of Ultra-Cold Systems in RF Cavities

The design and development of a cryogenic Ultra-Low-Noise Signal Amplification (ULNA) and detection system for spectroscopy of ultra-cold systems are reported here for the operation in the 0.5 - 4 GHz spectrum of frequencies (the “L” and “S” microwave bands). The design is suitable for weak RF signal detection and spectroscopy from ultra-cold systems confined in cryogenic RF cavities, as entailed in a number of physics, physical chemistry and analytical chemistry applications, such as NMR/NQR/EPR and microwave spectroscopy, Paul traps, Bose-Einstein Condensates (BEC’s) and cavity Quantum Electrodynamics (cQED). Using a generic Low-Noise Amplifier (LNA) architecture for a GaAs enhancement mode High-Electron Mobility FET device, our design has especially been devised for scientific applications where ultra-low-noise amplification systems are sought to amplify and detect weak RF signals under various conditions and environments, including cryogenic temperatures, with the least possible noise susceptibility. The amplifier offers a 16 dB gain and a 0.8 dB noise figure at 2.5 GHz, while operating at room temperature, which can improve significantly at low temperatures. Both dc and RF outputs are provided by the amplifier to integrate it in a closed-loop or continuous-wave spectroscopy system or connect it to a variety of instruments, a factor which is lacking in commercial LNA devices. Following the amplification stage, the RF signal detection is carried out with the help of a post-amplifier and detection system based upon a set of Zero-Bias Schottky Barrier Diodes (ZBD’s) and a high-precision ultra-low noise jFET operational amplifier. The scheme offers unique benefits of sensitive detection and very-low noise amplification for measuring extremely weak on-resonance signals with substantial low- noise response and excellent stability while eliminating complicated and expensive heterodyne schemes. The LNA stage is fully capable to be a part of low-temperature experiments while being operated in cryogenic conditions down to about 500 mK.

A Wide-Band Low Noise Amplifier for Terrestrial and Cable Receptions

We present the design of a wide-band low-noise amplifier （LNA） implemented in 0.35μm SiGe BiCMOS technology for cable and terrestrial tuner applications. The LNA utilizes current injection to achieve high linearity. Without using inductors, the LNA achieves 0.1 ～ 1GHz wide bandwidth and 18. 8dB gain with less than 1.4dB of gain variation. The noise figure of the wideband LNA is 5dB, and its 1dB compression point is - 2dBm and IIP3 is 8dBm. The LNA dissipates 120mW of power with a 5V supply.

A Low-Noise Readout Circuit for Gyroscopes

In order to suppress the noise of gyroscopes,the method based on lock-in amplifier and capacitor matching of the low-noise readout circuit is proposed. Firstly,the principle to suppress the noise by lock-in amplifier is analyzed,and the noise model of front end is proposed. Secondly,the noise optimization for the charge amplifier is presented according to the noise model of front end. Finally,a readout circuit is constructed by this approach. The measurement results show that the parasitic capacitance of front end is 18 p F,and the noise at resonant frequency( 4 k Hz) is 133 n V / Hz1 / 2,and the overall bias stability is 30° /h,and the noise level is 0. 003° /( s·Hz1 / 2). The noise of the gyroscope with the low-noise readout by this method is suppressed effectively.

A single-to-differential low-noise amplifier with low differential output imbalance

This paper presents a single-ended input differential output low-noise amplifier intended for GPS applications. We propose a method to reduce the gain/amplitude and phase imbalance of a differential output exploiting the inductive coupling of a transformer or center-tapped differential inductor.A detailed analysis of the theory of imbalance reduction,as well as a discussion on the principle of choosing the dimensions of a transformer,are given.An LNA has been implemented using TSMC 0.18μm technology with ESD-protected.Measurement on board shows a voltage gain of 24.6 dB at 1.575 GHz and a noise figure of 3.2 dB.The gain imbalance is below 0.2 dB and phase imbalance is less than 2 degrees.The LNA consumes 5.2 mA from a 1.8 V supply.

A9.8-30.1GHzCMOSlow-noise amplifier with a 3.2-dB noise figure using inductor-and transformer-based gm-boosting techniques

A 9.8–30.1 GHz CMOS low-noise amplifier(LNA)with a 3.2-dB minimum noise figure(NF)is presented.At the architecture level,a topology based on common-gate(CG)cascading with a common-source(CS)amplifier is proposed for simultaneous wideband input matching and relatively high gain.At the circuit level,multiple techniques are proposed to improve LNA performance.First,in the CG stage,loading effect is properly used instead of the conventional feedback technique,to enable simultaneous impedance and noise matching.Second,based on in-depth theoretical analysis,the inductor-and transformer-based gm-boosting techniques are employed for the CG and CS stages,respectively,to enhance the gain and reduce power consumption.Third,the floating-body method,which was originally proposed to lower NF in CS amplifiers,is adopted in the CG stage to further reduce NF.Fabricated in a 65-nm CMOS technology,the LNA chip occupies an area of only 0.2 mm^(2)and measures a maximum power gain of 10.9 dB with−3 dB bandwidth from 9.8 to 30.1 GHz.The NF exhibits a minimum value of 3.2 dB at 15 GHz and is below 5.7 dB across the entire bandwidth.The LNA consumes 15.6 mW from a 1.2-V supply.

Design and analysis of a UWB low-noise amplifier in the 0.18μm CMOS process

An ultra-wideband （3.1-10.6 GHz） low-noise amplifier using the 0.18μm CMOS process is presented. It employs a wideband filter for impedance matching. The current-reused technique is adopted to lower the power consumption. The noise contributions of the second-order and third-order Chebyshev fliers for input matching are analyzed and compared in detail. The measured power gain is 12.4-14.5 dB within the bandwidth. NF ranged from 4.2 to 5.4 dB in 3.1-10.6 GHz. Good input matching is achieved over the entire bandwidth. The test chip consumes 9 mW （without output buffer for measurement） with a 1.8 V power supply and occupies 0.88 mm^2.

A CMOS variable gain low-noise amplifier with ESD protection for 5 GHz applications

This paper presents a variable gain low-noise amplifier（VG-LNA） for 5 GHz applications.The effect of the input parasitic capacitance on the inductively degenerated common source LNA＇s input impedance is analyzed in detail.A new ESD and LNA co-design method was proposed to achieve good performance.In addition,by using a simple feedback loop at the second stage of the LNA,continuous gain control is realized.The measurement results of the proposed VG-LNA exhibit 25 dB（-3.3 dB to 21.7 dB） variable gain range,2.8 dB noise figure at the maximum gain and 1 dBm IIP3 at the minimum gain,while the DC power consumption is 9.9 mW under a 1.8 V supply voltage.

A Multi-Section Quantum-Dot Semiconductor Optical Amplifier for Ultrabroad-Band Gain-Flattened Low-Noise Amplification

We propose an ultrabroad-band 1R regenerator utilizing a multi-section quantum-dot semiconductor optical amplifier. Due to the reduced electron states, quantum dot is beneficial in broadening the gain spectrum and lowering the noise figure. Combining this with a multi-section structure drastically improves the gain equality among the different bound states, leading to an increase in the maximum output power and an improvement of the noise figure.

A 5.4mW Low-Noise High-Gain CMOS RF Front-End Circuit for Portable GPS Receivers

This paper describes a CMOS low noise amplifier （LNA） plus the quadrature mixers intended for use in the front-end of portable global positioning system （GPS） receivers. The LNA makes use of an inductively degenerated input stage and power-constrained simultaneous noise and input matching techniques. The quadrature mixers are based on a Gil- bert cell type. The circuits are implemented in a TSMC 0.18μm RF CMOS process. Measurement results show that a voltage conversion gain of 35dB is achieved with a cascade noise and an input return loss of - 22.3dB. The fully differential figure of 2.4dB,an input ldB compression point of - 22dBm, circuits only draw 5.4mW from a 1.8V supply.

Link Budget and Enhanced Communication Distance for Ambient Internet of Things

Backscatter communications will play an important role in connecting everything for beyond 5G(B5G)and 6G systems.One open challenge for backscatter communications is that the signals suffer a round-trip path loss so that the communication distance is short.In this paper,we first calculate the communication distance upper bounds for both uplink and downlink by measuring the tag sensitivity and reflection coefficient.It is found that the activation voltage of the envelope detection diode of the downlink tag is the main factor limiting the back-scatter communication distance.Based on this analysis,we then propose to implement a low-noise amplifier(LNA)module before the envelope detection at the tag to enhance the incident signal strength.Our experimental results on the hardware platform show that our method can increase the downlink communication range by nearly 20 m.

A gain-flatness optimization solution for feedback technology of wideband low noise amplifiers

The S parameter expression of high-frequency models of the high electron mobility transistors (HEMTs) with basic feedback structure,especially the transmission gain S 21,is presented and analyzed.In addition,an improved feedback structure and its theory are proposed and demonstrated,in order to obtain a better gain-flatness through the mutual interaction between the series inductor and the parallel capacitor in the feedback loop.The optimization solution for the feedback amplifier can eliminate the negative impacts on transmission gain S 21 caused by things such as resonance peaks.Furthermore,our theory covers the shortage of conventional feedback amplifiers,to some extent.A wideband low-noise amplifier (LNA) with the improved feedback tech-nology is designed based on HEMT.The transmission gain is about 20 dB with the gain variation of 1.2 dB from 100 MHz to 6 GHz.The noise figure is lower than 2.8 dB in the whole band and the amplifier is unconditionally stable.

A CMOS 4.1 GHZ TWO-STAGE CASCODE LNA WITH ESD PROTECTION

A 4.1 GHz two-stage cascode Low-Noise Amplifier(LNA) with Electro-Static Discharge(ESD) protection is presented in this paper.The LNA has been optimized using ESD and LNA co-design methodology to achieve a good performance.Post-layout simulation results exhibit a forward gain(S21) of about 21 dB, a reverse isolation(S12) of less than-18 dB, an input return loss(S11) of less than-16 dB, and an output return loss(S22) of less than-17 dB.Moreover, the Noise Figure(NF) is 2.6 dB.This design is implemented in TSMC0.18μm RF CMOS technology and the die area is 0.9 mm×0.9 mm.

ESD-Induced Noise to Low Noise Amplifier Circuits in BiCMOS

Electrostatic discharge （ESD） induced parasitic effects have serious impacts on performance of radio frequency （RF） integrated circuits （IC）. This paper discusses a comprehensive noise analysis procedure for ESD protection structures and their negative influences on RF ICs. Noise figures （NFs） of commonly used ESD protection structures and their impacts on a single-chip 5.5 GHz low-noise amplifier （LNA） circuit were depicted. A design example in 0.18 μm SiGe BiCMOS was presented. Measurement results confirm that significant noise degradation occurs in the LNA circuit due to ESD-induced noise effects. A practical design procedure for ESD-protected RF ICs is provided for real-world RF IC optimization.

A CMOS 3.1 - 10.6 GHz UWB LNA Employing Modified Derivative Superposition Method

Low noise amplifier (LNA) performs as the initial amplification block in the receive path in a radio frequency (RF) receiver. In this work an ultra-wideband 3.1 10.6-GHz LNA is discussed. By using the proposed circuits for RF CMOS LNA and design methodology, the noise from the device is decreased across the ultra wide band (UWB) band. The measured noise figure is 2.66 3 dB over 3.1 10.6-GHz, while the power gain is 14 ± 0.8 dB. It consumes 23.7 mW from a 1.8 V supply. The input and output return losses (S11 & S22) are less than –11 dB over the UWB band. By using the modified derivative superposition method, the third-order intercept point IIP3 is improved noticeably. The complete circuit is based on the 0.18 μm standard RFCMOS technology and simulated with Hspice simulator.

Robust second-order correlation of twin parametric beams generated by amplified spontaneous parametric down-conversion

We report an observation of the second-order correlation between twin beams generated by amplified spontaneous parametric down-conversion operating above threshold with kilowatt-level peak power, from a periodically poled Li Ta O3 crystal via a single-pass scheme. Photocurrent correlation was measured because of the bright photon streams, with raw visibility of 37.9% or 97.3% after electronic filtering. As expected in our theory, this correlation is robust and insensitive to parametric gain and detection loss, enabling important applications in optical communications, precision measurement, and nonlocal imaging.

A low power dual-band multi-mode RF front-end for GNSS applications

A CMOS dual-band multi-mode RF front-end for the global navigation satellite system receivers of all GPS,Bei-Dou,Galileo and Glonass systems is presented.It consists of a reconfigurable low noise amplifier（LNA）,a broadband active balun,a high linearity mixer and a bandgap reference（BGR） circuit.The effect of the input parasitic capacitance on the input impedance of the inductively degenerated common source LNA is analyzed in detail.By using two different LC networks at the input port and the switched capacitor at the output port,the LNA can work at two different frequency bands（1.2 GHz and 1.5 GHz） under low power consumption.The active balun uses a hybrid-connection structure to achieve high bandwidth.The mixer uses the multiple gated transistors technique to acquire a high linearity under low power consumption but does not deteriorate other performances.The measurement results of the proposed front-end achieve a noise figure of 2.1/2.0 dB,a gain of 33.9/33.8 dB and an input 1-dB compression point of 0/1 dBm at 1227.6/1575.42 MHz.The power consumption is about 16 mW under a 1.8 V power supply.

Design of a 40-GHz LNA in 0.13-μm SiGe BiCMOS

A low-noise amplifier （LNA） operated at 40 GHz is designed. An improved cascode configuration is proposed and the design of matching networks is presented. Short-circuited coplanar waveguides （CPWs） were used as inductors to achieve a high Q-factor. The circuit was fabricated in a 0.13-μm SiGe BiCMOS technology with a transistor transit frequency fT of 103 GHz. The chip area is 0.21mm^2. The LNA has one cascode stage with a-3 dB bandwidth from 34 to 44 GHz. At 40 GHz, the measured gain is 8.6dB; the input return loss, S11, is -16.2dB; and the simulated noise figure is 5 dB. The circuit draws a current of only 3 mA from a 2.5 V supply.

Analysis and design of transformer-based CMOS ultra-wideband millimeter-wave circuits for wireless applications: a review

With a lot of millimeter-wave(mm-Wave)applications being issued,wideband circuits and systems have attracted much attention because of their strong applicability and versatility.In this paper,four transformer-based ultra-wideband mm-Wave circuits demonstrated in CMOS technologies are reviewed from theoretical analysis,implementation,to performance.First,we introduce a mm-Wave low-noise amplifier with transformer-based Gm-boosting and pole-tuning techniques.It achieves wide operating bandwidth,low noise figure,and good gain performance.Second,we review an injection-current-boosting technique which can significantly increase the locking range of mm-Wave injection-locked frequency triplers.Based on the injectionlocked principle,we also discuss an ultra-wideband mm-Wave divider with the transformer-based high-order resonator.Finally,an E-band up-conversion mixer is presented;using the two-path transconductance stage and transformer-based load,it obtains good linearity and a large operating band.

A 6-7 GHz,40 dB receiver RF front-end with 4.5 dB minimum noise figure in 0.13μm CMOS for IR-UWB applications

A wideband receiver RP front-end for IR-UWB applications is implemented in 0.13μm CMOS technology. Thanks to the direct sub-sampling architecture,there is no mixing process.Both LNA and VGA work at RF frequencies.To optimize noise as well as linearity,a differential common-source LNA with capacitive cross- coupling is used,which only consumes current of 1.8 mA from a 1.2 V power supply.Following LNA,a two-stage current-steering VGA is adopted for gain tuning.To extend the overall bandwidth,a three-stage staggered peaking technique is used.Measurement results show that the proposed receiver front-end achieves a gain tuning range from 5 to 40 dB within 6-7 GHz,a minimum noise figure of 4.5 dB and a largest IIP_3 of-11 dBm.The core receiver (without test buffer) consumes 14 mW from a 1.2 V power supply and occupies 0.58 mm^2 area.

Design and implementation of super-heterodyne nano-metrology circuits

The most important aim of nanotechnology development is to construct atomic-scale devices, and those atomic-scale devices are required to use some measurements that have ability to control and build in the range of these dimensions. A method based on super- heterodyne interferometers can be used to access the measurements in nano-scale. One of the most important limitations to increase the resolution of the displacement measurement is nonlinearity error. According to the base and measurement signals received by optical section of super-heterodyne interferometer, it is necessary for circuits to reconstruct and detect corresponding phase with target displacement. In this paper, we designed, simulated, and implemented the circuits required for electronic part of interferometer by complementary metal-oxide-semicon- ductor （CMOS） 0.5 ~tm technology. These circuits included cascade low-noise amplifiers （LNA） with 19.1 dB gain and 2.5dB noise figure （NF） at 500MHz frequency, band-pass filters with 500MHz central fre- quency and 400 kHz bandwidth, double-balanced mixers with 233/0.6pm ratio for metal-oxide-semiconductor field-effect transistors （MOSFETs）, and low-pass filters with 300 kHz cutoff frequency. The experimental results show that the amplifiers have 19.41 dB gain and 2.7 dB noise factor, mixers have the ratio of radio frequency to local oscillator （RF/LO） range between 80 and 2500 MHz with intermediate frequency （IF） range between DC to 1000 MHz, and the digital phase measurement circuit based on the time-to-digital converter （TDC） has a nanosecond resolution.