Comparison of displacement damage effects on the dark signal in CMOS image sensors induced by CSNS back-n and XAPR neutrons

This study investigates the effects of displacement damage on the dark signal of a pinned photodiode CMOS image sensor(CIS)following irradiation with back-streaming white neutrons from white neutron sources at the China spallation neutron source(CSNS)and Xi'an pulsed reactor(XAPR).The mean dark signal,dark signal non-uniformity(DSNU),dark signal distribution,and hot pixels of the CIS were compared between the CSNS back-n and XAPR neutron irradiations.The nonionizing energy loss and energy distribution of primary knock-on atoms in silicon,induced by neutrons,were calculated using the open-source package Geant4.An analysis combining experimental and simulation results showed a noticeable proportionality between the increase in the mean dark signal and the displacement damage dose(DDD).Additionally,neutron energies influence DSNU,dark signal distribution,and hot pixels.High neutron energies at the same DDD level may lead to pronounced dark signal non-uniformity and elevated hot pixel values.

Exploration of high-speed 3.0 THz imaging with a 65 nm CMOS process

This paper describes a promising route for the exploration and development of 3.0 THz sensing and imaging with FET-based power detectors in a standard 65 nm CMOS process.Based on the plasma-wave theory proposed by Dyakonov and Shur,we designed high-responsivity and low-noise multiple detectors for monitoring a pulse-mode 3.0 THz quantum cascade laser(QCL).Furthermore,we present a fully integrated high-speed 32×32-pixel 3.0 THz CMOS image sensor(CIS).The full CIS measures 2.81×5.39 mm^(2) and achieves a 423 V/W responsivity(Rv)and a 5.3 nW integral noise equivalent power(NEP)at room temperature.In experiments,we demonstrate a testing speed reaching 319 fps under continuous-wave(CW)illumina-tion of a 3.0 THz QCL.The results indicate that our terahertz CIS has excellent potential in cost-effective and commercial THz imaging and material detection.

Incomplete charge transfer in CMOS image sensor caused by Si/SiO_(2)interface states in the TG channel

CMOS image sensors produced by the existing CMOS manufacturing process usually have difficulty achieving complete charge transfer owing to the introduction of potential barriers or Si/SiO_(2)interface state traps in the charge transfer path,which reduces the charge transfer efficiency and image quality.Until now,scholars have only considered mechanisms that limit charge transfer from the perspectives of potential barriers and spill back effect under high illumination condition.However,the existing models have thus far ignored the charge transfer limitation due to Si/SiO_(2)interface state traps in the transfer gate channel,particularly under low illumination.Therefore,this paper proposes,for the first time,an analytical model for quantifying the incomplete charge transfer caused by Si/SiO_(2)interface state traps in the transfer gate channel under low illumination.This model can predict the variation rules of the number of untransferred charges and charge transfer efficiency when the trap energy level follows Gaussian distribution,exponential distribution and measured distribution.The model was verified with technology computer-aided design simulations,and the results showed that the simulation results exhibit the consistency with the proposed model.

Design,Analysis,and Optimization of a CMOS Active Pixel Sensor

A three-transistor active pixel sensor and its double sampling readout circuit implemented by a switch capacitor amplifier are designed. The circuit is embedded in a 64 × 64 pixel array CMOS image sensor and success-fully taped out with a Chartered 0.35μm process. The pixel pitch is 8μm × 8μm with a fill factor of 57%, the photo-sensitivity is 0.8V/（lux · s） ,and the dynamic range is 50dB. Theoretical analysis and test results indicate that as the process is scaled down, a smaller pixel pitch reduces the sensitivity. A deep junction n-well/p-substrate photodiode with a reasonable fill factor and high sensitivity are more appropriate for submicron processes.

A Low-Power-Consumption 9bit 10MS/s Pipeline ADC for CMOS Image Sensors

A low-power-consumption 9bit 10MS/s pipeline ADC,used in a CMOS image sensor,is proposed. In the design, the decrease of power consumption is achieved by applying low-power-consumption and large-output-swing amplifiers with gain boost structure, and biasing all the cells with the same voltage bias source, which requires careful layout design and large capacitors. In addition,capacitor array DAC is also applied to reduce power consumption,and low threshold voltage MOS transistors are used to achieve a large signal processing range. The ADC was implemented in a 0.18μm 4M-1 P CMOS process,and the experimental results indicate that it consumes only 7mW, which is much less than general pipeline ADCs. The ADC was used in a 300000 pixels CMOS image sensor.

Numerical Simulation and Analysis of Bipolar Junction Photogate Transistor for CMOS Image Sensor

A new photodetector--bipolar junction photogate transistor is presented for CMOS image sensor and its analytical model is also established.With the technical parameter of the 0.6μm CMOS process,the bipolar junction photogate transistor is analyzed and simulated.The simulated results illustrate that the bipolar junction photogate transistor has the similar characteristics of the traditional photogate transistor.The photocurrent density of the bipolar junction photogate transistor increases exponentially with the incidence light power due to introducing the injection p+n junction.Its characteristic of blue response is rather improved compared to the traditional photogate transistor that benefits to increase the color photograph made up of the red,the green,and the blue.

A New CMOS Image Sensor with a High Fill Factor and the Dynamic Digital Double Sampling Technique

A single CMOS image sensor based on a 0.35μm process along with its design and implementation is introduced. The architecture of an active pixel sensor is used in the chip. The fill factor of a pixel cell can reach 43%,higher than the traditional factor of 30%. Moreover, compared with the conventional method whose fixed pattern noise （FPN） is around 0.5%, a dynamic digital double sampling technique is developed, which possesses simpler circuit architecture and a better FPN suppression outcome. The CMOS image sensor chip is implemented in the 0.35μm mixed signal process of a Chartered by MPW. The experimental results show that the chip operates welt,with an FPN of about 0.17%.

Digital Receiver for Laser Imaging Radar

With the extension of the application domains for laser imaging radar, it is necessary to find a new technical way to obtain high technical performance and adaptive ability. In this paper, A new concept of digital receiver of laser imaging radar system is presented. This digital receiver is defined as a time varying parameter receiver which possesses large dynamics region and time domain filter. The receiver’s mode, component structure as well as every function of its processing are described. The results and laboratorial data show the feasibility of digital reception. Also, it can exploit the inherent nature of laser imaging radar to obtain high probability of detection.

Neuromorphic vision sensors: Principle, progress and perspectives

Conventional frame-based image sensors suffer greatly from high energy consumption and latency.Mimicking neurobiological structures and functionalities of the retina provides a promising way to build a neuromorphic vision sensor with highly efficient image processing.In this review article,we will start with a brief introduction to explain the working mechanism and the challenges of conventional frame-based image sensors,and introduce the structure and functions of biological retina.In the main section,we will overview recent developments in neuromorphic vision sensors,including the silicon retina based on conventional Si CMOS digital technologies,and the neuromorphic vision sensors with the implementation of emerging devices.Finally,we will provide a brief outline of the prospects and outlook for the development of this field.

Dark output characteristic of γ-ray irradiated CMOS digital image sensors

The quality of dark output images from the CMOS (complementarymetal oxide semiconductor) black and white (B & W) digital imagesensors captured before and after γ-ray irradiation was studied. Thecharacteristic parameters of the dark output images captured atdifferent radiation dose, e.g. average brightness and itsnon-uniformity of dark out- put images, were analyzed by our testsoftware. The primary explanation for the change of the parameterswith the radi- ation dose was given.

Pixel and Column Fixed Pattern Noise Suppression Mechanism in CMOS Image Sensor

A double sampling circuit to eliminating fixed pattern noise(FPN) in CMOS image sensor (CIS) is presented. Double sampling is implemented by column switch capacitor amplifier directly, and offset compensation is added to the amplifier to suppress column FPN. The amplifier is embedded in a 64×64 CIS and successfully fabricated with chartered 0.35 μm process. Theory analysis and circuit simulation indicate that FPN can be suppressed from millivolt to microvolt. Test results show that FPN is smaller than one least-significant bit of 8 bit ADC. FPN is reduced to an acceptable level with double sampling technique implemented with switch capacitor amplifier.

Fabrication of PdSe2/GaAs Heterojunction for Sensitive Near-Infrared Photovoltaic Detector and Image Sensor Application

In this study,we have developed a high-sensitivity,near-infrared photodetector based on PdSe2/GaAs heterojunction,which was made by transferring a multilayered PdSe2 film onto a planar GaAs.The as-fabricated PdSe2/GaAs heterojunction device exhibited obvious photovoltaic behavior to 808 nm illumination,indicating that the near-infrared photodetector can be used as a self-driven device without external power supply.Further device analysis showed that the hybrid heterojunction exhibited a high on/off ratio of 1.16×10^5 measured at 808 nm under zero bias voltage.The responsivity and specific detectivity of photodetector were estimated to be 171.34 mA/W and 2.36×10^11 Jones,respectively.Moreover,the device showed excellent stability and reliable repeatability.After 2 months,the photoelectric characteristics of the near-infrared photodetector hardly degrade in air,attributable to the good stability of the PdSe2.Finally,the PdSe2/GaAs-based heterojunction device can also function as a near-infrared light sensor.

Weld pool image sensor for pulsed MIG welding

Visual image sensor is developed to detect the weld pool images in pulsed MIG welding. An exposure controller, which is composed of the modules of the voltage transforming, the exposure parameters presetting, the complex programmable logic device （CPLD） based logic controlling, exposure signal processing, the arc state detecting, the mechanical iris driving and so on, is designed at first. Then, a visual image sensor consists of an ordinary CCD camera, optical system and exposure controller is established. The exposure synchronic control logic is described with very-high-speed integrated circuit hardware description language （VHDL） and programmed with CPLD , to detect weld pool images at the stage of base current in pulsed MIG welding. Finally, both bead on plate welding and V groove filled welding are carried out, clear and consistent weld pool images are acquired.

Area-Efficient Low Power CMOS Image Sensor Readout Circuit with Fixed Pattern Noise Cancellation

A low cost of die area and power consumption CMOS image sensor readout circuit with fixed pattern noise(FPN) cancellation is proposed.By using only one coupling capacitor and switch in the double FPN cancelling correlative double sampling(CDS),pixel FPN is cancelled and column FPN is stored and eliminated by the sampleand-hold operation of digitally programmable gain amplifier(DPGA).The bandwidth balance technology based on operational amplifier(op-amp) sharing is also introduced to decrease the power dissi...

Modeling the photon counting and photoelectron counting characteristics of quanta image sensors

A signal chain model of single-bit and multi-bit quanta image sensors(QISs)is established.Based on the proposed model,the photoresponse characteristics and signal error rates of QISs are investigated,and the effects of bit depth,quantum efficiency,dark current,and read noise on them are analyzed.When the signal error rates towards photons and photoelectrons counting are lower than 0.01,the high accuracy photon and photoelectron counting exposure ranges are determined.Furthermore,an optimization method of integration time to ensure that the QIS works in these high accuracy exposure ranges is presented.The trade-offs between pixel area,the mean value of incident photons,and integration time under different illuminance level are analyzed.For the 3-bit QIS with 0.16 e-/s dark current and 0.21 e-r.m.s.read noise,when the illuminance level and pixel area are 1 lux and 1.21μm^(2),or 10000 lux and 0.21μm^(2),the recommended integration time is 8.8 to 30 ms,or 10 to21.3μs,respectively.The proposed method can guide the design and operation of single-bit and multi-bit QISs.

Novel CMOS image sensor pixel to improve charge transfer speed and efficiency by overlapping gate and temporary storage diffusing node

A novel CMOS image sensor(CIS) pinned photodiode(PPD) pixel, named as O-T pixel, is proposed and investigated by TCAD simulations. Compared with the conventional PPD pixel, the proposed pixel features the overlapping gate(OG)and the temporary storage diffusing(TSD) region, based on which the several-nanosecond-level charge transfer could be achieved and the complete charge transfer from the PPD to the floating node(FD) could be realized. And systematic analyses of the influence of the doping conditions of the proposed processes, the OG length, and the photodiode length on the transfer performances of the proposed pixel are conducted. Optimized simulation results show that the total charge transfer time could reach about 5.862 ns from the photodiode to the sensed node and the corresponding charge transfer efficiency could reach as high as 99.995% in the proposed pixel with 10 μm long photodiode and 2.22 μm long OG. These results demonstrate a great potential of the proposed pixel in high-speed applications.

A nano-metallic-particles-based CMOS image sensor for DNA detection

In this paper we report on a study of the CMOS image sensor detection of DNA based on self-assembled nano- metallic particles, which are selectively deposited on the surface of the passive image sensor. The nano-metallic particles effectively block the optical radiation in the visible spectrum of ordinary light source. When such a technical method is applied to DNA detection, the requirement for a special UV light source in the most popular fluorescence is eliminated. The DNA detection methodology is tested on a CMOS sensor chip fabricated using a standard 0.5 gm CMOS process. It is demonstrated that the approach is highly selective to detecting even a signal-base mismatched DNA target with an extremely-low-concentration DNA sample down to 10 pM under an ordinary light source.

Modeling random telegraph signal noise in CMOS image sensor under low light based on binomial distribution

The random telegraph signal noise in the pixel source follower MOSFET is the principle component of the noise in the CMOS image sensor under low light. In this paper, the physical and statistical model of the random telegraph signal noise in the pixel source follower based on the binomial distribution is set up. The number of electrons captured or released by the oxide traps in the unit time is described as the random variables which obey the binomial distribution. As a result,the output states and the corresponding probabilities of the first and the second samples of the correlated double sampling circuit are acquired. The standard deviation of the output states after the correlated double sampling circuit can be obtained accordingly. In the simulation section, one hundred thousand samples of the source follower MOSFET have been simulated,and the simulation results show that the proposed model has the similar statistical characteristics with the existing models under the effect of the channel length and the density of the oxide trap. Moreover, the noise histogram of the proposed model has been evaluated at different environmental temperatures.

Difference in electron-and gamma-irradiation effects on output characteristic of color CMOS digital image sensors

Changes of the average brightness and non-uniformity of dark output images,and quality of pictures captured under natural lighting for the color CMOS digital image sensorsirradiated at different electron doses have been studied in comparison to those from theγ-irradiated sensors. For the electron-irradiated sensors, the non-uniformity increases obviouslyand a small bright region on the dark image appears at the dose of 0.4 kGy. The average brightnessincreases at 0.4 kGy, increases sharply at 0.5 kGy. The picture is very blurry only at 0.6 kGy,showing the sensor undergoes severe performance degradation. Electron radiation damage is much moresevere than γ radiation damage for the CMOS image sensors. A possible explanation is presented inthis paper.

Column readout circuit with improved offset mismatch and charge sharing for CMOS image sensor

High linearity and low noise column readout chain are two key factors in CMOS image sensor.However,offset mismatch and charge sharing always exist in the conventional column wise readout implementation,even adopting the technology of correlated double sample.A simple column readout circuit with improved offset mismatch and charge sharing for CMOS image sensor is proposed in this paper.Based on the bottom plate sampling and fixed common level method,this novel design can avoid the offset nonuniformity between the two buffers.Also,the single buffer and switched capacitor technique can effectively suppress the charge sharing caused by the varied operating point.The proposed approach is experimentally verified in a 1024×1024 prototype chip designed and fabricated in 55 nm low power CMOS process.The measurement results show that the linear range is extended by 20%,the readout noise of bright and dark fields is reduced by 40%and 30%respectively,and the improved photo response nonuniformity is up to 1.16%.Finally,a raw sample image taken by the prototype sensor shows the excellent practical performance.