Exploration of high-speed 3.0 THz imaging with a 65 nm CMOS process

This paper describes a promising route for the exploration and development of 3.0 THz sensing and imaging with FET-based power detectors in a standard 65 nm CMOS process.Based on the plasma-wave theory proposed by Dyakonov and Shur,we designed high-responsivity and low-noise multiple detectors for monitoring a pulse-mode 3.0 THz quantum cascade laser(QCL).Furthermore,we present a fully integrated high-speed 32×32-pixel 3.0 THz CMOS image sensor(CIS).The full CIS measures 2.81×5.39 mm^(2) and achieves a 423 V/W responsivity(Rv)and a 5.3 nW integral noise equivalent power(NEP)at room temperature.In experiments,we demonstrate a testing speed reaching 319 fps under continuous-wave(CW)illumina-tion of a 3.0 THz QCL.The results indicate that our terahertz CIS has excellent potential in cost-effective and commercial THz imaging and material detection.

A Low-Power-Consumption 9bit 10MS/s Pipeline ADC for CMOS Image Sensors

A low-power-consumption 9bit 10MS/s pipeline ADC,used in a CMOS image sensor,is proposed. In the design, the decrease of power consumption is achieved by applying low-power-consumption and large-output-swing amplifiers with gain boost structure, and biasing all the cells with the same voltage bias source, which requires careful layout design and large capacitors. In addition,capacitor array DAC is also applied to reduce power consumption,and low threshold voltage MOS transistors are used to achieve a large signal processing range. The ADC was implemented in a 0.18μm 4M-1 P CMOS process,and the experimental results indicate that it consumes only 7mW, which is much less than general pipeline ADCs. The ADC was used in a 300000 pixels CMOS image sensor.

Neuromorphic vision sensors: Principle, progress and perspectives

Conventional frame-based image sensors suffer greatly from high energy consumption and latency.Mimicking neurobiological structures and functionalities of the retina provides a promising way to build a neuromorphic vision sensor with highly efficient image processing.In this review article,we will start with a brief introduction to explain the working mechanism and the challenges of conventional frame-based image sensors,and introduce the structure and functions of biological retina.In the main section,we will overview recent developments in neuromorphic vision sensors,including the silicon retina based on conventional Si CMOS digital technologies,and the neuromorphic vision sensors with the implementation of emerging devices.Finally,we will provide a brief outline of the prospects and outlook for the development of this field.

Dark output characteristic of γ-ray irradiated CMOS digital image sensors

The quality of dark output images from the CMOS (complementarymetal oxide semiconductor) black and white (B & W) digital imagesensors captured before and after γ-ray irradiation was studied. Thecharacteristic parameters of the dark output images captured atdifferent radiation dose, e.g. average brightness and itsnon-uniformity of dark out- put images, were analyzed by our testsoftware. The primary explanation for the change of the parameterswith the radi- ation dose was given.

Modeling the photon counting and photoelectron counting characteristics of quanta image sensors

A signal chain model of single-bit and multi-bit quanta image sensors(QISs)is established.Based on the proposed model,the photoresponse characteristics and signal error rates of QISs are investigated,and the effects of bit depth,quantum efficiency,dark current,and read noise on them are analyzed.When the signal error rates towards photons and photoelectrons counting are lower than 0.01,the high accuracy photon and photoelectron counting exposure ranges are determined.Furthermore,an optimization method of integration time to ensure that the QIS works in these high accuracy exposure ranges is presented.The trade-offs between pixel area,the mean value of incident photons,and integration time under different illuminance level are analyzed.For the 3-bit QIS with 0.16 e-/s dark current and 0.21 e-r.m.s.read noise,when the illuminance level and pixel area are 1 lux and 1.21μm^(2),or 10000 lux and 0.21μm^(2),the recommended integration time is 8.8 to 30 ms,or 10 to21.3μs,respectively.The proposed method can guide the design and operation of single-bit and multi-bit QISs.

Difference in electron-and gamma-irradiation effects on output characteristic of color CMOS digital image sensors

Changes of the average brightness and non-uniformity of dark output images,and quality of pictures captured under natural lighting for the color CMOS digital image sensorsirradiated at different electron doses have been studied in comparison to those from theγ-irradiated sensors. For the electron-irradiated sensors, the non-uniformity increases obviouslyand a small bright region on the dark image appears at the dose of 0.4 kGy. The average brightnessincreases at 0.4 kGy, increases sharply at 0.5 kGy. The picture is very blurry only at 0.6 kGy,showing the sensor undergoes severe performance degradation. Electron radiation damage is much moresevere than γ radiation damage for the CMOS image sensors. A possible explanation is presented inthis paper.

Digital Receiver for Laser Imaging Radar

With the extension of the application domains for laser imaging radar, it is necessary to find a new technical way to obtain high technical performance and adaptive ability. In this paper, A new concept of digital receiver of laser imaging radar system is presented. This digital receiver is defined as a time varying parameter receiver which possesses large dynamics region and time domain filter. The receiver’s mode, component structure as well as every function of its processing are described. The results and laboratorial data show the feasibility of digital reception. Also, it can exploit the inherent nature of laser imaging radar to obtain high probability of detection.

Localized Model and Arithmetic System Based on Two Image Sensors Under Complex Circumstance

Two image sensors simulate directly the way of disposing images with the human＇s two eyes, so it has important value to apply in many domains, such as object identification, small unmaned aerial vehicle （UAV）, workpiece localization, robot navigation and so on. The object localization based on two image sensots is studied in this paper. It concentrates on how to apply two charge coupled device （CCD） image sensors to object localization of sphere in complex environments. At first a space model of the two image sensors is set up, then Hough transformation is adopted to get localizated model and arithmetic system. An experiment platform is built in order to prove the correctness and feasibility of that localization algorithm.

High Speed Column-Parallel CDS/ADC Circuit with Nonlinearity Compensation for CMOS Image Sensors

A high speed column-parallel CDS/ADC circuit with nonlinearity compensation is proposed in this paper.The correlated double sampling (CDS) and analog-to-digital converter (ADC) functions are integrated in a threephase column-parallel circuit based on two floating gate inverters and switched-capacitor network.The conversion rate of traditional single-slope ADC is speeded up by dividing quantization to coarse step and fine step.A storage capacitor is used to store the result of coarse step and locate the section of ramp signal of fine step,which can reduce the clock step from 2 n to 2 (n/2+1).The floating gate inverters are implemented to reduce the power consumption.Its induced nonlinear offset is cancelled by introducing a compensation module to the input of inverter,which can equalize the coupling path in three phases of the proposed circuit.This circuit is designed and simulated for CMOS image sensor with 640×480 pixel array using Chartered 0.18μm process.Simulation results indicate that the resolution can reach 10-bit and the maximum frame rate can reach 200 frames/s with a main clock of 10MHz.The power consumption of this circuit is less than 36.5μW with a 3.3V power supply.The proposed CDS/ADC circuit is suitable for high resolution and high speed image sensors.

Time-dependent crosstalk effects for image sensors with different isolation structures

Photo-generated carriers may diffuse into the adjacent cells to form the electrical crosstalk, which is especially no- ticeable after the pixel cell size has been scaled down. The electrical crosstalk strongly depends on the structure and electrical properties of the photosensitive areas. In this work, time-dependent crosstalk effects considering different isola- tion structures are investigated. According to the different depths of photo-diode （PD） and isolation structure, the transport of photo-generated carriers is analyzed with different regions in the pixel cell. The evaluation of crosstalk is influenced by exposure time. Crosstalk can be suppressed by reducing the exposure time. However, the sensitivity and dynamic range of the image sensor need to be considered as well.

In-Pixel Charge Addition Scheme Applied in Time-Delay Integration CMOS Image Sensors

An addition scheme applicable to time-delay integration (TDI) CMOS image sensor is proposed,which adds signals in the charge domain in the pixel array.A two-shared pixel structure adopting two-stage charge transfer is introduced,together with the rolling shutter with an undersampling readout timing.Compared with the conventional TDI addition methods,the proposed scheme can reduce the addition operations by half in the pixel array,which decreases the power consumption of addition circuits outside the pixel array.The timing arrangement and pixel structure are analyzed in detail.The simulation results show that the proposed pixel structure can achieve the charge addition with negligible nonlinearity,therefore the power consumption of the periphery addition circuits can be reduced by half theoretically.

Incomplete charge transfer in CMOS image sensor caused by Si/SiO_(2)interface states in the TG channel

CMOS image sensors produced by the existing CMOS manufacturing process usually have difficulty achieving complete charge transfer owing to the introduction of potential barriers or Si/SiO_(2)interface state traps in the charge transfer path,which reduces the charge transfer efficiency and image quality.Until now,scholars have only considered mechanisms that limit charge transfer from the perspectives of potential barriers and spill back effect under high illumination condition.However,the existing models have thus far ignored the charge transfer limitation due to Si/SiO_(2)interface state traps in the transfer gate channel,particularly under low illumination.Therefore,this paper proposes,for the first time,an analytical model for quantifying the incomplete charge transfer caused by Si/SiO_(2)interface state traps in the transfer gate channel under low illumination.This model can predict the variation rules of the number of untransferred charges and charge transfer efficiency when the trap energy level follows Gaussian distribution,exponential distribution and measured distribution.The model was verified with technology computer-aided design simulations,and the results showed that the simulation results exhibit the consistency with the proposed model.

A Framework for Introducing Precision Agriculture Technologies in Egypt

Precision Agriculture(PA)has been used in many countries and serving the agricultural sectors.The use of PA solutions intervened with many agricultural businesses and supported decision making using data analytics.Precision Agriculture depends on weather,soil,plants,and water information that are essential for farming.Precision Agriculture depends on the use of several technologies such as image sensors,vision machines,drones,robots,machine learning,and artificial intelligence.The use of Precision Agriculture Technologies(PAT)depends on integration between devices,sensors,and systems to ensure the proper implementation of activities.This paper is generated from research on the applicability of PA in in Egypt that ended with a proposed framework for proper implementation of it.The conducted research depended on a survey,focus group discussions,and an online questionnaire that reached 271 respondents from 19 Egyptian governorates.The framework has been developed to enhance the role of an initiative leader to promote PAT through collaboration with other stakeholders in the agricultural sector.The proposed framework can be used by governmental,non-governmental entities,universities and private sector institutions and could be used at countries facing issues with land fragmentation,limited access to information,limited access to agricultural extension services,and increase in agricultural input’s prices.

Review of bio-inspired image sensors for efficient machine vision

With the rapid development of sensor networks,machine vision faces the problem of storing and computing massive data.The human visual system has a very efficient information sense and computation ability,which has enlightening significance for solving the above problems in machine vision.This review aims to comprehensively summarize the latest advances in bio-inspired image sensors that can be used to improve machine-vision processing efficiency.After briefly introducing the research background,the relevant mechanisms of visual information processing in human visual systems are briefly discussed,including layerby-layer processing,sparse coding,and neural adaptation.Subsequently,the cases and performance of image sensors corresponding to various bio-inspired mechanisms are introduced.Finally,the challenges and perspectives of implementing bio-inspired image sensors for efficient machine vision are discussed.

Design,Analysis,and Optimization of a CMOS Active Pixel Sensor

A three-transistor active pixel sensor and its double sampling readout circuit implemented by a switch capacitor amplifier are designed. The circuit is embedded in a 64 × 64 pixel array CMOS image sensor and success-fully taped out with a Chartered 0.35μm process. The pixel pitch is 8μm × 8μm with a fill factor of 57%, the photo-sensitivity is 0.8V/（lux · s） ,and the dynamic range is 50dB. Theoretical analysis and test results indicate that as the process is scaled down, a smaller pixel pitch reduces the sensitivity. A deep junction n-well/p-substrate photodiode with a reasonable fill factor and high sensitivity are more appropriate for submicron processes.

Comparison of displacement damage effects on the dark signal in CMOS image sensors induced by CSNS back-n and XAPR neutrons

This study investigates the effects of displacement damage on the dark signal of a pinned photodiode CMOS image sensor(CIS)following irradiation with back-streaming white neutrons from white neutron sources at the China spallation neutron source(CSNS)and Xi'an pulsed reactor(XAPR).The mean dark signal,dark signal non-uniformity(DSNU),dark signal distribution,and hot pixels of the CIS were compared between the CSNS back-n and XAPR neutron irradiations.The nonionizing energy loss and energy distribution of primary knock-on atoms in silicon,induced by neutrons,were calculated using the open-source package Geant4.An analysis combining experimental and simulation results showed a noticeable proportionality between the increase in the mean dark signal and the displacement damage dose(DDD).Additionally,neutron energies influence DSNU,dark signal distribution,and hot pixels.High neutron energies at the same DDD level may lead to pronounced dark signal non-uniformity and elevated hot pixel values.

Numerical Simulation and Analysis of Bipolar Junction Photogate Transistor for CMOS Image Sensor

A new photodetector--bipolar junction photogate transistor is presented for CMOS image sensor and its analytical model is also established.With the technical parameter of the 0.6μm CMOS process,the bipolar junction photogate transistor is analyzed and simulated.The simulated results illustrate that the bipolar junction photogate transistor has the similar characteristics of the traditional photogate transistor.The photocurrent density of the bipolar junction photogate transistor increases exponentially with the incidence light power due to introducing the injection p+n junction.Its characteristic of blue response is rather improved compared to the traditional photogate transistor that benefits to increase the color photograph made up of the red,the green,and the blue.

A New CMOS Image Sensor with a High Fill Factor and the Dynamic Digital Double Sampling Technique

A single CMOS image sensor based on a 0.35μm process along with its design and implementation is introduced. The architecture of an active pixel sensor is used in the chip. The fill factor of a pixel cell can reach 43%,higher than the traditional factor of 30%. Moreover, compared with the conventional method whose fixed pattern noise （FPN） is around 0.5%, a dynamic digital double sampling technique is developed, which possesses simpler circuit architecture and a better FPN suppression outcome. The CMOS image sensor chip is implemented in the 0.35μm mixed signal process of a Chartered by MPW. The experimental results show that the chip operates welt,with an FPN of about 0.17%.

Coordinate unification method of high-precision composite measurement in two dimensions

Multi-sensor coordinate unification in dimensional metrology is used in order to get holistic, more accurate and reliable information about a workpiece based on several or multiple measurement values from one or more sensors. Because of the problem that standard ball is deficient as a standard artifact in the coordinate unification of high-precision composite measurement in two dimensions （2D） , a new method is proposed in this paper which uses angle gauge blocks as standard artifacts to achieve coordinate unification between the image sensor and the tactile probe. By comparing the standard ball with the angle gauge block as a standard artifact, theoretical analysis and experimental results are given to prove that it is more precise and more convenient to use angle gauge blocks as standard artifacts to achieve coordinate unification of high-precision composite measurement in two dimensions.

Pixel and Column Fixed Pattern Noise Suppression Mechanism in CMOS Image Sensor

A double sampling circuit to eliminating fixed pattern noise(FPN) in CMOS image sensor (CIS) is presented. Double sampling is implemented by column switch capacitor amplifier directly, and offset compensation is added to the amplifier to suppress column FPN. The amplifier is embedded in a 64×64 CIS and successfully fabricated with chartered 0.35 μm process. Theory analysis and circuit simulation indicate that FPN can be suppressed from millivolt to microvolt. Test results show that FPN is smaller than one least-significant bit of 8 bit ADC. FPN is reduced to an acceptable level with double sampling technique implemented with switch capacitor amplifier.