Simulation Analysis of Transmission-Line Impedance Transformers for Petawatt-Class Pulsed Power Accelerators

Based on the transmission line code TLCODE, a 1D circuit model for a transmission- line impedance transformer was developed and the simulation results were compared with those in the literature. The model was used to quantify the efficiencies of voltage-transport, energy- transport and power-transport for a transmission-line impedance transformer as functions of ψ （the ratio of the output impedance to the input impedance of the transformer） and Г （the ratio of the pulse width to the one-way transit time of the transformer） under a large scale of m （the coefficient of the generalized exponential impedance profile）. Simulation results suggest that with the increase in Г, from 0 to ∞, the power transport efficiency first increases and then decreases. The maximum power transport efficiency can reach 90% or even higher for an exponential impedance profile （m = 1）. With a consideration of dissipative loss in the dielectric and electrodes of the transformer, two representative designs of the water-insulated transformer are investigated for the next generation of petawatt-class z-pinch drivers. It is found that the dissipative losses in the electrodes are negligibly small, below 0.1%, but the dissipative loss in the water dielectric is about 1% to 4%.

Analysis of Transforming dq Impedances of Different Converters to A Common Reference Frame in Complex Converter Networks

DQ impedance-based method has been widely used to study the stability of three-phase converter systems.As the dq impedance model of each converter depends on its local dq reference frame,the dq impedance modeling of complex converter networks gets complicated.Because the reference frames of different converters might not fully align,depending on the structure.Thus,in order to find an accurate impedance model of a complex network for stability analysis,converting the impedances of different converters into a common reference frame is required.This paper presents a comprehensive investigation on the transformation of dq impedances to a common reference frame in complex converter networks.Four different methods are introduced and analyzed in a systematic way.Moreover,a rigorous comparison among these approaches is carried out,where the method with the simplest transformation procedure is finally suggested for the modeling of complex converter networks.The performed analysis is verified by injecting two independent small-signal perturbations into the d and the q axis,and doing a point-by-point impedance measurement.

Optimization of Cavity Combination for 20 MA LTD-Based Accelerators

Based on a transmission line code, a circuit model is proposed that could serve as the basic method for the analysis of linear transformer driver （LTD）-based accelerators. By using 1 MA, 100 kV LTD cavities, the peak load current is optimized for a total of N cavities between 500 and 1200. The simulation results suggest that, with the same number of cavities, the peak current changes obviously with the types of combinations, and the maximum change can be as large as 1.2 MA. The results also show that, for the cases considered, the optimized peak current as a function of the total number of cavities agrees with the exponential associate, and the peak current for one level LTD cannot be enhanced infinitely. Furthermore, it is found that, to obtain a 20 MA peak load current, at least 1029 LTD cavities （49 in series and 21 in parallel connection） are needed. Finally, the typical parameters of the optimized design are compared to those of the existing Z accelerator.

CMOS high linearity PA driver with an on-chip transformer for W-CDMA application

A fully integrated high linearity differential power amplifier driver with an on-chip transformer in a standard 0.13-μm CMOS process for W-CDMA application is presented.The transformer not only accomplishes output impedance matching,but also acts as a balun for converting differential signals to single-ended ones.Under a supply voltage of 3.3 V,the measured maximum power is larger than 17 dBm with a peak power efficiency of 21%.The output power at the 1-dB compression point and the power gain are 12.7 dBm and 13.2 dB,respectively. The die size is 0.91×1.12 mm;.