In-loop filtering significantly helps detect and remove blocking artifacts across block boundaries in low bitrate coded High Efficiency Video Coding(HEVC)frames and improves its subjective visual quality in multimedia...In-loop filtering significantly helps detect and remove blocking artifacts across block boundaries in low bitrate coded High Efficiency Video Coding(HEVC)frames and improves its subjective visual quality in multimedia services over communication networks.However,on faster processing of the complex videos at a low bitrate,some visible artifacts considerably degrade the picture quality.In this paper,we proposed a four-step fuzzy based adaptive deblocking filter selection technique.The proposed method removes the quantization noise,blocking artifacts and corner outliers efficiently for HEVC coded videos even at low bit-rate.We have considered Y(luma),U(chromablue),and V(chroma-red)components parallelly.Finally,we have developed a fuzzy system to detect blocking artifacts and use adaptive filters as per requirement in all four quadrants,namely up 45◦,down 45◦,up 135◦,and down 135◦across horizontal and vertical block boundaries.In this context,experimentation is done on a wide variety of videos.An objective and subjective analysis is carried out with MATLAB software and Human Visual System(HVS).The proposed method substantially outperforms existing postprocessing deblocking techniques in terms of YPSNR and BD_rate.In the proposed method,we achieved 0.32–0.97 dB values of YPSNR.Our method achieved a BD_rate of+1.69%for the luma component,−0.18%(U)and−1.99%(V)for chroma components,respectively,with respect to the stateof-the-art methods.The proposed method proves to have low computational complexity and has better parallel processing,hence suitable for a real-time system in the near future.展开更多
Based on the flexible quadtree partition structure of coding tree units(CTUs),the deblocking filter(DBF)in high efficiency video coding(HEVC)consumes a lot of resources when implemen-ted by hardware.It is difficult to...Based on the flexible quadtree partition structure of coding tree units(CTUs),the deblocking filter(DBF)in high efficiency video coding(HEVC)consumes a lot of resources when implemen-ted by hardware.It is difficult to achieve flexible switching between different sizes of coding blocks.Aiming at this problem,a reconfigurable implementation of DBF is proposed.Based on the dynamic programmable reconfigurable video array processor(DPRAP)with context switch reconfiguration mechanism,the runtime flexible switching of two coding block sizes is realized.The experimental results show that the highest work-frequency reaches 151.4 MHz.Compared with the dedicated hardware architecture scheme,the resource consumption can be reduced by 28.1%while realizing the dynamic switching between algorithms of two coding block sizes.Compared with the results of HM16.0,by using a complete I-frame for testing,the average peak signal-to-noise ratio(PSNR)of the reconfigurable implementation proposed in this paper has increased by 3.0508 dB,the coding quality has improved to a certain extent.展开更多
去块滤波算法是高效视频编码标准(high-efficiency video coding,HEVC)的重要组成部分,专用硬件实现的去块滤波电路结构难以满足不断革新的算法需求,可重构计算兼具计算高效性和编程灵活性成为研究热点。基于指令流与数据流混合驱动可...去块滤波算法是高效视频编码标准(high-efficiency video coding,HEVC)的重要组成部分,专用硬件实现的去块滤波电路结构难以满足不断革新的算法需求,可重构计算兼具计算高效性和编程灵活性成为研究热点。基于指令流与数据流混合驱动可重构视频阵列处理器(reconfigurable video array processor,RVAP),提出一种可重构的HEVC编码去块滤波电路的并行化实现方法,依据数据流图分析实现去块滤波算法的最大化并行,提高计算效率;通过强/弱滤波方式的灵活切换,提高计算资源利用率。实验结果表明,所提方法在满足算法灵活切换和计算速度要求的同时,硬件资源减少了47.6%,时钟频率达167 MHz。展开更多
文摘In-loop filtering significantly helps detect and remove blocking artifacts across block boundaries in low bitrate coded High Efficiency Video Coding(HEVC)frames and improves its subjective visual quality in multimedia services over communication networks.However,on faster processing of the complex videos at a low bitrate,some visible artifacts considerably degrade the picture quality.In this paper,we proposed a four-step fuzzy based adaptive deblocking filter selection technique.The proposed method removes the quantization noise,blocking artifacts and corner outliers efficiently for HEVC coded videos even at low bit-rate.We have considered Y(luma),U(chromablue),and V(chroma-red)components parallelly.Finally,we have developed a fuzzy system to detect blocking artifacts and use adaptive filters as per requirement in all four quadrants,namely up 45◦,down 45◦,up 135◦,and down 135◦across horizontal and vertical block boundaries.In this context,experimentation is done on a wide variety of videos.An objective and subjective analysis is carried out with MATLAB software and Human Visual System(HVS).The proposed method substantially outperforms existing postprocessing deblocking techniques in terms of YPSNR and BD_rate.In the proposed method,we achieved 0.32–0.97 dB values of YPSNR.Our method achieved a BD_rate of+1.69%for the luma component,−0.18%(U)and−1.99%(V)for chroma components,respectively,with respect to the stateof-the-art methods.The proposed method proves to have low computational complexity and has better parallel processing,hence suitable for a real-time system in the near future.
基金Supported by the National Natural Science Foundation of China(No.61834005,61772417,61802304,61602377,61874087,61634004)the Shaanxi Province Key R&D Plan(No.2021GY-029,2021KW-16).
文摘Based on the flexible quadtree partition structure of coding tree units(CTUs),the deblocking filter(DBF)in high efficiency video coding(HEVC)consumes a lot of resources when implemen-ted by hardware.It is difficult to achieve flexible switching between different sizes of coding blocks.Aiming at this problem,a reconfigurable implementation of DBF is proposed.Based on the dynamic programmable reconfigurable video array processor(DPRAP)with context switch reconfiguration mechanism,the runtime flexible switching of two coding block sizes is realized.The experimental results show that the highest work-frequency reaches 151.4 MHz.Compared with the dedicated hardware architecture scheme,the resource consumption can be reduced by 28.1%while realizing the dynamic switching between algorithms of two coding block sizes.Compared with the results of HM16.0,by using a complete I-frame for testing,the average peak signal-to-noise ratio(PSNR)of the reconfigurable implementation proposed in this paper has increased by 3.0508 dB,the coding quality has improved to a certain extent.
文摘去块滤波算法是高效视频编码标准(high-efficiency video coding,HEVC)的重要组成部分,专用硬件实现的去块滤波电路结构难以满足不断革新的算法需求,可重构计算兼具计算高效性和编程灵活性成为研究热点。基于指令流与数据流混合驱动可重构视频阵列处理器(reconfigurable video array processor,RVAP),提出一种可重构的HEVC编码去块滤波电路的并行化实现方法,依据数据流图分析实现去块滤波算法的最大化并行,提高计算效率;通过强/弱滤波方式的灵活切换,提高计算资源利用率。实验结果表明,所提方法在满足算法灵活切换和计算速度要求的同时,硬件资源减少了47.6%,时钟频率达167 MHz。
