Improved device reliability in organic light emitting devices by controlling the etching of indium zinc oxide anode

A controllable etching process for indium zinc oxide （IZO） films was developed by using a weak etchant of oxalic acid with a slow etching ratio. With controllable etching time and temperature, a patterned IZO electrode with smoothed surface morphology and slope edge was achieved. For the practical application in organic light emitting devices （OLEDs）, a sup- pression of the leak current in the current-voltage characteristics of OLEDs was observed. It resulted in a 1.6 times longer half lifetime in the IZO-based OLEDs compared to that using an indium tin oxide （ITO） anode etched by a conventional strong etchant of aqua regia.

Temperature-Dependent Drain Current Characteristics and Low Frequency Noises in Indium Zinc Oxide Thin Fihn Transistors

The I-V characteristics and low frequency noises for indium zinc oxide thin film transistor are measured between 250 K and 430 K. The experimental results show that drain currents are thermally activated following the Meyer Neldel rule, which can be explained by the multiple-trapping process. Moreover, the field effect electron mobility firstly increases, and then decreases with the increase of temperature, while the threshold voltage decreases with increasing the temperature. The activation energy and the density of localized gap states are extracted. A noticeable increase in the density of localized states is observed at the higher temperatures.

Low-Frequency Noise in Amorphous Indium Zinc Oxide Thin Film Transistors with Aluminum Oxide Gate Insulator

Low-frequency noise（LFN） in all operation regions of amorphous indium zinc oxide（a-IZO） thin film transistors（TFTs） with an aluminum oxide gate insulator is investigated. Based on the LFN measured results, we extract the distribution of localized states in the band gap and the spatial distribution of border traps in the gate dielectric,and study the dependence of measured noise on the characteristic temperature of localized states for a-IZO TFTs with Al2 O3 gate dielectric. Further study on the LFN measured results shows that the gate voltage dependent noise data closely obey the mobility fluctuation model, and the average Hooge＇s parameter is about 1.18×10^-3.Considering the relationship between the free carrier number and the field effect mobility, we simulate the LFN using the △N-△μ model, and the total trap density near the IZO/oxide interface is about 1.23×10^18 cm^-3eV^-1.

Threshold voltage tuning and printed complementary transistors and inverters based on thin films of carbon nanotubes and indium zinc oxide

Carbon nanotubes （CNTs） have emerged as an important material for printed macroelectronics. However, achieving printed complementary macroelectronics solely based on CNTs is difficult because it is still challenging to make reliable n-type CNT transistors. In this study, we report threshold voltage （Vth） tuning and printing of complementary transistors and inverters composed of thin films of CNTs and indium zinc oxide （IZO） as p-type and n-type transistors, respectively. We have optimized the Vth of p-type transistors by comparing Ti/Au and Ti/Pd as source/drain electrodes, and observed that CNT transistors with Ti/Au electrodes exhibited enhancement mode operation （Vth 〈 0）. In addition, the optimized In：Zn ratio offers good n-type transistors with high on-state current （Ion） and enhancement mode operation （Vth 〉 0）. For example, an In：Zn ratio of 2：1 yielded an enhancement mode n-type transistor with Vth - 1 V and Ion of 5.2 μA. Furthermore, by printing a CNT thin film and an IZO thin film on the same substrate, we have fabricated a complementary inverter with an output swing of 99.6% of the supply voltage and a voltage gain of 16.9. This work shows the promise of the hybrid integration of p-type CNT and n-type IZO for complementary transistors and circuits.

Temperature-dependent bias-stress-induced electrical instability of amorphous indium-gallium-zinc-oxide thin-film transistors

The time and temperature dependence of threshold voltage shift under positive-bias stress（PBS） and the following recovery process are investigated in amorphous indium-gallium-zinc-oxide（a-IGZO） thin-film transistors. It is found that the time dependence of threshold voltage shift can be well described by a stretched exponential equation in which the time constant τ is found to be temperature dependent. Based on Arrhenius plots, an average effective energy barrier Eτ stress= 0.72 eV for the PBS process and an average effective energy barrier Eτ recovery= 0.58 eV for the recovery process are extracted respectively. A charge trapping/detrapping model is used to explain the threshold voltage shift in both the PBS and the recovery process. The influence of gate bias stress on transistor performance is one of the most critical issues for practical device development.

Double-layer indium doped zinc oxide for silicon thin-film solar cell prepared by ultrasonic spray pyrolysis

Indium doped zinc oxide （ZnO：In） thin films were prepared by ultrasonic spray pyrolysis on corning eagle 2000 glass substrate. 1 and 2 at.% indium doped single-layer ZnO：In thin films with different amounts of acetic acid added in the initial solution were fabricated. The 1 at.% indium doped single-layers have triangle grains. The 2 at.% indium doped single-layer with 0.18 acetic acid adding has the resistivity of 6.82 × 10^-3 Ω. cm and particle grains. The doublelayers structure is designed to fabricate the ZnO：In thin film with low resistivity （2.58 × 10^-3 Ω. cm） and good surface morphology. It is found that the surface morphology of the double-layer ZnO：In film strongly depends on the substratelayer, and the second-layer plays a large part in the resistivity of the doublewlayer ZnO：In thin film. Both total and direct transmittances of the double-layer ZnO：In film are above 80% in the visible light region. Single junction a-Si：H solar cell based on the double-layer ZnO：In as front electrode is also investigated.

Contact resistance asymmetry of amorphous indium–gallium–zinc–oxide thin-film transistors by scanning Kelvin probe microscopy

In this work, a method based on scanning Kelvin probe microscopy is proposed to separately extract source/drain（S/D） series resistance in operating amorphous indium–gallium–zinc–oxide（a-IGZO） thin-film transistors. The asymmetry behavior of S/D contact resistance is deduced and the underlying physics is discussed. The present results suggest that the asymmetry of S/D contact resistance is caused by the difference in bias conditions of the Schottky-like junction at the contact interface induced by the parasitic reaction between contact metal and a-IGZO. The overall contact resistance should be determined by both the bulk channel resistance of the contact region and the interface properties of the metalsemiconductor junction.

High-throughput fabrication and semi-automated characterization of oxide thin film transistors

High throughput experimental methods are known to accelerate the rate of research,development,and deployment of electronic materials.For example,thin films with lateral gradients in composition,thickness,or other parameters have been used alongside spatially-resolved characterization to assess how various physical factors affect the material properties under varying measurement conditions.Similarly,multi-layer electronic devices that contain such graded thin films as one or more of their layers can also be characterized spatially in order to optimize the performance.In this work,we apply these high throughput experimental methods to thin film transistors(TFTs),demonstrating combinatorial channel layer growth,device fabrication,and semi-automated characterization using sputtered oxide TFTs as a case study.We show that both extrinsic and intrinsic types of device gradients can be generated in a TFT library,such as channel thickness and length,channel cation compositions,and oxygen atmosphere during deposition.We also present a semi-automated method to measure the 44 devices fabricated on a 50 mm×50 mm substrate that can help to identify properly functioning TFTs in the library and finish the measurement in a short time.Finally,we propose a fully automated characterization system for similar TFT libraries,which can be coupled with high throughput data analysis.These results demonstrate that high throughput methods can accelerate the investigation of TFTs and other electronic devices.

Influence of white light illumination on the performance of a-IGZO thin film transistor under positive gate-bias stress

The influence of white light illumination on the stability of an amorphous In GaZnO thin film transistor is investigated in this work. Under prolonged positive gate bias stress, the device illuminated by white light exhibits smaller positive threshold voltage shift than the device stressed under dark. There are simultaneous degradations of field-effect mobility for both stressed devices, which follows a similar trend to that of the threshold voltage shift. The reduced threshold voltage shift under illumination is explained by a competition between bias-induced interface carrier trapping effect and photon-induced carrier detrapping effect. It is further found that white light illumination could even excite and release trapped carriers originally exiting at the device interface before positive gate bias stress, so that the threshold voltage could recover to an even lower value than that in an equilibrium state. The effect of photo-excitation of oxygen vacancies within the a-IGZO film is also discussed.

Ultra‑Transparent and Multifunctional IZVO Mesh Electrodes for Next‑Generation Flexible Optoelectronics

Mechanically durable transparent electrodes are essential for achieving long-term stability in flexible optoelectronic devices.Furthermore,they are crucial for applications in the fields of energy,display,healthcare,and soft robotics.Conducting meshes represent a promising alternative to traditional,brittle,metal oxide conductors due to their high electrical conductivity,optical transparency,and enhanced mechanical flexibility.In this paper,we present a simple method for fabricating an ultra-transparent conducting metal oxide mesh electrode using selfcracking-assisted templates.Using this method,we produced an electrode with ultra-transparency(97.39%),high conductance(Rs=21.24Ωsq^(−1)),elevated work function(5.16 eV),and good mechanical stability.We also evaluated the effectiveness of the fabricated electrodes by integrating them into organic photovoltaics,organic light-emitting diodes,and flexible transparent memristor devices for neuromorphic computing,resulting in exceptional device performance.In addition,the unique porous structure of the vanadium-doped indium zinc oxide mesh electrodes provided excellent flexibility,rendering them a promising option for application in flexible optoelectronics.

Simulation study on the active layer thickness and the interface of a-IGZO-TFT with double active layers

In this paper, ATLAS 2D device simulator of SILVACO was used for device simulation of inverted- staggered thin film transistor using amorphous indium gallium zinc oxide as active layer （a-IGZO-TFT） with double active layers, based on the density of states （DOS） model of amorphous material. The change of device performance induced by the thickness variation of each active layer was studied, and the interface between double active layers was analyzed. The best performance was found when the interface was near the edge of the channel, by optimizing the thickness of each active layers, the high performance device of threshold voltage （Vth） = -0.89 V, sub-threshold swing （SS）= 0.27, on/off current ratio （IoN/IoFF） = 6.98 × 10^14 was obtained.