A 31.7-GHz high linearity millimeter-wave CMOS LNA using an ultra-wideband input matching technique

A CMOS low-noise amplifier （LNA） operating at 31.7 GHz with a low input return loss （S11） and high linearity is proposed. The wideband input matching was achieved by employing a simple LC compounded network to generate more than one S11 dip below -10 dB level. The principle of the matching circuit is analyzed and the critical factors with significant effect on the input impedance （Zin） are determined. The relationship between the input impedance and the load configuration is explored in depth, which is seldom concentrated upon previously. In addition, the noise of the input stage is modeled using a cascading matrix instead of conventional noise theory. In this way Zin and the noise figure can be calculated using one uniform formula. The linearity analysis is also performed in this paper. Finally, an LNA was designed for demonstration purposes. The measurement results show that the proposed LNA achieves a maximum power gain of 9.7 dB and an input return loss of 〈 -10 dB from 29 GHz to an elevated frequency limited by the measuring range. The measured input-referred compression point and the third order inter-modulation point are -7.8 and 5.8 dBm, respectively. The LNA is fabricated in a 90-nm RF CMOS process and occupies an area of 755 × 670μm2 including pads. The whole circuit dissipates a DC power of 24 mW from one 1.3-V supply.

A NOVEL SIMULTANEOUS NOISE AND INPUT VSWR MATCHING TECHNIQUE FOR BROADBAND LNA

The Simultaneous Noise and Input Voltage Standing Wave Ratio (VSWR) Matching (SNIM) condition for Low Noise Amplifier (LNA), in principle, can only be satisfied at a single fre-quency. In this paper, by analyzing the fundamental limitations of the narrowband SNIM technique for the broadband application, the authors present a broadband SNIM LNA systematic design technique. The designed LNA guided by the proposed methodology achieves 10 dB power gain with a low Noise Figure of 0.53 dB. Meanwhile, it provides wonderful input matching of 27 dB across the fre-quency range of 3～5 GHz. Therefore, broadband SNIM is realized.

MATCHED QUEUEING SYSTEMS WITH A DOUBLE INPUT

In this paper, we study the matched queueing system with a double input, MoM/PH/1,where the two inputs are two independent Poisson processes, and the service time is of PH-distribution.The L.S. transforms and the expectations of the distributions of occupation time and virtual waiting time of the type-Ⅰ customer are derived.The probability that the server is working, the mean non-idle period, and the mean busy period are also derived. The related algorithms are given with numerical results.

An inductorless multi-mode RF front end for GNSS receiver in 55 nm CMOS

An inductorless multi-mode RF front end for a global navigation satellite system （GNSS） receiver is presented. Unlike the traditional topology of a low noise amplifier （LNA）, the inductorless current-mode noise- canceling LNA is applied in this design. The high-impedance-input radio frequency amplifier （RFA） further am- plifies the GNSS signals and changes the single-end signal path into fully differential. The passive mixer down- converts the signals to the intermediate frequency （IF） band and conveys the signals to the analogue blocks. The local oscillator （LO） buffer divides the output frequency of the voltage controlled oscillator （VCO） and generates 25%-duty-cycle quadrature square waves to drive the mixer. Our measurement results display that the implemented RF front end achieves good overall performance while consuming only 6.7 mA from 1.2 V supply. The input return loss is better than -26 dB and the ultra low noise figure of 1.43 dB leads to high sensitivity of the GNSS receiver. The input 1 dB compression point is -43 dBm at the high gain of 48 dB. The designed circuit is fabricated in 55 nm CMOS technology and the die area, which is much smaller than traditional circuit, is around 220×280 μm2.

Design and optimization of CMOS LNA with ESD protection for 2.4 GHz WSN application

A new optimization method of a source inductive degenerated low noise amplifier（LNA） with electrostatic discharge protection is proposed.It can achieve power-constrained simultaneous noise and input matching. An analysis of the input impedance and the noise parameters is also given.Based on the developed method,a 2.4 GHz LNA for wireless sensor network application is designed and optimized using 0.18-μm RF CMOS technology. The measured results show that the LNA achieves a noise figure of 1.59 dB,a power gain of 14.12 dB, an input 1 dB compression point of-8 dBm and an input third-order intercept point of 1 dBm.The DC current is 4 mA under a supply of 1.8 V.