As an outstanding representative of layered materials,molybdenum disulfide(MoS_(2))has excellent physical properties,such as high carrier mobility,stability,and abundance on earth.Moreover,its reasonable band gap and ...As an outstanding representative of layered materials,molybdenum disulfide(MoS_(2))has excellent physical properties,such as high carrier mobility,stability,and abundance on earth.Moreover,its reasonable band gap and microelectronic compatible fabrication characteristics makes it the most promising candidate in future advanced integrated circuits such as logical electronics,flexible electronics,and focal-plane photodetector.However,to realize the all-aspects application of MoS_(2),the research on obtaining high-quality and large-area films need to be continuously explored to promote its industrialization.Although the MoS_(2)grain size has already improved from several micrometers to sub-millimeters,the high-quality growth of wafer-scale MoS_(2)is still of great challenge.Herein,this review mainly focuses on the evolution of MoS_(2)by including chemical vapor deposition,metal–organic chemical vapor deposition,physical vapor deposition,and thermal conversion technology methods.The state-of-the-art research on the growth and optimization mechanism,including nucleation,orientation,grain,and defect engineering,is systematically summarized.Then,this review summarizes the wafer-scale application of MoS_(2)in a transistor,inverter,electronics,and photodetectors.Finally,the current challenges and future perspectives are outlined for the wafer-scale growth and application of MoS_(2).展开更多
The water Cherenkov detector array(WCDA) is an important part of the large high-altitude air shower observatory(LHAASO),which is in a research and development phase.The central scientific goal of LHAASO is to explore ...The water Cherenkov detector array(WCDA) is an important part of the large high-altitude air shower observatory(LHAASO),which is in a research and development phase.The central scientific goal of LHAASO is to explore the origin of high-energy cosmic rays of the universe and to push forward the frontier of new physics.To simplify the WCDA's readout electronics,a prototype of a front-end readout for an application-specific integrated circuit(ASIC) is designed based on the timeover-threshold method to achieve charge-to-time conversion.High-precision time measurement and charge measurement are necessary over a full dynamic range[1-4000photoelectrons(P.E.)].To evaluate the performance of this ASIC,a test system is designed that includes the front-end ASIC test module,digitization module,and test software.The first module needs to be customized for different ASIC versions,whereas the digitization module and test software are tested for general-purpose use.In the digitization module,a field programmable gate array-based time-todigital converter is designed with a bin size of 333 ps,which also integrates an inter-integrated circuit to configure the ASIC test module,and a universal serial bus interface is designed to transfer data to the remote computer.Test results indicate that the time resolution is better than 0.5 ns,and the charge resolution is better than 30%root mean square(RMS) at 1 P.E.and 3%RMS at 4000 P.E.,which are beyond the application requirements.展开更多
Through-silicon-via (TSV) to TSV crosstalk noise is one of the key factors affecting the signal integrity of three- dimensional integrated circuits (3D ICs). Based on the frequency dependent equivalent electrical ...Through-silicon-via (TSV) to TSV crosstalk noise is one of the key factors affecting the signal integrity of three- dimensional integrated circuits (3D ICs). Based on the frequency dependent equivalent electrical parameters for the TSV channel, an analytical crosstalk noise model is established to capture the TSV induced crosstalk noise. The impact of various design parameters including insulation dielectric, via pitch, via height, silicon conductivity, and terminal impedance on the crosstalk noise is analyzed with the proposed model. Two approaches are proposed to alleviate the TSV noise, namely, driver sizing and via shielding, and the SPICE results show 241 rnV and 379 mV reductions in the peak noise voltage, respectively.展开更多
Metal-insulator-metal (MIM) capacitors with atomic-layer-deposited Al2O3 dielectric and reactively sputtered TaN electrodes in application to radio frequency integrated circuits have been characterized electrically....Metal-insulator-metal (MIM) capacitors with atomic-layer-deposited Al2O3 dielectric and reactively sputtered TaN electrodes in application to radio frequency integrated circuits have been characterized electrically. The capacitors exhibit a high density of about 6.05 fF/μm^2, a small leakage current of 4.8 × 10^-8 A/cm^2 at 3 V, a high breakdown electric field of 8.61 MV/cm as well as acceptable voltage coefficients of capacitance (VCCs) of 795 ppm/V2 and 268ppm/V at 1 MHz. The observed properties should be attributed to high-quality Al2O3 film and chemically stable TaN electrodes. Further, a logarithmically linear relationship between quadratic VCC and frequency is observed due to the change of relaxation time with carrier mobility in the dielectric. The conduction mechanism in the high field ranges is dominated by the Poole-Frenkel emission, and the leakage current in the low field ranges is likely to be associated with trap-assisted tunnelling. Meanwhile, the Al2O3 dielectric presents charge trapping under low voltage stresses, and defect generation under high voltage stresses, and it has a hard-breakdown performance.展开更多
The basic indexes of all-optical integrated photonic circuits include high-density integration,ultrafast response and ultralow energy consumption.Traditional methods mainly adopt conventional micro/nano-structures.The...The basic indexes of all-optical integrated photonic circuits include high-density integration,ultrafast response and ultralow energy consumption.Traditional methods mainly adopt conventional micro/nano-structures.The overall size of the circuit is large,usually reaches hundreds of microns.Besides,it is difficult to balance the ultrafast response and ultra-low energy consumption problem,and the crosstalk between two traditional devices is difficult to overcome.Here,we propose and experimentally demonstrate an approach based on inverse design method to realize a high-density,ultrafast and ultra-low energy consumption integrated photonic circuit with two all-optical switches controlling the input states of an all-optical XOR logic gate.The feature size of the whole circuit is only 2.5μm×7μm,and that of a single device is 2μm×2μm.The distance between two adjacent devices is as small as 1.5μm,within wavelength magnitude scale.Theoretical response time of the circuit is 150 fs,and the threshold energy is within 10 fJ/bit.We have also considered the crosstalk problem.The circuit also realizes a function of identifying two-digit logic signal results.Our work provides a new idea for the design of ultrafast,ultra-low energy consumption all-optical devices and the implementation of high-density photonic integrated circuits.展开更多
Dear Editor: There is accumulating evidence that human blood electronic circuit components and their application circuits become more and more important to cyborg implant/engineering, man-machine interface, hu- man ...Dear Editor: There is accumulating evidence that human blood electronic circuit components and their application circuits become more and more important to cyborg implant/engineering, man-machine interface, hu- man disease detection and healing, and artificial brain evolutionusl. Here, we report the first development of human plasma-based amplifier circuit in the dis- crete as well as integrated circuit (IC) configuration mode. Electrolytes in the human blood contain an enormous number of charge carriers such as positive and negative molecule/atom ions, which are electri- cally conducting media and therefore can be utilized for developing electronic circuit components and their application circuits. These electronic circuits obvi- ously have very high application impact potential towards bio-medical engineering and medical science and technology.展开更多
A 330-500 GHz zero-biased broadband monolithic integrated tripler is reported. The measured results show that the maximum efficiency and the maximum output power are 2% and 194μW at 348 GHz. The saturation characteri...A 330-500 GHz zero-biased broadband monolithic integrated tripler is reported. The measured results show that the maximum efficiency and the maximum output power are 2% and 194μW at 348 GHz. The saturation characteristic test shows that the output i dB compression point is about -8.5 dBm at 334 GHz and the maximum efficiency is obtained at the point, which is slightly below the 1 dB compression point. Compared with the conventional hybrid integrated circuit, a major advantage of the monolithic integrated circuit is the significant improvement of reliability and consistency. In this work, a terahertz monolithic frequency multiplier at this band is designed and fabricated.展开更多
We formulate a “Moore’s law” for photonic integrated circuits (PICs) and their spatial integration density using two methods. One is decomposing the integrated photonics devices of diverse types into equivalent bas...We formulate a “Moore’s law” for photonic integrated circuits (PICs) and their spatial integration density using two methods. One is decomposing the integrated photonics devices of diverse types into equivalent basic elements, which makes a comparison with the generic elements of electronic integrated circuits more meaningful. The other is making a complex compo- nent equivalent to a series of basic elements of the same functionality, which is used to calculate the integration density for func- tional components realized with different structures. The results serve as a benchmark of the evolution of PICs and we can con- clude that the density of integration measured in this way roughly increases by a factor of 2 per year. The prospects for a continued increase of spatial integration density are discussed.展开更多
In order to utilize integrated passive technology in printed circuit boards (PCBs),manufacturing processing for integrated resistors by lamination method was investigated.Integrated resistors fabricated from Ohmega te...In order to utilize integrated passive technology in printed circuit boards (PCBs),manufacturing processing for integrated resistors by lamination method was investigated.Integrated resistors fabricated from Ohmega technologies in the experiment were 1 408 pieces per panel with four different patterns A,B,C and D and four resistance values of 25,50,75 and 100 Ω.Six panel per batch and four batches were performed totally.The testing was done for 960 pieces of integrated resistors randomly selected with the same size.The value distribution ranges and the relative standard deviation (RSD) show that the scatter degree of the resistance decreases with the resistor size increasing and/or with the resistance increasing.Patterns D with resistance of 75 and 100 Ω for four patterns have the resistance value variances less than 10%.Patterns C and D with resistance of 100 Ω have the manufacturing tolerance less than 10%.The process capabilities are from about 0.6 to 1.6 for the designed testing patterns,which shows that the integrated resistors fabricated have the potential to be used in multilayer PCBs in the future.展开更多
Since the proposal of the concept of photonic integratedcircuits (PICs), tremendous progress has been made. In2005, Infinera Corp. rolled out the first commercial PICs, inwhich hundreds of optical functions were integ...Since the proposal of the concept of photonic integratedcircuits (PICs), tremendous progress has been made. In2005, Infinera Corp. rolled out the first commercial PICs, inwhich hundreds of optical functions were integrated onto asmall form factor chip for wavelength division multiplexing(WDM) systems[1], then a monolithically integrated 10 ×10 Gb/s WDM chip has been demonstrated, the channelnumber is ten[2]. Like ICs, large-scale PICs (LS-PICs) will besure to be pursued. However, there are still some generalchallenges associated with LS-PICs. The challenges for III–V(mainly InP) PICs is the semiconductor process, which is notmature for LS-PICs. Up to now, the channel number in commercialIII–V WDM PICs by Infinera is still about ten or less.For silicon photonics, the challenge is the silicon based lightsource. The low cost and mature solution for silicon lasers isstill unavailable and only 4 × 25 Gb/s PICs are deployed byIntel Corp. after 18-year R&D investment. Thus it is still unavailablefor practical LS-PICs in the present times.展开更多
The integrated circuit chip with high performance has a high sensitivity to the defects in manufacturing environments.When there are defects on a wafer,the defects may lead to the degradation of chip performance.It is...The integrated circuit chip with high performance has a high sensitivity to the defects in manufacturing environments.When there are defects on a wafer,the defects may lead to the degradation of chip performance.It is necessary to design effective detection approaches for the defects in order to ensure the reliability of wafer.In this paper,a new method based on image boundary extraction is presented for the detection of defects on a wafer.The method uses island model genetic algorithms to perform the segmentation of wafer images,and gets the optimal threshold values.The island model genetic algorithm uses two distinct subpopulations,it is a coarse grain parallel model.The individuals migration can occur between the two subpopulations to share genetic materials.A lot of experimental results show that the defect detection method proposed in this paper can obtain the features of defects effectively.展开更多
The method and procedure of realizing parameter statistical correlation analysis ofbipolar analog IC’s are given,and the statistical model of parameter are constructed with doubleparameters(B_F,R_S).Based on the comp...The method and procedure of realizing parameter statistical correlation analysis ofbipolar analog IC’s are given,and the statistical model of parameter are constructed with doubleparameters(B_F,R_S).Based on the comparison and analysis of the circuit characteristics,it isshown that the method can be used for analysis and design of bipolar IC’s.展开更多
Analysis approach and formulas for the transmission properties of uniform multicon-ductor interconnecting buses in high-speed integrated circuits are presented in this article. And further, by using a network approach...Analysis approach and formulas for the transmission properties of uniform multicon-ductor interconnecting buses in high-speed integrated circuits are presented in this article. And further, by using a network approach, a tapered bus system can be analyzed as a set of cascaded uniform buses with slightly different strip widths. Obtained results are in good agreement with the experimental data.展开更多
This paper analyses the transient characteristics of high temperature CMOS inverters and gate circuits, and gives the computational formulas of their rise time, fall time and delay time. It may be concluded that the t...This paper analyses the transient characteristics of high temperature CMOS inverters and gate circuits, and gives the computational formulas of their rise time, fall time and delay time. It may be concluded that the transient characteristics of CMOS inverters and gate circuits deteriorate due to the reduction of carrier mobilities and threshold voltages of MOS transistors and the increase of leakage currents of MOS transistors drain terminal pn junctions. The calculation results can explain the experimental phenomenon.展开更多
Recently, resonant AC/DC converter has been accepted by the industry. However, the efficiency will be decreased at light load. So, a novel topology with critical controlling mode combined with resonant ones is propose...Recently, resonant AC/DC converter has been accepted by the industry. However, the efficiency will be decreased at light load. So, a novel topology with critical controlling mode combined with resonant ones is proposed in this paper. The new topology can correspond to a 90 plus percent of power converting. So,a novel topology of an state of-art integrated circuit, which can be used as power management circuit, has been designed based on the above new topology. A simulator which is specific suitable for the power controller has been founded in this work and it has been used for the simulation of the novel architecture and the proposed integrated circuit.展开更多
Hybrid integration ofⅢ-Ⅴand ferroelectric materials is being broadly adopted to enhance functionalities in silicon photonic integrated circuits(PICs).Bonding and transfer printing have been the popular approaches fo...Hybrid integration ofⅢ-Ⅴand ferroelectric materials is being broadly adopted to enhance functionalities in silicon photonic integrated circuits(PICs).Bonding and transfer printing have been the popular approaches for integration of III–V gain media with silicon PICs.Similar approaches are also being considered for ferroelectrics to enable larger RF modulation bandwidths,higher linearity,lower optical loss integrated optical modulators on chip.In this paper,we review existing integration strategies ofⅢ-Ⅴmaterials and present a route towards hybrid integration of bothⅢ-Ⅴand ferroelectrics on the same chip.We show that adiabatic transformation of the optical mode between hybrid ferroelectric and silicon sections enables efficient transfer of optical modal energies for maximum overlap of the optical mode with the ferroelectric media,similar to approaches adopted to maximize optical overlap with the gain section,thereby reducing lasing thresholds for hybridⅢ-Ⅴintegration with silicon PICs.Preliminary designs are presented to enable a foundry compatible hybrid integration route of diverse functionalities on silicon PICs.展开更多
Programmable photonic waveguide meshes can be programmed into many different circuit topologies and thereby provide a variety of functions.Due to the complexity of the signal routing in a general mesh,a particular syn...Programmable photonic waveguide meshes can be programmed into many different circuit topologies and thereby provide a variety of functions.Due to the complexity of the signal routing in a general mesh,a particular synthesis algorithm often only accounts for a specific function with a specific cell configuration.In this paper,we try to synthesize the programmable waveguide mesh to support multiple configurations with a more general digital signal processing platform.To show the feasibility of this technique,photonic waveguide meshes in different configurations(square,triangular and hexagonal meshes)are designed to realize optical signal interleaving with arbitrary duty cycles.The digital signal processing(DSP)approach offers an effective pathway for the establishment of a general design platform for the software-defined programmable photonic integrated circuits.The use of well-developed DSP techniques and algorithms establishes a link between optical and electrical signals and makes it convenient to realize the computer-aided design of optics–electronics hybrid systems.展开更多
Glaucoma is a neurodegenerative condition that is the leading cause of irreversible blindness worldwide. Elevated intraocular pressure (IOP) is the main risk factor for the development and progression of the disease. ...Glaucoma is a neurodegenerative condition that is the leading cause of irreversible blindness worldwide. Elevated intraocular pressure (IOP) is the main risk factor for the development and progression of the disease. Methods to lower IOP remain the first line treatments for the condition. Current methods of IOP measurement do not permit temporary noninvasive monitoring 24-hour IOP on a periodic basis. Ongoing research will in time provide a means of developing a device that will enable continuous or temporary monitoring of IOP. At present a device suitable for clinical use is not yet available.This review contains a description of different devices currently in development for measuring IOP: soft contact lens, LC resonant circuits and on-chip sensing devices. All of them use application-specific integrated circuits (ASICS) to process the measured signals and send them to recording devices. Soft contact lens devices are based on an embedded strain gauge, LC circuits vary their resonance frequency depending on the intraocular pressure (IOP) and, finally, on-chip sensing devices include an integrated microelectromechanical sensor (MEMS). MEMS are capacitors whose capacity varies with IOP. These devices allow for an accurate IOP measurement (up to +/– 0.2 mm Hg) with high sampling rates (up to 1 sample/min) and storing 1 week of raw data. All of them operate in an autonomous way and even some of them are energetically independent.展开更多
In this review,the advanced microwave devices based on the integrated passive device(IPD)technology are expounded and discussed in detail,involving the performance breakthroughs and circuit innovations.Then,the develo...In this review,the advanced microwave devices based on the integrated passive device(IPD)technology are expounded and discussed in detail,involving the performance breakthroughs and circuit innovations.Then,the development trend of IPD-based multifunctional microwave circuits is predicted further by analyzing the current research hot spots.This paper discusses a distinctive research area for microwave circuits and mobile-terminal radio-frequency integrated chips.展开更多
An 'Integrated Device and Circuit simulator' for thin film (0.05-0.2μm) submicron (0.5μm) and deep submicron (0.15, 0.25,0.35μm) CMOS/ SOI integrated circuit has been developed. This simulator has been used...An 'Integrated Device and Circuit simulator' for thin film (0.05-0.2μm) submicron (0.5μm) and deep submicron (0.15, 0.25,0.35μm) CMOS/ SOI integrated circuit has been developed. This simulator has been used for design and fabrication and physical library development of thin film submicron and deep submicron CMOS/ SOI integrated circuit.展开更多
基金financially the National Natural Science Foundation of China(52002254,52272160)Sichuan Science and Technology Foundation(2020YJ0262,2021YFH0127,2022YFSY0045,2022YFH0083 and 23SYSX0060)+3 种基金the Chunhui plan of Ministry of Education,Fundamental Research Funds for the Central Universities,China(YJ201893)the Open-Foundation of Key Laboratory of Laser Device Technology,China North Industries Group Corporation Limited(Grant No.KLLDT202104)the foundation of the State Key Laboratory of Solidification Processing in NWPU(No.SKLSP202210)the 2035-Plan of Sichuan University。
文摘As an outstanding representative of layered materials,molybdenum disulfide(MoS_(2))has excellent physical properties,such as high carrier mobility,stability,and abundance on earth.Moreover,its reasonable band gap and microelectronic compatible fabrication characteristics makes it the most promising candidate in future advanced integrated circuits such as logical electronics,flexible electronics,and focal-plane photodetector.However,to realize the all-aspects application of MoS_(2),the research on obtaining high-quality and large-area films need to be continuously explored to promote its industrialization.Although the MoS_(2)grain size has already improved from several micrometers to sub-millimeters,the high-quality growth of wafer-scale MoS_(2)is still of great challenge.Herein,this review mainly focuses on the evolution of MoS_(2)by including chemical vapor deposition,metal–organic chemical vapor deposition,physical vapor deposition,and thermal conversion technology methods.The state-of-the-art research on the growth and optimization mechanism,including nucleation,orientation,grain,and defect engineering,is systematically summarized.Then,this review summarizes the wafer-scale application of MoS_(2)in a transistor,inverter,electronics,and photodetectors.Finally,the current challenges and future perspectives are outlined for the wafer-scale growth and application of MoS_(2).
基金supported by the Knowledge Innovation Program of the Chinese Academy of Sciences(KJCX2-YW-N27)the CAS Center for Excellence in Particle Physics(CCEPP)
文摘The water Cherenkov detector array(WCDA) is an important part of the large high-altitude air shower observatory(LHAASO),which is in a research and development phase.The central scientific goal of LHAASO is to explore the origin of high-energy cosmic rays of the universe and to push forward the frontier of new physics.To simplify the WCDA's readout electronics,a prototype of a front-end readout for an application-specific integrated circuit(ASIC) is designed based on the timeover-threshold method to achieve charge-to-time conversion.High-precision time measurement and charge measurement are necessary over a full dynamic range[1-4000photoelectrons(P.E.)].To evaluate the performance of this ASIC,a test system is designed that includes the front-end ASIC test module,digitization module,and test software.The first module needs to be customized for different ASIC versions,whereas the digitization module and test software are tested for general-purpose use.In the digitization module,a field programmable gate array-based time-todigital converter is designed with a bin size of 333 ps,which also integrates an inter-integrated circuit to configure the ASIC test module,and a universal serial bus interface is designed to transfer data to the remote computer.Test results indicate that the time resolution is better than 0.5 ns,and the charge resolution is better than 30%root mean square(RMS) at 1 P.E.and 3%RMS at 4000 P.E.,which are beyond the application requirements.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61131001,61322405,61204044,61376039,and 61334003)
文摘Through-silicon-via (TSV) to TSV crosstalk noise is one of the key factors affecting the signal integrity of three- dimensional integrated circuits (3D ICs). Based on the frequency dependent equivalent electrical parameters for the TSV channel, an analytical crosstalk noise model is established to capture the TSV induced crosstalk noise. The impact of various design parameters including insulation dielectric, via pitch, via height, silicon conductivity, and terminal impedance on the crosstalk noise is analyzed with the proposed model. Two approaches are proposed to alleviate the TSV noise, namely, driver sizing and via shielding, and the SPICE results show 241 rnV and 379 mV reductions in the peak noise voltage, respectively.
基金Project supported by the National Natural Science Foundation of China (Grant No 90607023), Shanghai Pujiang Program (Grant No 05PJ14017), SRF for R0CS, SEM, and the Micro/Nano-electronics Science and Technology Innovation Platform (985) and the Ministry of Education of China in the International Research Training Group "Materials and Concepts for Advanced Interconnects
文摘Metal-insulator-metal (MIM) capacitors with atomic-layer-deposited Al2O3 dielectric and reactively sputtered TaN electrodes in application to radio frequency integrated circuits have been characterized electrically. The capacitors exhibit a high density of about 6.05 fF/μm^2, a small leakage current of 4.8 × 10^-8 A/cm^2 at 3 V, a high breakdown electric field of 8.61 MV/cm as well as acceptable voltage coefficients of capacitance (VCCs) of 795 ppm/V2 and 268ppm/V at 1 MHz. The observed properties should be attributed to high-quality Al2O3 film and chemically stable TaN electrodes. Further, a logarithmically linear relationship between quadratic VCC and frequency is observed due to the change of relaxation time with carrier mobility in the dielectric. The conduction mechanism in the high field ranges is dominated by the Poole-Frenkel emission, and the leakage current in the low field ranges is likely to be associated with trap-assisted tunnelling. Meanwhile, the Al2O3 dielectric presents charge trapping under low voltage stresses, and defect generation under high voltage stresses, and it has a hard-breakdown performance.
基金the National Key Research and Development Program of China under Grant No.2018YFB2200403the National Natural Science Foundation of China under Grant Nos.11734001,91950204,92150302.
文摘The basic indexes of all-optical integrated photonic circuits include high-density integration,ultrafast response and ultralow energy consumption.Traditional methods mainly adopt conventional micro/nano-structures.The overall size of the circuit is large,usually reaches hundreds of microns.Besides,it is difficult to balance the ultrafast response and ultra-low energy consumption problem,and the crosstalk between two traditional devices is difficult to overcome.Here,we propose and experimentally demonstrate an approach based on inverse design method to realize a high-density,ultrafast and ultra-low energy consumption integrated photonic circuit with two all-optical switches controlling the input states of an all-optical XOR logic gate.The feature size of the whole circuit is only 2.5μm×7μm,and that of a single device is 2μm×2μm.The distance between two adjacent devices is as small as 1.5μm,within wavelength magnitude scale.Theoretical response time of the circuit is 150 fs,and the threshold energy is within 10 fJ/bit.We have also considered the crosstalk problem.The circuit also realizes a function of identifying two-digit logic signal results.Our work provides a new idea for the design of ultrafast,ultra-low energy consumption all-optical devices and the implementation of high-density photonic integrated circuits.
文摘Dear Editor: There is accumulating evidence that human blood electronic circuit components and their application circuits become more and more important to cyborg implant/engineering, man-machine interface, hu- man disease detection and healing, and artificial brain evolutionusl. Here, we report the first development of human plasma-based amplifier circuit in the dis- crete as well as integrated circuit (IC) configuration mode. Electrolytes in the human blood contain an enormous number of charge carriers such as positive and negative molecule/atom ions, which are electri- cally conducting media and therefore can be utilized for developing electronic circuit components and their application circuits. These electronic circuits obvi- ously have very high application impact potential towards bio-medical engineering and medical science and technology.
基金Supported by the National High-Technology Research and Development Program of China under Grant No 2011AA010203the National Basic Research Program of China under Grant Nos 2011CB201704 and 2010CB327502the National Natural Science Foundation of China under Grant Nos 61434006 and 61106074
文摘A 330-500 GHz zero-biased broadband monolithic integrated tripler is reported. The measured results show that the maximum efficiency and the maximum output power are 2% and 194μW at 348 GHz. The saturation characteristic test shows that the output i dB compression point is about -8.5 dBm at 334 GHz and the maximum efficiency is obtained at the point, which is slightly below the 1 dB compression point. Compared with the conventional hybrid integrated circuit, a major advantage of the monolithic integrated circuit is the significant improvement of reliability and consistency. In this work, a terahertz monolithic frequency multiplier at this band is designed and fabricated.
文摘We formulate a “Moore’s law” for photonic integrated circuits (PICs) and their spatial integration density using two methods. One is decomposing the integrated photonics devices of diverse types into equivalent basic elements, which makes a comparison with the generic elements of electronic integrated circuits more meaningful. The other is making a complex compo- nent equivalent to a series of basic elements of the same functionality, which is used to calculate the integration density for func- tional components realized with different structures. The results serve as a benchmark of the evolution of PICs and we can con- clude that the density of integration measured in this way roughly increases by a factor of 2 per year. The prospects for a continued increase of spatial integration density are discussed.
基金Project(041010) supported by Start-Up Foundation of Northwest University,ChinaProject(UIT/39) supported by University-Industry Collaboration Program from the Innovation and Technology Fund of Hong Kong,China
文摘In order to utilize integrated passive technology in printed circuit boards (PCBs),manufacturing processing for integrated resistors by lamination method was investigated.Integrated resistors fabricated from Ohmega technologies in the experiment were 1 408 pieces per panel with four different patterns A,B,C and D and four resistance values of 25,50,75 and 100 Ω.Six panel per batch and four batches were performed totally.The testing was done for 960 pieces of integrated resistors randomly selected with the same size.The value distribution ranges and the relative standard deviation (RSD) show that the scatter degree of the resistance decreases with the resistor size increasing and/or with the resistance increasing.Patterns D with resistance of 75 and 100 Ω for four patterns have the resistance value variances less than 10%.Patterns C and D with resistance of 100 Ω have the manufacturing tolerance less than 10%.The process capabilities are from about 0.6 to 1.6 for the designed testing patterns,which shows that the integrated resistors fabricated have the potential to be used in multilayer PCBs in the future.
文摘Since the proposal of the concept of photonic integratedcircuits (PICs), tremendous progress has been made. In2005, Infinera Corp. rolled out the first commercial PICs, inwhich hundreds of optical functions were integrated onto asmall form factor chip for wavelength division multiplexing(WDM) systems[1], then a monolithically integrated 10 ×10 Gb/s WDM chip has been demonstrated, the channelnumber is ten[2]. Like ICs, large-scale PICs (LS-PICs) will besure to be pursued. However, there are still some generalchallenges associated with LS-PICs. The challenges for III–V(mainly InP) PICs is the semiconductor process, which is notmature for LS-PICs. Up to now, the channel number in commercialIII–V WDM PICs by Infinera is still about ten or less.For silicon photonics, the challenge is the silicon based lightsource. The low cost and mature solution for silicon lasers isstill unavailable and only 4 × 25 Gb/s PICs are deployed byIntel Corp. after 18-year R&D investment. Thus it is still unavailablefor practical LS-PICs in the present times.
基金supported by Guangdong Provincial Natural Science Foundation of China (7005833)
文摘The integrated circuit chip with high performance has a high sensitivity to the defects in manufacturing environments.When there are defects on a wafer,the defects may lead to the degradation of chip performance.It is necessary to design effective detection approaches for the defects in order to ensure the reliability of wafer.In this paper,a new method based on image boundary extraction is presented for the detection of defects on a wafer.The method uses island model genetic algorithms to perform the segmentation of wafer images,and gets the optimal threshold values.The island model genetic algorithm uses two distinct subpopulations,it is a coarse grain parallel model.The individuals migration can occur between the two subpopulations to share genetic materials.A lot of experimental results show that the defect detection method proposed in this paper can obtain the features of defects effectively.
文摘The method and procedure of realizing parameter statistical correlation analysis ofbipolar analog IC’s are given,and the statistical model of parameter are constructed with doubleparameters(B_F,R_S).Based on the comparison and analysis of the circuit characteristics,it isshown that the method can be used for analysis and design of bipolar IC’s.
文摘Analysis approach and formulas for the transmission properties of uniform multicon-ductor interconnecting buses in high-speed integrated circuits are presented in this article. And further, by using a network approach, a tapered bus system can be analyzed as a set of cascaded uniform buses with slightly different strip widths. Obtained results are in good agreement with the experimental data.
基金Supported by the National Native Science Foundation of China
文摘This paper analyses the transient characteristics of high temperature CMOS inverters and gate circuits, and gives the computational formulas of their rise time, fall time and delay time. It may be concluded that the transient characteristics of CMOS inverters and gate circuits deteriorate due to the reduction of carrier mobilities and threshold voltages of MOS transistors and the increase of leakage currents of MOS transistors drain terminal pn junctions. The calculation results can explain the experimental phenomenon.
文摘Recently, resonant AC/DC converter has been accepted by the industry. However, the efficiency will be decreased at light load. So, a novel topology with critical controlling mode combined with resonant ones is proposed in this paper. The new topology can correspond to a 90 plus percent of power converting. So,a novel topology of an state of-art integrated circuit, which can be used as power management circuit, has been designed based on the above new topology. A simulator which is specific suitable for the power controller has been founded in this work and it has been used for the simulation of the novel architecture and the proposed integrated circuit.
文摘Hybrid integration ofⅢ-Ⅴand ferroelectric materials is being broadly adopted to enhance functionalities in silicon photonic integrated circuits(PICs).Bonding and transfer printing have been the popular approaches for integration of III–V gain media with silicon PICs.Similar approaches are also being considered for ferroelectrics to enable larger RF modulation bandwidths,higher linearity,lower optical loss integrated optical modulators on chip.In this paper,we review existing integration strategies ofⅢ-Ⅴmaterials and present a route towards hybrid integration of bothⅢ-Ⅴand ferroelectrics on the same chip.We show that adiabatic transformation of the optical mode between hybrid ferroelectric and silicon sections enables efficient transfer of optical modal energies for maximum overlap of the optical mode with the ferroelectric media,similar to approaches adopted to maximize optical overlap with the gain section,thereby reducing lasing thresholds for hybridⅢ-Ⅴintegration with silicon PICs.Preliminary designs are presented to enable a foundry compatible hybrid integration route of diverse functionalities on silicon PICs.
文摘Programmable photonic waveguide meshes can be programmed into many different circuit topologies and thereby provide a variety of functions.Due to the complexity of the signal routing in a general mesh,a particular synthesis algorithm often only accounts for a specific function with a specific cell configuration.In this paper,we try to synthesize the programmable waveguide mesh to support multiple configurations with a more general digital signal processing platform.To show the feasibility of this technique,photonic waveguide meshes in different configurations(square,triangular and hexagonal meshes)are designed to realize optical signal interleaving with arbitrary duty cycles.The digital signal processing(DSP)approach offers an effective pathway for the establishment of a general design platform for the software-defined programmable photonic integrated circuits.The use of well-developed DSP techniques and algorithms establishes a link between optical and electrical signals and makes it convenient to realize the computer-aided design of optics–electronics hybrid systems.
文摘Glaucoma is a neurodegenerative condition that is the leading cause of irreversible blindness worldwide. Elevated intraocular pressure (IOP) is the main risk factor for the development and progression of the disease. Methods to lower IOP remain the first line treatments for the condition. Current methods of IOP measurement do not permit temporary noninvasive monitoring 24-hour IOP on a periodic basis. Ongoing research will in time provide a means of developing a device that will enable continuous or temporary monitoring of IOP. At present a device suitable for clinical use is not yet available.This review contains a description of different devices currently in development for measuring IOP: soft contact lens, LC resonant circuits and on-chip sensing devices. All of them use application-specific integrated circuits (ASICS) to process the measured signals and send them to recording devices. Soft contact lens devices are based on an embedded strain gauge, LC circuits vary their resonance frequency depending on the intraocular pressure (IOP) and, finally, on-chip sensing devices include an integrated microelectromechanical sensor (MEMS). MEMS are capacitors whose capacity varies with IOP. These devices allow for an accurate IOP measurement (up to +/– 0.2 mm Hg) with high sampling rates (up to 1 sample/min) and storing 1 week of raw data. All of them operate in an autonomous way and even some of them are energetically independent.
基金Beijing Natural Science Foundation(No.JQ19018)National Natural Science Foundations of China(No.U20A20203 and No.61971052)National Special Support Program for High-Level Personnel Recruitment(No.2018RA2131)。
文摘In this review,the advanced microwave devices based on the integrated passive device(IPD)technology are expounded and discussed in detail,involving the performance breakthroughs and circuit innovations.Then,the development trend of IPD-based multifunctional microwave circuits is predicted further by analyzing the current research hot spots.This paper discusses a distinctive research area for microwave circuits and mobile-terminal radio-frequency integrated chips.
文摘An 'Integrated Device and Circuit simulator' for thin film (0.05-0.2μm) submicron (0.5μm) and deep submicron (0.15, 0.25,0.35μm) CMOS/ SOI integrated circuit has been developed. This simulator has been used for design and fabrication and physical library development of thin film submicron and deep submicron CMOS/ SOI integrated circuit.