High performance can be obtained for the integrated power electronics module（IPEM） by using a three-dimensional packaging structure instead of a planar structure. A three- dimensional packaged half bridge-IPEM （HB-...High performance can be obtained for the integrated power electronics module（IPEM） by using a three-dimensional packaging structure instead of a planar structure. A three- dimensional packaged half bridge-IPEM （HB-IPEM）, consisting of two chip scale packaged MOSFETs and the corresponding gate driver and protection circuits, is fabricated at the laboratory. The reliability of the IPEM is controlled from the shape design of solder joints and the control of assembly process parameters. The parasitic parameters are extracted using Agilent 4395A impedance analyzer for building the parasitic parameter model of the HB- IPEM. A 12 V/3 A output synchronous rectifier Buck converter using the HB-IPEM is built to test the electrical performance of the HB-IPEM. Low voltage spikes on two MOSFETs illustrate that the three-dimensional package of the HB-IPEM can decrease parasitic inductance. Temperature distribution simulation results of the HB-IPEM using FLOTHERM are given. Heat dissipation of the solder joints makes the peak junction temperature of the chip drop obviously. The package realizes three-dimensional heat dissipation and has better thermal management.展开更多
Complex circuitry of electronic infrastructure of compact micro-grids with multiple renewable energy sources feeding the loads using parallel operation of inverters acts as a deterrent in developing such systems. This...Complex circuitry of electronic infrastructure of compact micro-grids with multiple renewable energy sources feeding the loads using parallel operation of inverters acts as a deterrent in developing such systems. This paper deals with applicable techniques reducing the driving circuits in parallel power inverters used in micro-grid system (MGS), mainly focused on the distributed generation (DG) in islanded mode. The method introduced in this paper, gives a minimal and compressed circuitry that can be implemented very cost-effectively with simple components. DC micro-grids are proposed and researched for the good connection with DC output type sources such as photovoltaic (PV), fuel cell, and secondary battery. In this paper, the electronic infrastructure of micro-grid is expressed. Then discussed the reasons for its complexity and the possibility of reducing the elements of electronic circuits are investigated. The reason for this is in order to compact DC micro-grid system for electrification to places like villages. Digital Simulation in Matlab Simulink is used to show the effectiveness of this novel driver topology for parallel operating inverters (NDTPI).展开更多
倒装芯片(Flip Chip,FC)技术广泛应用于微电子封装中,将该技术引入到三维的集成电力电子模块(Integrated Power Electronics Module,IPEM)的封装中,可以构成倒装芯片集成电力电子模块(FC-IPEM)。该文详细介绍FC-IPEM的结构和组装程序。...倒装芯片(Flip Chip,FC)技术广泛应用于微电子封装中,将该技术引入到三维的集成电力电子模块(Integrated Power Electronics Module,IPEM)的封装中,可以构成倒装芯片集成电力电子模块(FC-IPEM)。该文详细介绍FC-IPEM的结构和组装程序。在实验室完成由两只MOSFET和驱动、保护等电路构成的半桥FC-IPEM,并采用它构成同步整流Buck变换器,对半桥FC-IPEM进行电气性能测试,最后给出测试结果。展开更多
封装技术直接影响到集成电力电子模块(Integrated Power Electronics Module,IPEM)的电气性能、EMI特性和热性能等,被公认为未来电力电子技术发展的核心推动力。介绍了IPEM封装的结构与互连和基板技术等关键技术及研究现状,分析了已存...封装技术直接影响到集成电力电子模块(Integrated Power Electronics Module,IPEM)的电气性能、EMI特性和热性能等,被公认为未来电力电子技术发展的核心推动力。介绍了IPEM封装的结构与互连和基板技术等关键技术及研究现状,分析了已存在的薄膜覆盖封装技术等三维IPEM封装技术,讨论了IPEM封装的发展趋势,最后指出我国IPEM封装技术研究的限制因素与对策。展开更多
采用球栅阵列芯片尺寸封装技术和倒装芯片(Flip Chip,FC)技术构建了半桥集成电力电子模块(Integrated Power Electronics Module,IPEM),半桥FC-IPEM实现三维封装结构。采用阻抗测量法提取模块寄生电感和寄生电容,建立模块的寄生参数模型...采用球栅阵列芯片尺寸封装技术和倒装芯片(Flip Chip,FC)技术构建了半桥集成电力电子模块(Integrated Power Electronics Module,IPEM),半桥FC-IPEM实现三维封装结构。采用阻抗测量法提取模块寄生电感和寄生电容,建立模块的寄生参数模型,对模块进行电气性能测试。结果表明:半桥FC-IPEM构成的同步整流Buck变换器输出滤波电感中的电流波动幅度小于0.6A。展开更多
基金Fok Ying Tung Education Foundation(No.91058)the Natural Science Foundation of High Education Institutions of Jiangsu Province(No.08KJD470004)Qing Lan Project of Jiangsu Province of 2008
文摘High performance can be obtained for the integrated power electronics module（IPEM） by using a three-dimensional packaging structure instead of a planar structure. A three- dimensional packaged half bridge-IPEM （HB-IPEM）, consisting of two chip scale packaged MOSFETs and the corresponding gate driver and protection circuits, is fabricated at the laboratory. The reliability of the IPEM is controlled from the shape design of solder joints and the control of assembly process parameters. The parasitic parameters are extracted using Agilent 4395A impedance analyzer for building the parasitic parameter model of the HB- IPEM. A 12 V/3 A output synchronous rectifier Buck converter using the HB-IPEM is built to test the electrical performance of the HB-IPEM. Low voltage spikes on two MOSFETs illustrate that the three-dimensional package of the HB-IPEM can decrease parasitic inductance. Temperature distribution simulation results of the HB-IPEM using FLOTHERM are given. Heat dissipation of the solder joints makes the peak junction temperature of the chip drop obviously. The package realizes three-dimensional heat dissipation and has better thermal management.
文摘Complex circuitry of electronic infrastructure of compact micro-grids with multiple renewable energy sources feeding the loads using parallel operation of inverters acts as a deterrent in developing such systems. This paper deals with applicable techniques reducing the driving circuits in parallel power inverters used in micro-grid system (MGS), mainly focused on the distributed generation (DG) in islanded mode. The method introduced in this paper, gives a minimal and compressed circuitry that can be implemented very cost-effectively with simple components. DC micro-grids are proposed and researched for the good connection with DC output type sources such as photovoltaic (PV), fuel cell, and secondary battery. In this paper, the electronic infrastructure of micro-grid is expressed. Then discussed the reasons for its complexity and the possibility of reducing the elements of electronic circuits are investigated. The reason for this is in order to compact DC micro-grid system for electrification to places like villages. Digital Simulation in Matlab Simulink is used to show the effectiveness of this novel driver topology for parallel operating inverters (NDTPI).
文摘倒装芯片(Flip Chip,FC)技术广泛应用于微电子封装中,将该技术引入到三维的集成电力电子模块(Integrated Power Electronics Module,IPEM)的封装中,可以构成倒装芯片集成电力电子模块(FC-IPEM)。该文详细介绍FC-IPEM的结构和组装程序。在实验室完成由两只MOSFET和驱动、保护等电路构成的半桥FC-IPEM,并采用它构成同步整流Buck变换器,对半桥FC-IPEM进行电气性能测试,最后给出测试结果。
文摘封装技术直接影响到集成电力电子模块(Integrated Power Electronics Module,IPEM)的电气性能、EMI特性和热性能等,被公认为未来电力电子技术发展的核心推动力。介绍了IPEM封装的结构与互连和基板技术等关键技术及研究现状,分析了已存在的薄膜覆盖封装技术等三维IPEM封装技术,讨论了IPEM封装的发展趋势,最后指出我国IPEM封装技术研究的限制因素与对策。
文摘采用球栅阵列芯片尺寸封装技术和倒装芯片(Flip Chip,FC)技术构建了半桥集成电力电子模块(Integrated Power Electronics Module,IPEM),半桥FC-IPEM实现三维封装结构。采用阻抗测量法提取模块寄生电感和寄生电容,建立模块的寄生参数模型,对模块进行电气性能测试。结果表明:半桥FC-IPEM构成的同步整流Buck变换器输出滤波电感中的电流波动幅度小于0.6A。
