Granular power management in a power-efficient system on a chip(SoC)requires multiple integrated voltage regulators with a small area,process scalability,and low supply voltage.Conventional on-chip analog low-dropout ...Granular power management in a power-efficient system on a chip(SoC)requires multiple integrated voltage regulators with a small area,process scalability,and low supply voltage.Conventional on-chip analog low-dropout regulators(ALDOs)can hardly meet these requirements,while digital LDOs(DLDOs)are good alternatives.However,the conventional DLDO,with synchronous control,has inherently slow transient response limited by the power-speed trade-off.Meanwhile,it has a poor power supply rejection(PSR),because the fully turned-on power switches in DLDO are vulnerable to power supply ripples.In this comparative study on DLDOs,first,we compare the pros and cons between ALDO and DLDO in general.Then,we summarize the recent DLDO advanced techniques for fast transient response and PSR enhancement.Finally,we discuss the design trends and possible directions of DLDO.展开更多
This paper presents a dual micro-power 150mA ultra LDO CMOS regulator,which is designed for high performance and small size portable wireless devices.The proposed LDO has been designed and simulated in 0.5μm 2P3M CMO...This paper presents a dual micro-power 150mA ultra LDO CMOS regulator,which is designed for high performance and small size portable wireless devices.The proposed LDO has been designed and simulated in 0.5μm 2P3M CMOS Process.It can guarantee 150mA output current per circuit and the leakage voltage is 60mV,1nA quiescent current when both are in shutdown mode,and it has 115μA ground current,output noise is 42μVrms,130μs fast turn-on circuitry and the junction temperature range is-40℃to 125℃.展开更多
为提高低压差线性稳压器(Low-DropOut Linear Regulator,LDO)的稳定性并降低前馈电路所产生的噪声,提出了一种生成自适应补偿零点的低噪声前馈电路。该前馈电路通过镜像调整管的负载电流,通过低值反馈电阻形成高增益反馈信号,与LDO输出...为提高低压差线性稳压器(Low-DropOut Linear Regulator,LDO)的稳定性并降低前馈电路所产生的噪声,提出了一种生成自适应补偿零点的低噪声前馈电路。该前馈电路通过镜像调整管的负载电流,通过低值反馈电阻形成高增益反馈信号,与LDO输出电压经反馈网络传递给反馈端的信号耦合形成由负载电容、负载电流控制的可控零点,可有效提高LDO电路整体的稳定性。此外,电路内部加入了产生动态极点的自适应电流补偿电路以保证次极点不会对环路的相位裕度产生影响。基于0.18μm BCD工艺设计,该电路在0~800 mA的宽负载范围、5 V输入3.3 V输出下相位裕度均高于48°,适用负载电容范围≥1μF,同时该LDO在10~100 kHz的频率范围内输出噪声仅为5.0617μVrms。展开更多
设计了一种新颖的LDO线性稳压器。该LDO工作于负电源,具有微功耗、自身固定-5V输出、外接反馈电阻可实现可调输出等特点。基于0.6μm SOI CMOS工艺进行流片。测试结果表明,该电路输入电源电压VIN为-2～-18V,可调输出电压为-1.3V～VIN+0....设计了一种新颖的LDO线性稳压器。该LDO工作于负电源,具有微功耗、自身固定-5V输出、外接反馈电阻可实现可调输出等特点。基于0.6μm SOI CMOS工艺进行流片。测试结果表明,该电路输入电源电压VIN为-2～-18V,可调输出电压为-1.3V～VIN+0.5V@IOUT=15mA。该LDO功耗低,室温下空载静态电流约4.8μA,并且几乎不随VIN变化。内部带隙电压基准采用β二阶补偿,结构简单,温度系数为1.28×10-5/℃。线性调整率为0.015%,负载调整率为0.85Ω。展开更多
提出了一种适用于闪存的瞬态增强的无片外电容低压差线性稳压器（LDO）。该LDO采用了具有超低输出阻抗的缓冲器驱动功率管和高能效基准方法,缓冲器采用并联反馈技术降低输出电阻以增强功率管栅端的摆率。高能效基准电路在静态模式输出...提出了一种适用于闪存的瞬态增强的无片外电容低压差线性稳压器（LDO）。该LDO采用了具有超低输出阻抗的缓冲器驱动功率管和高能效基准方法,缓冲器采用并联反馈技术降低输出电阻以增强功率管栅端的摆率。高能效基准电路在静态模式输出小基准电流以减少静态功耗,而在工作模式提供大的基准电流以增加闭环带宽和功率管栅端的摆率。设计的LDO应用于采用70 nm闪存工艺制造的、工作电压为2~3.6 V和存储容量为64 M的闪存中。测试结果表明,该LDO输出的调制电压为1.8 V,最大输出电流为40 m A,在没有负载的条件下仅消耗8.5μA的静态电流,在满载电流变化时,用于闪存时仅有20 ns响应时间且最大输出电压变化仅为72 m V,满足高速闪存的要求。展开更多
基金supported by the National Natural Science Foundation of China(No.61974046)the Provincial Key Research and Development Program of Guangdong(2019B010140002)the Macao Science&Technology Development Fund(FDCT)145/2019/A3 and SKL-AMSV(UM)-2020-2022.
文摘Granular power management in a power-efficient system on a chip(SoC)requires multiple integrated voltage regulators with a small area,process scalability,and low supply voltage.Conventional on-chip analog low-dropout regulators(ALDOs)can hardly meet these requirements,while digital LDOs(DLDOs)are good alternatives.However,the conventional DLDO,with synchronous control,has inherently slow transient response limited by the power-speed trade-off.Meanwhile,it has a poor power supply rejection(PSR),because the fully turned-on power switches in DLDO are vulnerable to power supply ripples.In this comparative study on DLDOs,first,we compare the pros and cons between ALDO and DLDO in general.Then,we summarize the recent DLDO advanced techniques for fast transient response and PSR enhancement.Finally,we discuss the design trends and possible directions of DLDO.
基金This work was supported by Supported by the 2016 Annual Young Academic Leaders Scientific Research Foundation of Chengdu University of Information Technology(No.J201604)and the National Social Science Foundation(No.61504014).
文摘This paper presents a dual micro-power 150mA ultra LDO CMOS regulator,which is designed for high performance and small size portable wireless devices.The proposed LDO has been designed and simulated in 0.5μm 2P3M CMOS Process.It can guarantee 150mA output current per circuit and the leakage voltage is 60mV,1nA quiescent current when both are in shutdown mode,and it has 115μA ground current,output noise is 42μVrms,130μs fast turn-on circuitry and the junction temperature range is-40℃to 125℃.
文摘设计了一种新颖的LDO线性稳压器。该LDO工作于负电源,具有微功耗、自身固定-5V输出、外接反馈电阻可实现可调输出等特点。基于0.6μm SOI CMOS工艺进行流片。测试结果表明,该电路输入电源电压VIN为-2～-18V,可调输出电压为-1.3V～VIN+0.5V@IOUT=15mA。该LDO功耗低,室温下空载静态电流约4.8μA,并且几乎不随VIN变化。内部带隙电压基准采用β二阶补偿,结构简单,温度系数为1.28×10-5/℃。线性调整率为0.015%,负载调整率为0.85Ω。
文摘提出了一种适用于闪存的瞬态增强的无片外电容低压差线性稳压器（LDO）。该LDO采用了具有超低输出阻抗的缓冲器驱动功率管和高能效基准方法,缓冲器采用并联反馈技术降低输出电阻以增强功率管栅端的摆率。高能效基准电路在静态模式输出小基准电流以减少静态功耗,而在工作模式提供大的基准电流以增加闭环带宽和功率管栅端的摆率。设计的LDO应用于采用70 nm闪存工艺制造的、工作电压为2~3.6 V和存储容量为64 M的闪存中。测试结果表明,该LDO输出的调制电压为1.8 V,最大输出电流为40 m A,在没有负载的条件下仅消耗8.5μA的静态电流,在满载电流变化时,用于闪存时仅有20 ns响应时间且最大输出电压变化仅为72 m V,满足高速闪存的要求。
