A Study of Efficient Power Consumption Wireless Communication Techniques/ Modules for Internet of Things (IoT) Applications

A study of wireless technologies for IoT applications in terms of power consumption has been presented in this paper. The study focuses on the importance of using low power wireless techniques and modules in IoT applications by introducing a comparative between different low power wireless communication techniques such as ZigBee, Low Power Wi-Fi, 6LowPAN, LPWA and their modules to conserve power and longing the life for the IoT network sensors. The approach of the study is in term of protocol used and the particular module that achieve that protocol. The candidate protocols are classified according to the range of connectivity between sensor nodes. For short ranges connectivity the candidate protocols are ZigBee, 6LoWPAN and low power Wi-Fi. For long connectivity the candidate is LoRaWAN protocol. The results of the study demonstrate that the choice of module for each protocol plays a vital role in battery life due to the difference of power consumption for each module/protocol. So, the evaluation of protocols with each other depends on the module used.

Low modulation index RF signal detection for a passive UHF RFID transponder

In a typical RFID system the reader transmits modulated RF power to provide both data and energy for the passive transponder. Low modulation index RF energy is preferable for an adequate tag power supply and increase in communication range but gives rise to difficulties for near-field conventional demodulation. Therefore, a novel ASK demodulator for minimum 20% modulation index RF signal detection over a range of 23 dB is presented. Thanks to the proposed innovative divisional linear conversion from the power into voltage signal, the detection sensitivity is ensured over a wide power range with low power consumption of 8.6 μW. The chip is implemented in UMC 0.18μm mix-mode CMOS technology, and the chip area is 0.06 mm^2.

A single die 1.2 V 55 to 95 dB DR delta sigma ADC with configurable modulator and OSR

A single die 1.2 V multi-stage noise shaping（Mash） 2-2 delta sigma analog to digital converter（ADC）for wide applications is implemented. The configurable Mash 2-2 modulator with a new decimation filter design is presented to achieve wide and high dynamic range（DR） for multiple practical applications. The novel modulator can be configured as a Mash 2-2 modulator for high precision or a 2-order modulator for low DR. The decimation filter is designed to select the OSR flexibly among cascaded integrator comb（CIC） filter and two half-band filters（HBF）. The serial peripheral interface（SPI） can be used to adjust the sampling frequency and the oversampling ratio（OSR）. The design was fabricated in a 0.13 m CMOS process with an area of 0.91 mm2and a total power of 5.2 mW. The measurement results show that the dynamic range（DR） of the proposed ADC can change from 55to 95 dB with the configurable OSR from 16 to 256. The spurious free dynamic range（SFDR） and signal-to-noise distortion ratio（SNDR） can get 99 dB and 86.5 dB, respectively.

A 1.2-V,84-dB∑△ADM in 0.18-μm digital CMOS technology

A low power and low voltage∑△analog-to-digital modulator is realized with digital CMOS technology, which is due to full compensated depletion mode capacitors.Compared with mixed signal technology,this type of modulator is more compatible for pure digital applications.A pseudo-two-stage class-AB OTA is used in switchedcapacitor integrators for low voltage and low power.The modulator is realized in standard SMIC 0.18μm 1P6M digital CMOS technology.Measured results show that with 1.2 V supply voltage and a 6 MHz sample clock,the dynamic range of the modulator is 84 dB and the total power dissipation is 2460μW.