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Design and analysis on four stage SiGe HBT low noise amplifier 被引量:2
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作者 井凯 Zhuang Yiqi +1 位作者 Li Zhenrong Lin Zhiyu 《High Technology Letters》 EI CAS 2015年第3期358-363,共6页
Focusing on the linearity shortcoming on a bipolar low noise amplifier(LNA),a new 6 ~14GHz four stage SiGe HBT LNA is proposed.This amplifier adopts a method of gain allocation on multiple stages to avoid the limitati... Focusing on the linearity shortcoming on a bipolar low noise amplifier(LNA),a new 6 ~14GHz four stage SiGe HBT LNA is proposed.This amplifier adopts a method of gain allocation on multiple stages to avoid the limitation on linearity especially with the addition of negative gain on the third stage.To realize gain flatness,extra zero is introduced to compensate the gain roll-off formed by pole,and local shunt-shunt negative feedback is used to widen the bandwidth as well as optimize circuit' s noise.Simulated results have shown that in 6 ~14GHz,this circuit achieves noise figure(NF) less than 3dB,gain of 17.8dB(+0.2dB),input and output reflection parameters of less than- 10 dB,and the K factor is above 1.15. 展开更多
关键词 low noise amplifier (lna pole-zero cancellation noise figure (NF) SiGe HBT BJT LINEARITY
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3 - 10 GHz Ultra-Wideband Low-Noise Amplifier Using Inductive-Series Peaking Technique with Cascode Common-Source Circuit 被引量:1
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作者 Chia-Song Wu Tah-Yeong Lin +1 位作者 Chien-Huang Chang Hsien-Ming Wu 《Wireless Engineering and Technology》 2011年第4期257-261,共5页
The objective of this paper is to investigate a ultra-wideband (UWB) low noise amplifier (LNA) by utilizing a two-stage cascade circuit schematic associated with inductive-series peaking technique, which can improve t... The objective of this paper is to investigate a ultra-wideband (UWB) low noise amplifier (LNA) by utilizing a two-stage cascade circuit schematic associated with inductive-series peaking technique, which can improve the bandwidth in the 3-10 GHz microwave monolithic integrated circuit (MMIC). The proposed UWB LNA amplifier was implemented with both co-planer waveguide (CPW) layout and 0.15-μm GaAs D-mode pHEMT technology. Based on those technologies, this proposed UWB LNA with a chip size of 1.5 mm x 1.4 mm, obtained a flatness gain 3-dB bandwidth of 4 - 8 GHz, the constant gain of 4 dB, noise figure lower than 5 dB, and the return loss better than –8.5 dB. Based on our experimental results, the low noise amplifier using the inductive-series peaking technique can obtain a wider bandwidth, low power consumption and high flatness of gain in the 3 - 10 GHz. Finally, the overall LNA characterization exhibits ultra-wide bandwidth and low noise characterization, which illustrates that the proposed UWB LNA has a compact size and favorable RF characteristics. This UWB LNA circuit demonstrated the high RF characterization and could provide for the low noise micro-wave circuit applications. 展开更多
关键词 ULTRA-WIDEBAND (UWB) low Noise amplifier (lna) CPW PHEMT MMIC
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Inductorless CMOS Low Noise Amplifier for Multiband Application in 0.1–1.2 GHz
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作者 Guoxuan Qin Mengmeng Jin +4 位作者 Guoping Tu Yuexing Yan Laichun Yang Yanmeng Xu Jianguo Ma 《Transactions of Tianjin University》 EI CAS 2017年第2期168-175,共8页
A 0.18 μm CMOS low noise amplifier(LNA) by utilizing noise-canceling technique was designed and implemented in this paper. Current-reuse and self-bias techniques were used in the first stage to achieve input matching... A 0.18 μm CMOS low noise amplifier(LNA) by utilizing noise-canceling technique was designed and implemented in this paper. Current-reuse and self-bias techniques were used in the first stage to achieve input matching and reduce power consumption. The core size of the proposed CMOS LNA circuit without inductor was only 128 μm 9226 μm. The measured power gain and noise figure of the proposed LNA were 20.6 and 1.9 dB,respectively. The 3-dB bandwidth covers frequency from 0.1 to 1.2 GHz. When the chip was operated at a supply voltage of 1.8 V, it consumed 25.69 mW. The high performance of the proposed LNA makes it suitable for multistandard low-cost receiver front-ends within the above frequency range. 展开更多
关键词 CMOS low noise amplifier (lna) MULTIBAND Noise-canceling Self-bias wide band
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Analysis, Design and Implementation of SiGe Wideband Dual-Feedback Low Noise Amplifier
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作者 张为 宋博 +5 位作者 付军 王玉东 崔杰 李高庆 张伟 刘志宏 《Transactions of Tianjin University》 EI CAS 2014年第4期299-309,共11页
A wideband dual-feedback low noise amplifier (LNA) was analyzed, designed and implemented using SiGe heterojunction bipolar transistor (HBT) technology. The design analysis in terms of gain, input and output match... A wideband dual-feedback low noise amplifier (LNA) was analyzed, designed and implemented using SiGe heterojunction bipolar transistor (HBT) technology. The design analysis in terms of gain, input and output matching, noise and poles for the amplifier was presented in detail. The area of the complete chip die, including bonding pads and seal ring, was 655 μm × 495 μm. The on-wafer measurements on the fabricated wideband LNA sample demonstrated good performance: a small-signal power gain of 33 dB with 3-dB bandwidth at 3.3 GHz was achieved; the input and output return losses were better than - 10 dB from 100 MHz to 4 GHz and to 6 GHz, respectively; the noise figure was lower than 4.25 dB from 100 MHz to 6 GHz; with a 5 V supply, the values of OPtdB and OIP3 were 1.7 dBm and 11 dBm at 3-dB bandwidth, respectively. 展开更多
关键词 WIDEBAND dual-feedback low noise amplifier (lna SiGe heterojunction bipolar transistor
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A 9 - 10.6 GHz Microstrip Antenna—UWB Low Noise Amplifier with Differential Noise Canceling Technique for IoT Applications
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作者 Dalia Elsheakh Heba Shawkey Sherif Saleh 《International Journal of Communications, Network and System Sciences》 2019年第11期189-197,共9页
An ultra-wide band (UWB) receiver front-end that operates at the UWB frequency range, starting from 9 GHz - 10.6 GHz is proposed in this paper. The proposed system consists of an off-chip microstrip antenna and CMOS d... An ultra-wide band (UWB) receiver front-end that operates at the UWB frequency range, starting from 9 GHz - 10.6 GHz is proposed in this paper. The proposed system consists of an off-chip microstrip antenna and CMOS differential low noise amplifier with a differential noise canceling (DNC) technique. The proposed antenna is trapezoidal dipole shaped with balun and printed on a low-cost FR4 substrate with dimensions 10 × 10 × 0.8 mm3. The balun circuit integrated with the ground antenna to improve the antenna impedance matching. Noise canceling is obtained by using a differential block with each stage having 2 amplifiers that generate differential signals, subtracted to improve total noise performance. The proposed DNC block improves NF by 50% while increasing total power consumption with only 0.1 Mw. The differential CMOS cascode LNA with DNC block is implemented using UMC 0.13 μm CMOS process, exhibits a flat gain of 19 dB, maximum noise figure of 2.75 dB, 1 dB compression point &#8722;16 dBm and 3rd order intercept point (IIP3) &#8722;10 dBm. The proposed system has total DC power consumption of 2.8 mW at 1.2 V power supply. 展开更多
关键词 Ultra-Wideband (UWB) low Noise amplifier (lna) DIFFERENTIAL Noise Canceling low Power low Noise FIGURE
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An X-Band Low Noise Amplifier Design for Marine Navigation Radars
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作者 Christina Lessi Evangelia Karagianni 《International Journal of Communications, Network and System Sciences》 2014年第3期75-82,共8页
In this paper, the design of a 9.1 GHz Low Noise Amplifier (LNA) of a RADAR receiver that is used in the Navy is presented. For the design of the LNA, we used GaAs Field-Effect Transistors (FETs) from Agilent ADS comp... In this paper, the design of a 9.1 GHz Low Noise Amplifier (LNA) of a RADAR receiver that is used in the Navy is presented. For the design of the LNA, we used GaAs Field-Effect Transistors (FETs) from Agilent ADS component library. In order to keep the cost of the circuit in low prices and the performance high, we design a two-stage LNA. 展开更多
关键词 NAVY RADAR low Noise amplifier (lna) Field Effect TRANSISTOR (FET)
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A wideband CMOS variable gain low noise amplifier
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作者 李海松 Li Zhiqun Zhang Hao Li Wei Wang Zhigong 《High Technology Letters》 EI CAS 2010年第2期194-198,共5页
In this paper, a novel structure of linear-in-dB gain control is introduced. Based on this structure, a wideband variable gain low noise amplifier (VGLNA) has been designed and implemented in 0.18μm RF CMOS technol... In this paper, a novel structure of linear-in-dB gain control is introduced. Based on this structure, a wideband variable gain low noise amplifier (VGLNA) has been designed and implemented in 0.18μm RF CMOS technology. The measured resuhs show a good linear-in-dB gain control characteristic with 15 dB dynamic range. It can operate in the frequency range of MHz and consumes 30mW from 1.8V power supply. The minimum noise figure is 4.1 dB at the 48 - 860 maximum gain and the input P1dB is greater than - 16.5dBm. 展开更多
关键词 low noise amplifier (lna WIDEBAND linear-in-dB CMOS
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Design of 5GHz low noise amplifier with HBM SiGe 0. 13μm BiCMOS process
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作者 徐建 Xi Chen +2 位作者 Li Ma Yang Zhou Wang Zhigong 《High Technology Letters》 EI CAS 2018年第3期227-231,共5页
A fully integrated low noise amplifier( LNA) for WLAN 802. 11 ac is presented in this article.A cascode topology combining BJT and MOS transistor is used for better performance. An inductive source degeneration is cho... A fully integrated low noise amplifier( LNA) for WLAN 802. 11 ac is presented in this article.A cascode topology combining BJT and MOS transistor is used for better performance. An inductive source degeneration is chosen to get 50 Ohm impedance matching at the input. The noise contribution of common gate transistor is analyzed for the first time. The designed LNA is verified with IBM silicon-germanium(SiGe ) 0. 13μm BiCMOS process. The measured results show that the designed LNA has the gain of 13 dB and NF of 2. 8 dB at the center frequency of 5. 5 GHz. The input reflection S11 and output reflection S22 are equal to-19 dB and-11 dB respectively. The P-1 dB and IIP3 are-8. 9 dBm and 6. 6 dBm for the linearity performance respectively. The power consumption is only 1. 3 mW under the 1. 2 V supply. LNA achieves high gain,low noise,and high linearity performance,allowing it to be used for the WLAN 802. 11 ac applications. 展开更多
关键词 low noise amplifier (lna noise figure (NF) WLAN802.11 ac S-PARAMETERS SiGe BiCMOS
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A compact and reconfigurable low noise amplifier employing combinational active inductors and composite resistors feedback techniques
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作者 Zhang Zheng Zhang Yanhua +5 位作者 Yang Ruizhe Shen Pei Ding Chunbao Liu Yaze Huang Xin Chen Jitian 《High Technology Letters》 EI CAS 2021年第1期38-42,共5页
A compact and reconfigurable low noise amplifier(LNA)is proposed by combining an input transistor,composite transistors with Darlington configuration as the amplification and output transistor,T-type structure composi... A compact and reconfigurable low noise amplifier(LNA)is proposed by combining an input transistor,composite transistors with Darlington configuration as the amplification and output transistor,T-type structure composite resistors instead of a simplex structure resistor,a shunt inductor feedback realized by a tunable active inductor(AI),a shunt inductor peaking technique realized by another tunable AI.The division and collaboration among different resistances in the T-type structure composite resistor realize simultaneously input impedance matching,output impedance matching and good noise performance;the shunt feedback and peaking technique using two tunable AIs not only extend frequency bandwidth and improve gain flatness,but also make the gain and frequency band can be tuned simultaneously by the external bias of tunable AIs;the Darlington configuration of composite transistors provides high gain;furthermore,the adoption of the small size AIs instead of large size passive spiral inductor,and the use of composite resistors make the LNA have a small size.The LNA is fabricated and verified by GaAs/InGaP hetero-junction bipolar transistor(HBT)process.The results show that at the frequency of 7 GHz,the gain S_(21)is maximum and up to 19 dB;the S_(21)can be tuned from 17 dB to 19 dB by tuning external bias of tunable AIs,that is,the tunable amount of S_(21)is 2 dB,and similarly at 8 GHz;the tunable range of 3 dB bandwidth is 1 GHz.In addition,the gain S_(21)flatness is better than 0.4 dB under frequency from 3.1 GHz to 10.6 GHz;the size of the LNA only has 760μm×1260μm(including PADs).Therefore,the proposed strategies in the paper provide a new solution to the design of small size and reconfigurable ultra-wideband(UWB)LNA and can be used further to adjust the variations of gain and bandwidth of radio frequency integrated circuits(RFICs)due to package,parasitic and the variation of fabrication process and temperature. 展开更多
关键词 variable gain variable bandwidth low noise amplifier(lna) resistance feedback tunable active inductor(AI)
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Optimum Design for a Low Noise Amplifier in S-Band
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作者 Xin-Yan Gao Wen-Kai Xie Liang Tang 《Journal of Electronic Science and Technology of China》 2007年第3期234-237,共4页
An optimum design of a low noise amplifier (LNA) in S-band working at 2-4 GHz is described. Choosing FHC40LG high electronic mobility transistor (HEMT), the noise figure of the designed amplifier simulated by Micr... An optimum design of a low noise amplifier (LNA) in S-band working at 2-4 GHz is described. Choosing FHC40LG high electronic mobility transistor (HEMT), the noise figure of the designed amplifier simulated by Microwave Office is no more than 1.5 dB, meanwhile the gain is no less than 20 dB in the given bandwidth. The simulated results agree with the performance of the transistor itself well in consideration of its own minimum noise figure (0.3 dB) and associated gain (15.5 dB). Simultaneously, the stability factor of the designed amplifier is no less than 1 in the given bandwidth. 展开更多
关键词 Gain low noise amplifier (lna noise figure (NF) S-PARAMETERS stability factor.
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Implementation and noise optimization of a 433 MHz low power CMOS LNA 被引量:1
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作者 吴秀山 王志功 +1 位作者 李智群 李青 《Journal of Southeast University(English Edition)》 EI CAS 2009年第1期9-12,共4页
A low power 433 MHz CMOS (complementary metal- oxide-semiconductor transistor) low noise amplifier(LNA), used for an ISM ( industrial-scientific-medical ) receiver, is implemented in a 0. 18 μm SMIC mixed-signa... A low power 433 MHz CMOS (complementary metal- oxide-semiconductor transistor) low noise amplifier(LNA), used for an ISM ( industrial-scientific-medical ) receiver, is implemented in a 0. 18 μm SMIC mixed-signal and RF ( radio frequency) CMOS process. The optimal noise performance of the CMOS LNA is achieved by adjusting the source degeneration inductance and by inserting an appropriate capacitance in parallel with the input transistor of the LNA. The measured results show that at 431 MHz the LNA has a noise figure of 2.4 dB. The S21 is equal to 16 dB, S11 = -11 dB, S22 = -9 dB, and the inverse isolation is 35 dB. The measured input 1-dB compression point (PtdB) and input third-order intermodulation product (IIP3)are - 13 dBm and -3 dBm, respectively. The chip area is 0. 55 mm × 1.2 mm and the DC power consumption is only 4 mW under a 1.8 V voltage supply. 展开更多
关键词 low noise amplifier (lna CASCODE low power noise figure noise optimization
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High performance differential CMOS LNA design for low-IF GPS receiver
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作者 马伟 江金光 刘经南 《Journal of Southeast University(English Edition)》 EI CAS 2009年第1期26-30,共5页
A 1.575 GHz CMOS (complementary metal-oxidesemiconductor transistor) low noise amplifier(LNA) suitable for a low intermediate frequency(IF) global positioning system(GPS) receiver is presented. Considering par... A 1.575 GHz CMOS (complementary metal-oxidesemiconductor transistor) low noise amplifier(LNA) suitable for a low intermediate frequency(IF) global positioning system(GPS) receiver is presented. Considering parasitic effects resulting from bond pad and input electrostatic discharge (ESD) protection diodes, the optimization of the input matching and noise performance is analyzed, and a narrowband inductor model is applied to the circuit design and optimization. Based on the Volterra series, the nonlinearity of the LNA is analyzed and an equation describing input-referred third-order intercept points (IIP3) which indicate the nonlinearity effects is derived; accordingly, the trade-off between the power consumption and linearity is made. The LNA is designed and simulated with TSMC (Taiwan Semiconductor Manufacturing Company) 0. 18 μm radio frequency (RF)technology. Simulation results show that the LNA has a noise figure of only 1.1 dB, - 8. 3 dBm IIP3 with 3 mA current consumption from a 1.8 V voltage supply, and the input impedances match well. 展开更多
关键词 low noise amplifier (lna NONLINEARITY electrostatic discharge (ESD)protection diode
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Design of Low Power CMOS LNA with Current-Reused and Notch Filter Topology for DS-UWB Application
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作者 Meng-Ting Hsu Jhih-Huei Du Wen-Chen Chiu 《Wireless Engineering and Technology》 2012年第3期167-174,共8页
This paper presents the design of a low power LNA with second stage that uses a notch filter for DS-UWB application. The LNA employs a current reuse structure to reduce the power consumption and an active second order... This paper presents the design of a low power LNA with second stage that uses a notch filter for DS-UWB application. The LNA employs a current reuse structure to reduce the power consumption and an active second order notch filter to produce band rejection in the 5 - 6 GHz frequency band. The input reflection coefficient S11 and output reflection S22 are both less than –10 dB. The maximum power gain S21 is 15 dB while the maximum rejection ratio is over –10 dB at 4.8 GHz. The minimum noise figure is 5 dB. The input referred third-order intercept point (IIP3) is –7 dBm at 6 GHz. The power consumption is 6.4 mW from a 1-V power supply. 展开更多
关键词 low Noise amplifier (lna) low Power low Voltage ULTRA-WIDEBAND (UWB) Active NOTCH Filter
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Systematic Approaches of UWB Low-Power CMOS LNA with Body Biased Technique
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作者 Meng-Ting Hsu Kun-Long Wu Wen-Chen Chiu 《Wireless Engineering and Technology》 2015年第3期61-77,共17页
This paper presents research on a low power CMOS UWB LNA based on a cascoded common source and current-reused topology. A systematic approach for the design procedure from narrow band to UWB is developed and discussed... This paper presents research on a low power CMOS UWB LNA based on a cascoded common source and current-reused topology. A systematic approach for the design procedure from narrow band to UWB is developed and discussed in detail. The power reduction can be achieved by using body biased technique and current-reused topology. The optimum width of the major transistor device M1 is determined by the power-constraint noise optimization with inner parasitic capacitance between the gate and source terminal. The derivation of the signal amplification S21 by high frequency small signal model is displayed in the paper. The optimum design of the complete circuit was studied in a step by step analysis. The measurements results show that the proposed circuit has superior S11, gain, noise figure, and power consumption. From the measured results, S11 is lower than -12 dB, S22 is lower than -10 dB and forward gain S21 has an average value with 12 dB. The noise figure is from 4 to 5.7 dB within the whole band. The total power consumption of the proposed circuit including the output buffer is 4.6 mW with a supply voltage of 1 V. This work is implemented in a standard TSMC 0.18 μm CMOS process technology. 展开更多
关键词 Body BIAS Common Source low Noise amplifier (lna) low Power RFCMOS ULTRA-WIDEBAND (UWB)
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Low-Noise Amplification, Detection and Spectroscopy of Ultra-Cold Systems in RF Cavities
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作者 Masroor H. S. Bukhari Zahoor H. Shah 《Modern Instrumentation》 2016年第2期5-16,共12页
The design and development of a cryogenic Ultra-Low-Noise Signal Amplification (ULNA) and detection system for spectroscopy of ultra-cold systems are reported here for the operation in the 0.5 - 4 GHz spectrum of freq... The design and development of a cryogenic Ultra-Low-Noise Signal Amplification (ULNA) and detection system for spectroscopy of ultra-cold systems are reported here for the operation in the 0.5 - 4 GHz spectrum of frequencies (the “L” and “S” microwave bands). The design is suitable for weak RF signal detection and spectroscopy from ultra-cold systems confined in cryogenic RF cavities, as entailed in a number of physics, physical chemistry and analytical chemistry applications, such as NMR/NQR/EPR and microwave spectroscopy, Paul traps, Bose-Einstein Condensates (BEC’s) and cavity Quantum Electrodynamics (cQED). Using a generic Low-Noise Amplifier (LNA) architecture for a GaAs enhancement mode High-Electron Mobility FET device, our design has especially been devised for scientific applications where ultra-low-noise amplification systems are sought to amplify and detect weak RF signals under various conditions and environments, including cryogenic temperatures, with the least possible noise susceptibility. The amplifier offers a 16 dB gain and a 0.8 dB noise figure at 2.5 GHz, while operating at room temperature, which can improve significantly at low temperatures. Both dc and RF outputs are provided by the amplifier to integrate it in a closed-loop or continuous-wave spectroscopy system or connect it to a variety of instruments, a factor which is lacking in commercial LNA devices. Following the amplification stage, the RF signal detection is carried out with the help of a post-amplifier and detection system based upon a set of Zero-Bias Schottky Barrier Diodes (ZBD’s) and a high-precision ultra-low noise jFET operational amplifier. The scheme offers unique benefits of sensitive detection and very-low noise amplification for measuring extremely weak on-resonance signals with substantial low- noise response and excellent stability while eliminating complicated and expensive heterodyne schemes. The LNA stage is fully capable to be a part of low-temperature experiments while being operated in cryogenic conditions down to about 500 mK. 展开更多
关键词 Ultra low-Noise amplifier Vlna lna RF Spectroscopy Microwave Spectroscopy Weak Signal Detection
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一种CMOS超宽带LNA的优化设计方法 被引量:11
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作者 刘萌萌 张盛 +2 位作者 王硕 张建良 周润德 《电子学报》 EI CAS CSCD 北大核心 2009年第5期1082-1086,共5页
为实现性能更优的超宽带(UWB)射频前端低噪声放大器(LNA),本文提出了一种通用的基于CMOS工艺的超宽带LNA优化设计方法.基于源端电感负反馈的LNA电路模型,本文提出利用最优化的数学方法分别确定晶体管尺寸、输入匹配网络和负载网络各元... 为实现性能更优的超宽带(UWB)射频前端低噪声放大器(LNA),本文提出了一种通用的基于CMOS工艺的超宽带LNA优化设计方法.基于源端电感负反馈的LNA电路模型,本文提出利用最优化的数学方法分别确定晶体管尺寸、输入匹配网络和负载网络各元件参数的方法,实现了较好的输入阻抗匹配,达到了较高的增益、较好的增益平坦度以及优秀的噪声系数,并具有较低的功耗;本设计方法所用无源元件不但适宜CMOS集成,而且对工艺偏差具有一定的忍耐力.仿真结果说明用上述方法设计的超宽带LNA在工作频带内能够达到预期的各项性能要求. 展开更多
关键词 射频前端低噪声放大器 超宽带 优化设计方法 CMOS
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基于0.1-μm GaAs pHEMT工艺的最小噪声系数3.9 dB的66~112.5 GHz低噪声放大器
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作者 李泽坤 陈继新 +1 位作者 郑司斗 洪伟 《红外与毫米波学报》 SCIE EI CAS CSCD 北大核心 2024年第2期187-191,共5页
本文基于0.1-μm砷化镓赝配高电子迁移率晶体管(GaAs pHEMT)工艺,研制了一款覆盖整个W波段的宽带低噪声放大器。提出了一种由双并联电容组成的旁路电路,能够提供宽带射频接地,减小了级间串扰,利于实现宽带匹配。采用双谐振匹配网络实现... 本文基于0.1-μm砷化镓赝配高电子迁移率晶体管(GaAs pHEMT)工艺,研制了一款覆盖整个W波段的宽带低噪声放大器。提出了一种由双并联电容组成的旁路电路,能够提供宽带射频接地,减小了级间串扰,利于实现宽带匹配。采用双谐振匹配网络实现了宽带的输入匹配和最佳噪声匹配。实测结果显示,最大增益在108 GHz处达到20.4 dB,在66~112.5 GHz范围内,小信号增益为16.9~20.4 dB。在90 GHz处,实测噪声系数为3.9 dB。实测的输入1-dB压缩点在整个W波段内约为-12 dBm。 展开更多
关键词 砷化镓赝配高电子迁移率晶体管 低噪声放大器 宽带 W波段
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一种具有0.5dB噪声系数的450~470MHz单片集成LNA 被引量:1
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作者 曾健平 戴志伟 +2 位作者 杨浩 张海英 郑新年 《湖南大学学报(自然科学版)》 EI CAS CSCD 北大核心 2014年第2期91-94,共4页
基于0.5μm赝配高电子迁移率晶体管(pHEMT)工艺,设计制造了一款工作于450-470MHz频段的单片集成低噪声放大器(LNA),该LNA采用阻容负反馈的方式实现输入阻抗匹配,减小了无源元件占有的芯片面积,达到了单片集成的目的,同时降低... 基于0.5μm赝配高电子迁移率晶体管(pHEMT)工艺,设计制造了一款工作于450-470MHz频段的单片集成低噪声放大器(LNA),该LNA采用阻容负反馈的方式实现输入阻抗匹配,减小了无源元件占有的芯片面积,达到了单片集成的目的,同时降低了使用成本,测试结果表明,该单片集成LNA具有40dB左右的增益和约0.5dB的噪声系数,其低噪声性能十分优秀,这得益于pHEMT管不引入高损耗的片上电感所带来的好处及其本身优异的低噪声特性. 展开更多
关键词 低噪声放大器 阻容负反馈 单片集成 低频段 PHEMT
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一款应用于GPS的CMOS低功耗高增益LNA 被引量:1
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作者 庄海孝 马成炎 +1 位作者 殷明 于云丰 《微电子学与计算机》 CSCD 北大核心 2009年第6期206-209,212,共5页
针对当前应用于GPS射频前端的LNA存在的不足,设计了一种新型的LNA.从电路结构、噪声匹配、线性度、阻抗匹配、电压增益以及功耗等方面详细讨论了该低噪声放大器的设计.电路采用CMOS0.18μm工艺实现,经过测试,低噪声放大器的增益为40.8dB... 针对当前应用于GPS射频前端的LNA存在的不足,设计了一种新型的LNA.从电路结构、噪声匹配、线性度、阻抗匹配、电压增益以及功耗等方面详细讨论了该低噪声放大器的设计.电路采用CMOS0.18μm工艺实现,经过测试,低噪声放大器的增益为40.8dB,噪声系数为0.525dB,P1dB为-29.5dBm,1.8V电压下的消耗电流仅为1.4mA.电路性能充分满足应用要求. 展开更多
关键词 GPS接收芯片 射频前端 低噪声放大器 电压增益 功耗
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一种并发双频段CMOS LNA的分析与设计 被引量:1
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作者 高丽娜 庞建丽 《电子技术应用》 2018年第12期13-16,共4页
基于0.13μm CMOS工艺,设计了一种应用于WLAN IEEE 802.11 a/b/g标准的并发双频段低噪声放大器(LNA)。为了在功耗限制下同时实现噪声系数和输入阻抗的匹配,采用共源共栅电感退化拓扑结构。该LNA在2.4 GHz和5.2 GHz下,输入发射系数分别为... 基于0.13μm CMOS工艺,设计了一种应用于WLAN IEEE 802.11 a/b/g标准的并发双频段低噪声放大器(LNA)。为了在功耗限制下同时实现噪声系数和输入阻抗的匹配,采用共源共栅电感退化拓扑结构。该LNA在2.4 GHz和5.2 GHz下,输入发射系数分别为-16.7 dB和-19.5 dB,正向增益分别为16.8 dB和17.2 dB。而且在2.4 GHz和5.2 GHz下,噪声系数分别取得了3.1 dB和3.2 dB,输入三阶截止点分别为-18.5 dBm和-16.5 dBm。该LNA在1.2 V电压供电下,所消耗的功耗为2.64 mW。 展开更多
关键词 双频段 低噪声放大器 低功耗 高增益
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