Low-Complexity Optimization Algorithm for Irregular Low-Density Parity-Check Codes

A low-complexity algorithm is proposed in this paper in order to optimize irregular low-density parity-check(LDPC)codes.The algorithm proposed can calculate the noise threshold by means of a one-dimensional density evolution and search the optimal degree profiles with fast-convergence differential evolution,so that it has a lower complexity and a faster convergence speed.Simulation results show that the irregular LDPC codes optimized by the presented algorithm can also perform better than Turbo codes at moderate block length even with less computation cost.

Low-Density Parity-Check Codes: Research Status and Development Direction

In this paper, we conclude five kinds of methods for construction of the regular low-density parity matrix H and three kinds of methods for the construction of irregular low-density parity-check matrix H. Through the analysis of the code rate and parameters of these eight kinds of structures, we find that the construction of low-density parity-check matrix tends to be more flexible and the parameter variability is enhanced. We propose that the current development cost should be lower with the progress of electronic technology and we need research on more practical Low-Density Parity-Check Codes (LDPC). Combined with the application of the quantum distribution key, we urgently need to explore the research direction of relevant theories and technologies of LDPC codes in other fields of quantum information in the future.

Analysis of LDPC Code in Hybrid Communication Systems

Free-space optical(FSO)communication is of supreme importance for designing next-generation networks.Over the past decades,the radio frequency(RF)spectrum has been the main topic of interest for wireless technology.The RF spectrum is becoming denser and more employed,making its availability tough for additional channels.Optical communication,exploited for messages or indications in historical times,is now becoming famous and useful in combination with error-correcting codes(ECC)to mitigate the effects of fading caused by atmospheric turbulence.A free-space communication system(FSCS)in which the hybrid technology is based on FSO and RF.FSCS is a capable solution to overcome the downsides of current schemes and enhance the overall link reliability and availability.The proposed FSCS with regular low-density parity-check(LDPC)for coding techniques is deliberated and evaluated in terms of signal-to-noise ratio(SNR)in this paper.The extrinsic information transfer(EXIT)methodology is an incredible technique employed to investigate the sum-product decoding algorithm of LDPC codes and optimize the EXIT chart by applying curve fitting.In this research work,we also analyze the behavior of the EXIT chart of regular/irregular LDPC for the FSCS.We also investigate the error performance of LDPC code for the proposed FSCS.

DESIGN OF LOW-DENSITY PARITY CHECK CODES FOR MIMO SYSTEMS WITH DOUBLY-ITERATIVE RECEIVERS

In this paper, the Multiple Input Multiple Output (MIMO) doubly-iterative receiver which consists of the Probabilistic Data Association detector (PDA) and Low-Density Parity-Check Code (LDPC) decoder is developed. The receiver performs two iterative decoding loops. In the outer loop, the soft information is exchanged between the PDA detector and the LDPC decoder. In the inner loop, it is exchanged between variable node and check node decoders inside the LDPC decoder. On the light of the Extrinsic Information Transfer (EXIT) chart technique, an LDPC code degree profile optimization algorithm is developed for the doubly-iterative receiver. Simulation results show the doubly-receiver with optimized irregular LDPC code can have a better performance than the one with the regular one.

Erasure-Correction-Enhanced Iterative Decoding for LDPC-RS Product Codes

Low-density parity-check(LDPC)codes are widely used due to their significant errorcorrection capability and linear decoding complexity.However,it is not sufficient for LDPC codes to satisfy the ultra low bit error rate(BER)requirement of next-generation ultra-high-speed communications due to the error floor phenomenon.According to the residual error characteristics of LDPC codes,we consider using the high rate Reed-Solomon(RS)codes as the outer codes to construct LDPC-RS product codes to eliminate the error floor and propose the hybrid error-erasure-correction decoding algorithm for the outer code to exploit erasure-correction capability effectively.Furthermore,the overall performance of product codes is improved using iteration between outer and inner codes.Simulation results validate that BER of the product code with the proposed hybrid algorithm is lower than that of the product code with no erasure correction.Compared with other product codes using LDPC codes,the proposed LDPC-RS product code with the same code rate has much better performance and smaller rate loss attributed to the maximum distance separable(MDS)property and significant erasure-correction capability of RS codes.

Implementation of encoder and decoder for LDPC codes based on FPGA

This paper proposes a parallel cyclic shift structure of address decoder to realize a high-throughput encoding and decoding method for irregular-quasi-cyclic low-density parity-check(IR-QC-LDPC)codes,with a dual-diagonal parity structure.A normalized min-sum algorithm(NMSA)is employed for decoding.The whole verification of the encoding and decoding algorithm is simulated with Matlab,and the code rates of 5/6 and 2/3 are selected respectively for the initial bit error ratio as 6%and 1.04%.Based on the results of simulation,multi-code rates are compatible with different basis matrices.Then the simulated algorithms of encoder and decoder are migrated and implemented on the field programmable gate array(FPGA).The 183.36 Mbps throughput of encoder and the average 27.85 Mbps decoding throughput with the initial bit error ratio 6%are realized based on FPGA.

DESIGN OF QUASI-CYCLIC LDPC CODES BASED ON EUCLIDEAN GEOMETRIES

A new method for constructing Quasi-Cyclic (QC) Low-Density Parity-Check (LDPC) codes based on Euclidean Geometry (EG) is presented. The proposed method results in a class of QC-LDPC codes with girth of at least 6 and the designed codes perform very close to the Shannon limit with iterative decoding. Simulations show that the designed QC-LDPC codes have almost the same performance with the existing EG-LDPC codes.

JOINT ITERATIVE DECODING FOR SIMPLE-ENCODING SYSTEMATIC IRREGULAR-LDPC-BASED CODED COOPERATION IN NON-IDEAL RELAY CHANNEL

In this paper, a new kind of simple-encoding irregular systematic LDPC codes suitable for one-relay coded cooperation is designed, where the proposed joint iterative decoding is effectively performed in the destination which is in accordance with the corresponding joint Tanner graph characterizing two different component LDPC codes used by the source and relay in ideal and non-ideal relay cooperations. The theoretical analysis and simulations show that the coded cooperation scheme obviously outperforms the coded non-cooperation one under the same code rate and decoding complex. The significant performance improvement can be virtually credited to the additional mutual exchange of the extrinsic information resulted by the LDPC code employed by the source and its counterpart used by the relay in both ideal and non-ideal cooperations.

Ensemble of High Performance Structured Binary Convolutional LDPC Codes with Moderate Rates

An algebraic construction methodology is proposed to design binary time-invariant convolutional low-density parity-check(LDPC)codes.Assisted by a proposed partial search algorithm,the polynomialform parity-check matrix of the time-invariant convolutional LDPC code is derived by combining some special codewords of an(n,2,n−1)code.The achieved convolutional LDPC codes possess the characteristics of comparatively large girth and given syndrome former memory.The objective of our design is to enable the time-invariant convolutional LDPC codes the advantages of excellent error performance and fast encoding.In particular,the error performance of the proposed convolutional LDPC code with small constraint length is superior to most existing convolutional LDPC codes.

Construction of Regular Rate-Compatible LDPC Convolutional Codes

In this paper, we propose a new method to derive a family of regular rate-compatible low-density parity-check（RC-LDPC） convolutional codes from RC-LDPC block codes. In the RC-LDPC convolutional family, each extended sub-matrix of each extended code is obtained by choosing specified elements from two fixed matrices HE1K and HE1K, which are derived by modifying the extended matrices HE1 and HE2 of a systematic RC-LDPC block code. The proposed method which is based on graph extension simplifies the design, and prevent the defects caused by the puncturing method. It can be used to generate both regular and irregular RC-LDPC convolutional codes. All resulted codes in the family are systematic which simplify the encoder structure and have maximum encoding memories which ensure the property. Simulation results show the family collectively offer a steady improvement in performance with code compatibility over binary-input additive white Gaussian noise channel（BI-AWGNC）.

Efficient Early Termination Strategy for LDPC Codes in GPS Systems

By exploiting the structural features of L1C messages,a novel Early Termination( ET) strategy is proposed to speed up the decoding of low-density parity-check( LDPC) codes in the GPS system. The proposed strategy is based on the cyclic redundancy check( CRC) of the messages in the subframes 2 and 3. The simulation results show that average number of iterations of the proposed strategy is less than that of the standard ET strategy,with nearly no degradation in decoding performance. Besides,the proposed ET strategy can be efficiently implemented in a sequential or parallel manner. Thus,the proposed ET strategy is attractive for practical purposes.

Performances of Chaos Coded Modulation Schemes Based on Mod-MAP Mapping and High Dimensional LDPC Based Mod-MAP Mapping with Belief Propagation

In this paper, we propose to generalize the coding schemes first proposed by Kozic &al to high spectral efficient modulation schemes. We study at first Chaos Coded Modulation based on the use of small dimensional modulo-MAP encoding process and we give a solution to study the distance spectrum of such coding schemes to accurately predict their performances. However, the obtained performances are quite poor. To improve them, we use then a high dimensional modulo-MAP mapping process similar to the low-density generator-matrix codes (LDGM) introduced by Kozic &al. The main difference with their work is that we use an encoding and decoding process on GF (2m) which enables to obtain better performances while preserving a quite simple decoding algorithm when we use the Extended Min-Sum (EMS) algorithm of Declercq &Fossorier.

Construction of Rate-Compatible(RC) Low-Density Parity-Check(LDPC) Convolutional Codes Based on RC-LDPC Block Codes

In this paper,a family of rate-compatible(RC) low-density parity-check(LDPC) convolutional codes can be obtained from RC-LDPC block codes by graph extension method.The resulted RC-LDPC convolutional codes,which are derived by permuting the matrices of the corresponding RC-LDPC block codes,are systematic and have maximum encoding memory.Simulation results show that the proposed RC-LDPC convolutional codes with belief propagation(BP) decoding collectively offer a steady improvement on performance compared with the block counterparts over the binary-input additive white Gaussian noise channels(BI-AWGNCs).

Block Markov superposition transmission of LDPC codes

In this paper,based on the block Markov superposition transmission(BMST)technique,we present a new class of coupled low-density parity-check(LDPC)codes for the transport block(TB)-based transmission to improve the error-correcting performance.For encoding,the previous LDPC codewords corresponding to a TB(at prior time slot)are interleaved and superimposed onto the current LDPC codewords,resulting in the transmitted codewords.For decoding,the sliding window decoding algorithm with sum-product or min-sum implementations can be employed,inheriting a relatively low-latency decoding.A distinguished advantage of the proposed coded transmission over spatially coupled LDPC(SC-LDPC)codes is that the encoder/decoder of the proposed codes can be designed by reusing the encoder/decoder architecture of component block LDPC codes.To analyze the waterfall performance of BMST-LDPC code ensembles,we present the protograph-based EXIT chart analysis,which can efficiently predict the error-correcting performance in waterfall region.To analyze the error-floor performance of BMST-LDPC codes,we employ the genie-aided(GA)lower bound,which can efficiently predict the error-correcting performance in error-floor region.For ease of implementation,the BMST-LDPC codes are constructed by taking the(2,4)-raptor-like LDPC codes or the 5G LDPC codes as the basic components.The numerical results reveal that the proposed codes can have capacity-approaching performance,exhibiting a gap of 0.007 dB away from the corresponding Shannon limit.They also reveal that,by using the proposed BMST construction,the error-correcting performance of the original 5G block LDPC codes can be significantly improved,achieving coding gains up to one dB over the AWGN channels and two dB over the fast fading channels.

A CLASS OF DETERMINISTIC CONSTRUCTION OF BINARY COMPRESSED SENSING MATRICES

Compressed Sensing (CS) is an emerging technology in the field of signal processing, which can recover a sparse signal by taking very few samples and solving a linear programming problem. In this paper, we study the application of Low-Density Parity-Check (LDPC) Codes in CS. Firstly, we find a sufficient condition for a binary matrix to satisfy the Restricted Isometric Property (RIP). Then, by employing the LDPC codes based on Berlekamp-Justesen (B-J) codes, we construct two classes of binary structured matrices and show that these matrices satisfy RIP. Thus, the proposed matrices could be used as sensing matrices for CS. Finally, simulation results show that the performance of the proposed matrices can be comparable with the widely used random sensing matrices.

Edge Coloring of Graphs with Applications in Coding Theory

In this paper,a new type of edge coloring of graphs together with an algorithm for such an edge coloring is presented to construct some columnweight three low-density parity-check(LDPC)codes whose Tanner graphs are free of 4-cycles.This kind of edge coloring is applied on some well-known classes of graphs such as complete graphs and complete bipartite graphs to generate some column-weight 3 LDPC codes having flexibility in terms of code length and rate.Interestingly,the constructed(3;k)-regular codes with regularities k=4;5;:::;22 have lengths n=12;20;26,35;48;57;70;88;104;117;140;155;176;204;228;247;280;301;330;having minimum block length compared to the best known similar codes in the literature.In addition to linear complexity of generating such parity-check matrices,they can be considered as the base matrices of some quasi-cyclic(QC)LDPC codes with maximum achievable girth 18,which inherit the low-complexity encoder implementations of QC-LDPC codes.Simulation results show that the QC-LDPC codes with large girth lifted from the constructed base matrices have good performances and outperform random codes,progressive edge growth LDPC codes,some finite fields and group rings based QC-LDPC codes and also have a close competition to the standard IEEE 802.16e(WiMAX)code.

LP-LDPC:Three-Level Parallel FPGA Architecture for Fast Prototyping of LDPC Decoder Using High-Level Synthesis

Low-Density Parity-heck Codes(LDPC)with excellent error-correction capabilities have been widely used in both data communication and storage fields,to construct reliable cyber-physical systems that are resilient to real-world noises.Fast prototyping field-programmable gate array(FPGA)-based decoder is essential to achieve high decoding performance while accelerating the development process.This paper proposes a three-level parallel architecture,TLP-LDPC,to achieve high throughput by fully exploiting the characteristics of both LDPC and underlying hardware while effectively scaling to large-size FPGA platforms.The three-level parallel architecture contains a low-level decoding unit,a mid-level multi-unit decoding core,and a high-level multi-core decoder.The low-level decoding unit is a basic LDPC computation component that effectively combines the features of the LDPC algorithm and hardware with the specific structure(e.g.,Look-Up-Table,LUT)of the FPGA and eliminates potential data conflicts.The mid-level decoding core integrates the input/output and multiple decoding units in a well-balancing pipelined fashion.The top-level multi-core architecture conveniently makes full use of board-level resources to improve the overall throughput.We develop an LDPC C++code with dedicated pragmas and leverage HLS tools to implement the TLP-LDPC architecture.Experimental results show that TLP-LDPC achieves 9.63 Gbps end-to-end decoding throughput on a Xilinx Alveo U50 platform,3.9x higher than existing HLS-based FPGA implementations.

Semi-LDPC Convolutional Codes:Construction and Low-Latency Windowed List Decoding

This paper presents a new coding scheme called semi-low-density parity-check convolutional code(semi-LDPC-CC),whose parity-check matrix consists of both sparse and dense sub-matrices,a feature distinguished from the conventional LDPC-CCs.We propose sliding-window list(SWL)decoding algorithms with a fixed window size of two,resulting in a low decoding latency but a competitive error-correcting performance.The performance can be predicted by upper bounds derived from the first event error probability and by genie-aided(GA)lower bounds estimated from the underlying LDPC block codes(LDPC-BCs),while the complexity can be reduced by truncating the list with a threshold on the difference between the soft metrics in the serial decoding implementation.Numerical results are presented to validate our analysis and demonstrate the performance advantage of the semi-LDPC-CCs over the conventional LDPC-CCs.

Generalized sparse codes for non-Gaussian channels:Code design,algorithms,and applications

In this paper,generalized sparse(GS)codes are proposed to support reliable and efficient transmission over non-Gaussian channels.Specifically,by expanding the single-parity check(SPC)code constraints with powerful algebraic codes,GS codes generalize conventional sparse codes with enhanced error-correcting capability,as well as better code design flexibility by covering a wide range of block-lengths and coding rates with reduced encoding/decoding complexity.Moreover,by introducing a universal communication channel model,a general framework for performance analysis and code design of GS codes is formulated,by which the coding parameters can be optimized for different target channel conditions.Finally,example codes are constructed for several critical application scenarios with non-Gaussian channels.Numerical simulations are performed to demonstrate the superiority of the proposed GS coding scheme to traditional channel coding schemes.

Performance analysis of different coding schemes for wideband vehicle-to-vehicle MIMO systems

The signal is subjected to lots of interferences in vehicle-to-vehicle(V2V)channel propagation,resulting in receiving error codes.Two-dimensional(2D)and three-dimensional(3D)geometrical channel models are used to depict the wideband V2V multiple-input multiple-output(MIMO)channels.Using the channel model,Turbo code and low-density parity-check(LDPC)code are investigated for wideband V2V MIMO system,and the encoding and the decoding schemes are investigated.The bit error rate(BER),channel capacity and outage probability of wideband V2V MIMO system using Turbo code and LDPC code are analyzed at different typical speeds.The results show that the performance of wideband V2V MIMO system using Turbo code outperform that using LDPC code.The performance is affected by transmitting and receiving speeds with the same coding scheme.And the channel capacity of the 3D channel is larger than that of 2D channel.