A compacted and low-offset low-power CMOS am- plifier for biosensor application is presented in this paper. It includes a low offset Op-Amp and a high precision current reference. With a novel continuous-time DC offse...A compacted and low-offset low-power CMOS am- plifier for biosensor application is presented in this paper. It includes a low offset Op-Amp and a high precision current reference. With a novel continuous-time DC offset rejection scheme, the IC achieves lower offset voltage and lower power consumption compared to previous designs. This configuration rejects large DC offset and drift that exist at the skin-electrode interface without the need of external components. The proposed amplifier has been implemented in SMIC 0.18-μm 1P6M CMOS technol-ogy, with an active silicon area of 100 μm by 120 μm. The back-annotated simulation results demonstrated the circuit features the systematic offset voltage less than 80 μV, the offset drift about 0.27 μV/℃ for temperature ranging from –30℃ to 100℃ and the total power dissipation consumed as low as 37.8 μW from a 1.8 V single supply. It dedicated to monitor low amplitude biomedical signals recording.展开更多
A novel low-offset dynamic comparator for high-speed low-voltage analog-to-digital converters （ADCs） has been proposed.In the proposed comparator,a CMOS switch takes the place of the dynamic current sources in the d...A novel low-offset dynamic comparator for high-speed low-voltage analog-to-digital converters （ADCs） has been proposed.In the proposed comparator,a CMOS switch takes the place of the dynamic current sources in the differential comparator,which allows the differential input transistors still to operate in the saturation region at the comparing time.This gives the proposed comparator a low offset as the differential comparator while tolerating a sub-1-V supply voltage.Additionally,it also features a larger input swing,less sensitivity to common mode voltage,and a simple relationship between the input and reference voltage.This proposed comparator with two traditional comparators has been realized by SMIC 0.13μm CMOS technology.The contrast experimental results verify these advantages over conventional comparators.It has been used in a 12-bit 100-MS/s pipeline ADC.展开更多
文摘A compacted and low-offset low-power CMOS am- plifier for biosensor application is presented in this paper. It includes a low offset Op-Amp and a high precision current reference. With a novel continuous-time DC offset rejection scheme, the IC achieves lower offset voltage and lower power consumption compared to previous designs. This configuration rejects large DC offset and drift that exist at the skin-electrode interface without the need of external components. The proposed amplifier has been implemented in SMIC 0.18-μm 1P6M CMOS technol-ogy, with an active silicon area of 100 μm by 120 μm. The back-annotated simulation results demonstrated the circuit features the systematic offset voltage less than 80 μV, the offset drift about 0.27 μV/℃ for temperature ranging from –30℃ to 100℃ and the total power dissipation consumed as low as 37.8 μW from a 1.8 V single supply. It dedicated to monitor low amplitude biomedical signals recording.
基金Project supported by the National High Technology Research and Development Program of China(No.2009AA011600)the Young Scientists Fund of Fudan University,China(No.09FQ33)the State Key Laboratory of ASIC and System,Fudan University,China(No. 09MS008)
文摘A novel low-offset dynamic comparator for high-speed low-voltage analog-to-digital converters （ADCs） has been proposed.In the proposed comparator,a CMOS switch takes the place of the dynamic current sources in the differential comparator,which allows the differential input transistors still to operate in the saturation region at the comparing time.This gives the proposed comparator a low offset as the differential comparator while tolerating a sub-1-V supply voltage.Additionally,it also features a larger input swing,less sensitivity to common mode voltage,and a simple relationship between the input and reference voltage.This proposed comparator with two traditional comparators has been realized by SMIC 0.13μm CMOS technology.The contrast experimental results verify these advantages over conventional comparators.It has been used in a 12-bit 100-MS/s pipeline ADC.
