Enhancement of fMAX of InP-based HEMTs by double-recessed offset gate process

A double-recessed offset gate process technology for In P-based high electron mobility transistors(HEMTs)has been developed in this paper.Single-recessed and double-recessed HEMTs with different gate offsets have been fabricated and characterized.Compared with single-recessed devices,the maximum drain-source current(I_(D,max))and maximum extrinsic transconductance(g_(m,max))of double-recessed devices decreased due to the increase in series resistances.However,in terms of RF performance,double-recessed HEMTs achieved higher maximum oscillation frequency(f_(MAX))by reducing drain output conductance(g_(m,max))and drain to gate capacitance(C_gd).In addition,further improvement of fMAXwas observed by adjusting the gate offset of double-recessed devices.This can be explained by suppressing the ratio of C_(gd)to source to gate capacitance(C_gd)by extending drain-side recess length(Lrd).Compared with the single-recessed HEMTs,the f;of double-recessed offset gate HEMTs was increased by about 20%.

Impact of gate offset in gate recess on DC and RF performance of InAlAs/InGaAs InP-based HEMTs

A set of 100-nm gate-length In P-based high electron mobility transistors(HEMTs)were designed and fabricated with different gate offsets in gate recess.A novel technology was proposed for independent definition of gate recess and T-shaped gate by electron beam lithography.DC and RF measurement was conducted.With the gate offset varying from drain side to source side,the maximum drain current(I_(ds,max))and transconductance(g_(m,max))increased.In the meantime,fTdecreased while f;increased,and the highest fmax of 1096 GHz was obtained.It can be explained by the increase of gate-source capacitance and the decrease of gate-drain capacitance and source resistance.Output conductance was also suppressed by gate offset toward source side.This provides simple and flexible device parameter selection for HEMTs of different usages.

70-nm-gated InAlN/GaN HEMTs grown on SiC substrate with f_T/f_(max)>160GHz

lnA1N/GaN high-electron-mobility transistors （HEMTs） on SiC substrate were fabricated and character- ized. Several techniques, consisting of high electron density, 70 nm T-shaped gate, low ohmic contacts and a short drain-source distance, are integrated to gain high device performance. The fabricated InA1N/GaN HEMTs exhibit a maximum drain saturation current density of 1.65 A/ram at Vgs = 1 V and a maximum peak transconductance of 382 mS/rnm. In addition, a unity current gain cut-off frequency （fT） of 162 GHz and a maximum oscillation frequency （fmax） of 176 GHz are achieved on the devices with the 70 nm gate length.