A double-recessed offset gate process technology for In P-based high electron mobility transistors(HEMTs)has been developed in this paper.Single-recessed and double-recessed HEMTs with different gate offsets have been...A double-recessed offset gate process technology for In P-based high electron mobility transistors(HEMTs)has been developed in this paper.Single-recessed and double-recessed HEMTs with different gate offsets have been fabricated and characterized.Compared with single-recessed devices,the maximum drain-source current(I_(D,max))and maximum extrinsic transconductance(g_(m,max))of double-recessed devices decreased due to the increase in series resistances.However,in terms of RF performance,double-recessed HEMTs achieved higher maximum oscillation frequency(f_(MAX))by reducing drain output conductance(g_(m,max))and drain to gate capacitance(C_gd).In addition,further improvement of fMAXwas observed by adjusting the gate offset of double-recessed devices.This can be explained by suppressing the ratio of C_(gd)to source to gate capacitance(C_gd)by extending drain-side recess length(Lrd).Compared with the single-recessed HEMTs,the f;of double-recessed offset gate HEMTs was increased by about 20%.展开更多
A set of 100-nm gate-length In P-based high electron mobility transistors(HEMTs)were designed and fabricated with different gate offsets in gate recess.A novel technology was proposed for independent definition of gat...A set of 100-nm gate-length In P-based high electron mobility transistors(HEMTs)were designed and fabricated with different gate offsets in gate recess.A novel technology was proposed for independent definition of gate recess and T-shaped gate by electron beam lithography.DC and RF measurement was conducted.With the gate offset varying from drain side to source side,the maximum drain current(I_(ds,max))and transconductance(g_(m,max))increased.In the meantime,fTdecreased while f;increased,and the highest fmax of 1096 GHz was obtained.It can be explained by the increase of gate-source capacitance and the decrease of gate-drain capacitance and source resistance.Output conductance was also suppressed by gate offset toward source side.This provides simple and flexible device parameter selection for HEMTs of different usages.展开更多
lnA1N/GaN high-electron-mobility transistors (HEMTs) on SiC substrate were fabricated and character- ized. Several techniques, consisting of high electron density, 70 nm T-shaped gate, low ohmic contacts and a short...lnA1N/GaN high-electron-mobility transistors (HEMTs) on SiC substrate were fabricated and character- ized. Several techniques, consisting of high electron density, 70 nm T-shaped gate, low ohmic contacts and a short drain-source distance, are integrated to gain high device performance. The fabricated InA1N/GaN HEMTs exhibit a maximum drain saturation current density of 1.65 A/ram at Vgs = 1 V and a maximum peak transconductance of 382 mS/rnm. In addition, a unity current gain cut-off frequency (fT) of 162 GHz and a maximum oscillation frequency (fmax) of 176 GHz are achieved on the devices with the 70 nm gate length.展开更多
基金supported by the National Natural Science Foundation of China(Grant Nos.61874036,62174041,and61434006)the Open Project of State Key Laboratory of ASIC and System(Grant No.KVH1233021)+3 种基金the Opening Foundation of the State Key Laboratory of Advanced Materials and Electronic Components(Grant No.FHR-JS-201909007)the Guangxi Innovation Research Team Project(Grant Nos.2018GXNSFGA281004 and 2018GXNSFBA281152)the Guangxi Innovation Driven Development Special Fund Project(Grant No.AA19254015)the Guangxi Key Laboratory of Precision Navigation Technology and Application Project(Grant Nos.DH201906,DH202020,and DH202001)。
文摘A double-recessed offset gate process technology for In P-based high electron mobility transistors(HEMTs)has been developed in this paper.Single-recessed and double-recessed HEMTs with different gate offsets have been fabricated and characterized.Compared with single-recessed devices,the maximum drain-source current(I_(D,max))and maximum extrinsic transconductance(g_(m,max))of double-recessed devices decreased due to the increase in series resistances.However,in terms of RF performance,double-recessed HEMTs achieved higher maximum oscillation frequency(f_(MAX))by reducing drain output conductance(g_(m,max))and drain to gate capacitance(C_gd).In addition,further improvement of fMAXwas observed by adjusting the gate offset of double-recessed devices.This can be explained by suppressing the ratio of C_(gd)to source to gate capacitance(C_gd)by extending drain-side recess length(Lrd).Compared with the single-recessed HEMTs,the f;of double-recessed offset gate HEMTs was increased by about 20%.
基金Project supported by the National Nature Science Foundation of China(Grant No.61434006)。
文摘A set of 100-nm gate-length In P-based high electron mobility transistors(HEMTs)were designed and fabricated with different gate offsets in gate recess.A novel technology was proposed for independent definition of gate recess and T-shaped gate by electron beam lithography.DC and RF measurement was conducted.With the gate offset varying from drain side to source side,the maximum drain current(I_(ds,max))and transconductance(g_(m,max))increased.In the meantime,fTdecreased while f;increased,and the highest fmax of 1096 GHz was obtained.It can be explained by the increase of gate-source capacitance and the decrease of gate-drain capacitance and source resistance.Output conductance was also suppressed by gate offset toward source side.This provides simple and flexible device parameter selection for HEMTs of different usages.
基金supported by the National Natural Science Foundation of China(No.61306113)
文摘lnA1N/GaN high-electron-mobility transistors (HEMTs) on SiC substrate were fabricated and character- ized. Several techniques, consisting of high electron density, 70 nm T-shaped gate, low ohmic contacts and a short drain-source distance, are integrated to gain high device performance. The fabricated InA1N/GaN HEMTs exhibit a maximum drain saturation current density of 1.65 A/ram at Vgs = 1 V and a maximum peak transconductance of 382 mS/rnm. In addition, a unity current gain cut-off frequency (fT) of 162 GHz and a maximum oscillation frequency (fmax) of 176 GHz are achieved on the devices with the 70 nm gate length.