Improved performance of 4H-SiC metal-semiconductor field-effect transistors with step p-buffer layer

An improved 4H-SiC metal-semiconductor field-effect transistors （MESFETs） with step p-buffer layer is proposed, and the static and dynamic electrical performances are analysed in this paper. A step p-buffer layer has been applied not only to increase the channel current, but also to improve the transconductance. This is due to the fact that the variation in p-buffer layer depth leads to the decrease in parasitic series resistance resulting from the change in the active channel thickness and modulation in the electric field distribution inside the channel. Detailed numerical simulations demonstrate that the saturation drain current and the maximum theoretical output power density of the proposed structure are about 30% and 37% larger than those of the conventional structure. The cut-off frequency and the maximum oscillation frequency of the proposed MESFETs are 14.5 and 62 GHz, respectively, which are higher than that of the conventional structure. Therefore, the 4H-SiC MESFETs with step p-buffer layer have superior direct-current and radio-frequency performances compared to the similar devices based on the conventional structure.

Drain-induced barrier lowering effect for short channel dual material gate 4H silicon carbide metal-semiconductor field-effect transistor

Sub-threshold characteristics of the dual material gate 4H-SiC MESFET （DMGFET） are investigated and the analytical models to describe the drain-induced barrier lowering （DIBL） effect are derived by solving one- and two- dimensional Poisson＇s equations. Using these models, we calculate the bottom potential of the channel and the threshold voltage shift, which characterize the drain-induced barrier lowering （DIBL） effect. The calculated results reveal that the dual material gate （DMG） structure alleviates the deterioration of the threshold voltage and thus suppresses the DIBL effect due to the introduced step function, which originates from the work function difference of the two gate materials when compared with the conventional single material gate metal-semiconductor field-effect transistor （SMGFET）.

The Model for Linear Magnetoresistance of Two-Dimensional Metal-Semiconductor Composites with Interfacial Shells

A metal-semiconductor composite with the interracial shells is investigated theoretically for the large linear mag- netoresistance effect of high doping Ag2＋δ Se and Ag2＋δ te materials. The magnetoresistance （MR） of composites is a function of the magnetic field, temperature, the conductivities of two phases without magnetic field, and the thickness and conductivity of the interracial shells. The MR increases with the increase of the magnetic field and with the decrease of temperature, and no saturation is found even under the high magnetic field. Moreover, it is interestingly found that the interracial shell is an important factor for the MR of the composites. The MR increases with the thickness and the conductivity of the interfacial shells. Lastly, the theoretical results on the MR are compared with the experimental data. It is found that the value of the MR of the composite with the interfacial shell is larger than that without the interfacial shell.

MODELING OF METAL-SEMICONDUCTOR-METAL PHOTODETECTOR

A complete model of Metal-Semiconductor-Metal Photodetector(MSM-PD) is presented. It can be used in any circuit simulators. Simulated DC characteristics for a GaAs MSM-PD are in good agreement with reported results.

Metal-Semiconductor Interfaces Investigated by Positron Annihilation Spectroscopy

Variable-energy positron annihilation spectroscopy has been applied to study interfaces in Al/Si, Au/Si and Au/GaAs structures. Computational fittings of ROYPROF program were used to analyze Doppler broadening results in order to determine kinds of regions that positrons were likely to sample. The interfaces were found acting as a capturing thin layer with negligible positrons stopped in them and their characteristics came only from positrons diffusing to these interfaces, the positron work function of these materials were taken into consideration. In all fittings, the interfaces are found to have 1 nm thickness and act as an absorbing sink for all thermal positrons diffusing towards them, and this indicates either the existence of open volume defects or a weakness of known theoretical models for positron affinities. The result is supported by measurements obtained by applying external electric fields on Al/Si sample. Theoretical fittings have clearly demonstrated the sensitivity of interfaces in these attempts and their importance in data analyzing and in developing of fitting cods.

sp^(2) to sp^(3) hybridization transformation in 2D metal-semiconductor contact interface suppresses tunneling barrier and Fermi level pinning simultaneously

Van der Waals (vdWs) stacking of two-dimensional (2D) materials can effectively weaken the Fermi level pinning (FLP) effect in metal/semiconductor contacts due to dangling-bond-free surfaces. However, the inherent vdWs gap always induces a considerable tunneling barrier, significantly limiting carrier injection. Herein, by inducing a sp^(2) to sp^(3) hybridization transformation in 2D carbon-based metal via surface defect engineering, the large orbital overlap can form an efficient carrier channel, overcoming the tunneling barrier. Specifically, by selecting the 2D carbon-based X_(3)C_(2) (X = Cd, Hg, and Zn) metal and the 2D MSi_(2)N_(4) (M = Cr, Hf, Mo, Ti, V, and Zr) semiconductor, we constructed 36 metal/semiconductor contacts. For vdWs contacts, although Ohmic contacts can be formed at the interface, the highest tunneling probability (P TB) is only 3.11%. As expected, the P TB can be significantly improved, as high as 48.73%, when MSi_(2)N_(4), accompanied by surface nitrogen vacancies, forms an interface covalent bond with X_(3)C_(2). Simultaneously, weak FLP and Ohmic contact remain at the covalent-bond-based surface, attributing to the protection of the MSi_(2)N_(4) band-edge electronic states by the outlying Si-N sublayer. Our work provides a promising path for advancing the progress of 2D electronic and photoelectronic devices.

Epitaxial growth of metal-semiconductor van der Waals heterostructures NbS2/MoS2 with enhanced performance of transistors and photodetectors

Two-dimensional(2D)heterostructures based on layered transition metal dichalcogenides(TMDs)have attracted increasing attention for the applications of the nextgeneration high-performance integrated electronics and optoelectronics.Although various TMD heterostructures have been successfully fabricated,epitaxial growth of such atomically thin metal-semiconductor heterostructures with a clean and sharp interface is still challenging.In addition,photodetectors based on such heterostructures have seldom been studied.Here,we report the synthesis of high-quality vertical NbS2/MoS2metallic-semiconductor heterostructures.By using NbS2as the contact electrodes,the field-effect mobility and current on-off ratio of MoS2can be improved at least 6-fold and two orders of magnitude compared with the conventional Ti/Au contact,respectively.By using NbS2as contact,the photodetector performance of MoS2is much improved with higher responsivity and less response time.Such facile synthesis of atomically thin metal-semiconductor heterostructures by a simple chemical vapor deposition strategy and its effectiveness as ultrathin 2D metal contact open the door for the future application of electronics and optoelectronics.

Ultrathin nanoporous metal-semiconductor heterojunction photoanodes for visible light hydrogen evolution

Plasmonic metal-semiconductor nano-heterojuncfions （NHJs）, with their superior photocatalytic performance, provide opportunities for the efficient utilization of solar energy. However, scientific significance and technical challenges remain in the development of suitable metal-semiconductor NHJ photoelectrodes for new generation flexible optoelectronic devices, which often require complex processing. Herein, we report integrated three-dimensional （3D） NHJ photoelectrodes by conformally coating cadmium sulfide （CdS） nanolayers onto ultrathin nano- porous gold （NPG） films via a facile electrodeposition method. Localized surface plasmon resonance （LSPR） of NPG enhances the electron-hole pair generation and separation. Moreover, the direct contact interface and high conductive framework structure of the NHJs boosts the photogenerated carrier separation and transport. Hence, the NHJs exhibit evidently enhanced photocurrent density and hydrogen evolution rate relative to CdS deposited on either gold （Au） foil or fluorine-doped tin oxide （FTO） at 0 V vs. SCE （saturated calomel electrode） under visible-light irradiation. Moreover, they demonstrate a surprisingly stable photoelectrochemical hydrogen evolution （PEC-HE） activity over 104 s of continuous irradiation.

Engineering Colloidal Metal-Semiconductor Nanorods Hybrid Nanostructures for Photocatalysis

Emerging engineering strategies of colloidal metal-semiconductor nanorod hybrid nanostructures spanning from type,size,dimension,and location of both metal nanoparticles and semiconductors,co-catalyst,band gap structure,surface ligand to hole scavenger are elaborated symmetrically to rationalize the design of this type of intriguing materials for efficient photocatalytic applications.

二氧化钒发射率的调控方法与实践

二氧化钒(VO_(2))是一种常用的相变材料,它能在68℃附近可逆地改变光学、电学特性以响应外部温度刺激。自20世纪90年代以来,人们对VO_(2)光学特性进行了广泛的研究,并在紫外、可见和近红外区域的调制方面取得了重大进展,而室温黑体辐射所处的中远红外区能量只相当于太阳辐射的15%,因而获得的关注较少。然而随着研究的深入,研究者发现中远红外光区的长波辐射对热调控也具有至关重要的作用,甚至在太阳辐射较强的白天也是不容忽视的,因此有关VO_(2)发射率调控的研究受到越来越多的关注。文章聚焦VO2发射率调控的最新研究进展,着重介绍VO_(2)发射率的调控手段以及常温热辐射调控性能,并对其应用前景进行了展望。文章指出,VO_(2)发射率可以有效调控室温黑体辐射能量,通过新型结构如Fabry-Pérot谐振腔、超材料等与VO_(2)的有机结合,极大丰富了VO_(2)发射率的调控手段,展现出显著的调控效果,这对于实现具有更高节能效率的智能建筑、空间热管理以及红外伪装具有很大的潜力。

适用于SiC MOSFET的漏源电压积分自适应快速短路保护电路研究

SiC MOSFET因其高击穿电压、高开关速度、低导通损耗等性能优势而被广泛应用于各类电力电子变换器中。然而,由于其短路耐受时间仅为2~7μs,且随母线电压升高而缩短,快速可靠的短路保护电路已成为其推广应用的关键技术之一。为应对不同母线电压下的Si C MOSFET短路故障,文中提出一种基于漏源电压积分的自适应快速短路保护方法(drain-sourcevoltageintegration-basedadaptivefast short-circuit protection method,DSVI-AFSCPM),研究所提出的DSVI-AFSCPM在硬开关短路(hardswitchingfault,HSF)和负载短路(fault under load,FUL)条件下的保护性能,进而研究不同母线电压对DSVI-AFSCPM的作用机理。同时,探究Si CMOSFET工作温度对其响应速度的影响。最后,搭建实验平台,对所提出的DSVI-AFSCPM在发生硬开关短路和负载短路时不同母线电压、不同工作温度下的保护性能进行实验测试。实验结果表明,所提出的DSVI-AFSCPM在不同母线电压下具有良好的保护速度自适应性,即母线电压越高,短路保护速度越快,并且其响应速度受Si CMOSFET工作温度影响较小,两种短路工况下工作温度从25℃变化到125℃,短路保护时间变化不超过90 ns。因此,该文为Si CMOSFET在不同母线电压下的可靠使用提供一定技术支撑。

国产功率芯片射频解冻模块设计与应用

为提高射频解冻领域相关产品的自主可控能力,基于国产自研横向扩散金属氧化物半导体(lateral diffusedmetaloxidesemiconductors,LDMOS)功率芯片,提出一种由全国产晶体管放大电路构成的大功率射频解冻模块设计方案。该方案核心放大电路部分采用三级级联自研功率放大器,分别为前置级DS5089、驱动级DS6S0910P和末级DS300AN,并设计大功率射频解冻模块。对模块进行射频性能测试、功能测试以及可靠性测试。研究结果表明:基于国产晶体管设计的模块具备较好的射频性能,饱和输出功率大于53 dBm,电源转化效率超过60%,并能在特定时间内快速有效地完成食物解冻。研究结论为射频解冻领域国产晶体管放大电路设计提供参考。

用于射频能量收集的低阈值CMOS整流电路设计

基于TSMC 180 nm工艺,设计了一款高效率低阈值整流电路。在传统差分输入交叉耦合整流电路的基础上,提出源极与衬底之间增加双PMOS对称辅助晶体管配合缓冲电容的改进结构,对整流晶体管进行阈值补偿。有效缓解了MOS管的衬底偏置效应,降低了整流电路的开启阈值电压,针对较低输入信号功率,提高了整流电路的功率转换效率(PCE)。同时将低阈值整流电路三级级联以提高输出电压。测试结果显示,在输入信号功率为-14 dBm@915 MHz时,三级级联低阈值整流电路实现了升压功能,能稳定输出1.2 V电压,峰值PCE约为71.32%。相较于传统结构,该低阈值整流电路更适合用于射频能量收集。

SOI高压LDMOS器件氧化层抗总电离剂量辐射效应研究

绝缘体上硅(SOI)高压横向扩散金属氧化物半导体(LDMOS)器件是高压集成电路的核心器件,对其进行了总电离剂量(TID)辐射效应研究。利用仿真软件研究了器件栅氧化层、场氧化层和埋氧化层辐射陷阱电荷对电场和载流子分布的调制作用,栅氧化层辐射陷阱电荷主要作用于器件沟道区,而场氧化层和埋氧化层辐射陷阱电荷则主要作用于器件漂移区;辐射陷阱电荷在器件内部感生出的镜像电荷改变了器件原有的电场和载流子分布,从而导致器件阈值电压、击穿电压和导通电阻等参数的退化。对80 V SOI高压LDMOS器件进行了总电离剂量辐射实验,结果表明在ON态和OFF态下随着辐射剂量的增加器件性能逐步衰退,当累积辐射剂量为200 krad(Si)时,器件的击穿电压大于80 V,阈值电压漂移为0.3 V,器件抗总电离剂量辐射能力大于200 krad(Si)。

大功率射频Si-VDMOS功率晶体管研制

介绍了大功率射频硅-垂直双扩散金属氧化物场效应晶体管(Si-VDMOS)的研制结果,采用栅分离降低反馈电容技术、多子胞降低源极电感技术等,从芯片原理着手,比较分析两种芯片结构设计对反馈电容的影响,以及两种布局引线对源极电感的影响,并研制出了百瓦级以上大功率射频Si-VDMOS功率晶体管系列产品。产品主要性能如下:在工作电压28 V及连续波下,采用8胞合成时,225 MHz输出功率达200 W以上,500 MHz输出功率达150 W以上;进一步增加子胞数量,采用12胞合成时,225 MHz输出功率达300 W以上,同时具备良好的增益及效率特性,与国外大功率射频Si-VDMOS功率晶体管的产品参数相比,达到了同类产品水平。

SiC MOSFET开关瞬态解析建模综述

在评估和优化半导体器件开关瞬态特性领域,解析模型因具有简单、直观、应用便捷等优点得到广泛研究。相较同等功率等级的硅基功率器件,碳化硅(silicon carbide,SiC)金属氧化物半导体场效应晶体管(metal-oxide-semiconductor field effect transistor,MOSFET)可以应用于更高开关速度,其开关瞬态特性更为复杂,开关瞬态解析建模也更加困难。该文总结现有的针对SiC MOSFET与二极管换流对的开关瞬态解析建模方法,在建模过程中依次引入各种简化假设,按照简化程度由低到高的顺序,梳理解析建模的逐步简化过程。通过对比,评估各模型的优缺点以及适用场合,对其中准确性、实用性都较强的分段线性模型进行详细介绍;之后,对开关瞬态建模中关键参数的建模方法进行总结与评价;最后,指出现有SiC MOSFET开关瞬态解析模型中存在的问题,并对其未来发展给出建议。

金属氧化物半导体MEMS气体传感器研究进展

随着物联网的快速发展,各领域对气体监测的需求越来越大,基于先进微机电系统(Micro-electro-mechanical systems, MEMS)技术的金属氧化物半导体(Metal oxide semiconductor, MOS)气体传感器在过去几十年里取得了很大发展。MEMS微热板的多样化设计、MOSs纳米结构的多样化以及机器学习算法的出现为MEMS的传感性能以及智能传感系统的构建提供了很大助力。本文从MEMS气体传感器的分类、制备和应用以及传感器阵列的构建等方面综述了金属氧化物半导体MEMS气体传感器的最新研究进展,并对MEMS基气体传感器的发展前景进行了总结和展望。

MEMS矢量水听器敏感结构的后CMOS释放工艺研究

纤毛式微机电系统(MEMS)矢量水听器可探测水下质点振速等矢量信息,与互补金属氧化物半导体(CMOS)集成能够很大程度地提升其性能。针对纤毛式MEMS矢量水听器的CMOS集成提出了一种方案,该方案在MEMS后处理工艺中,利用侧墙保护和各向异性湿法腐蚀从正面释放水听器的十字梁敏感结构。整个后处理过程不需要光刻,降低加工难度的同时,保证了加工结构的精确性。设计出了一种验证性的工艺流程,具体分析了4种不同结构的湿法腐蚀过程。最终完成了这4种结构的工艺流片,对实验结果进行了分析。实验验证了该方案的可行性,为纤毛式MEMS矢量水听器的CMOS集成奠定了基础。

双沟槽SiC金属-氧化物-半导体型场效应管重离子单粒子效应

本文针对第四代双沟槽型碳化硅场效应晶体管升展了不同源漏偏置电压下208 MeV锗离子辐照实验,分析了器件产生单粒子效应的物理机制.实验结果表明,辐照过程中随着初始偏置电压的增大,器件漏极电流增长更明显;在偏置电压为400 V时,重离子注量达到9×10^(4)ion/cm^(2),器件发生单粒子烧毁,在偏置电压为500 V时,重离子注量达到3×10^(4)ion/cm^(2),器件发生单粒子烧毁,单粒子烧毁阈值电压在器件额定工作电压的34%(400 V)以下.对辐照后器件进行栅特性测试,辐照过程中偏置电压为100 V的器件泄漏电流无明显变化;200 V和300 V时,器件的栅极泄漏电流和漏极泄漏电流都增大.结合TCAD仿真模拟进一步分析器件单粒子效应微观机制,结果表明在低偏压下,泄漏电流增大是因为电场集中在栅氧化层的拐角处,导致了氧化层的损伤;在高偏压下,辐照过程中N-外延层和N+衬底交界处发生的电场强度增大,引起显著的碰撞电离,由碰撞电离产生的局域大电流密度导致晶格温度超过碳化硅的熔点,最终引起单粒子烧毁.