Effect and mechanism of on-chip electrostatic discharge protection circuit under fast rising time electromagnetic pulse

The electrostatic discharge(ESD)protection circuit widely exists in the input and output ports of CMOS digital circuits,and fast rising time electromagnetic pulse(FREMP)coupled into the device not only interacts with the CMOS circuit,but also acts on the protection circuit.This paper establishes a model of on-chip CMOS electrostatic discharge protection circuit and selects square pulse as the FREMP signals.Based on multiple physical parameter models,it depicts the distribution of the lattice temperature,current density,and electric field intensity inside the device.At the same time,this paper explores the changes of the internal devices in the circuit under the injection of fast rising time electromagnetic pulse and describes the relationship between the damage amplitude threshold and the pulse width.The results show that the ESD protection circuit has potential damage risk,and the injection of FREMP leads to irreversible heat loss inside the circuit.In addition,pulse signals with different attributes will change the damage threshold of the circuit.These results provide an important reference for further evaluation of the influence of electromagnetic environment on the chip,which is helpful to carry out the reliability enhancement research of ESD protection circuit.

Dynamics Analysis of Fractional Order Memristive Time Delay Chaotic System and Circuit Implementation

The integer order memristive time delay chaotic system has attracted much attention and has been well discussed.However,the fractional order system is closer to the real system.In this paper,a nonlinear time delay chaotic circuit based on fractional order memristive system was proposed.Some dynamical properties,including equilibrium points,stability,bifurcation,and Lyapunov exponent of the oscillator,were investigated in detail by theoretical analyses and simulations.Moreover,the nonlinear phenomena of coexisting bifurcation and attractor was found.The phenomenon shows that the state of this oscilator was highly sensitive to its initial value,which is called coexistent oscillation in this paper.Finally,the results of the system circuit simulation accomplished by Multisim were perfectly consistent with theoretical analyses and numerical simulation.

Design and implementation of high speed TDI CCD timing-driven circuits

The time delay integration charge coupled device(TDI CCD)is the key component in remote sensing systems.The paper analyzes the structure and the working principles of the device according to a customized TDI CCD chip.Employing the special clock resources and large-scale phase locked logic(PLL)in field-programmable gate arrays(FPGA),a timing-driven approach is proposed,using which all timing signals including reset gate,horizontal and vertical timing signals,are implemented in one chip.This not only reduces printed circuit board(PCB)space,but also enhances the portability of the system.By studying and calculating CCD parameters thoroughly,load capacity and power consumption,package,etc,are compared between various candidates chips,and detailed comparison results are also listed in table.Experimental results show that clock generator and driving circuit satisfy the requirements of high speed TDI CCD.

Timing-Driven Variation-Aware Partitioning and Optimization of Mixed Static-Dynamic CMOS Circuits

The advancement in CMOS technology has surpassed the progress in computer aided design tools, creating an avenue for new design optimization flows. This paper presents a design level transistor sizing based timing optimization algorithms for mixed-static-dynamic CMOS logic designs. This optimization algorithm performs timing optimization through partitioning a design into static and dynamic circuits based on timing critical paths, and is further extended through a process variation aware circuit level timing optimization algorithm for dynamic CMOS circuits. Implemented on a 64-b adder and ISCAS benchmark circuits for mixed-static-dynamic CMOS, the design level optimization algorithm demonstrated a critical path delay improvement of over 52% in comparison with static CMOS implementation by state-of-the-art commercial optimization tools.

Graph Modeling for Static Timing Analysis at Transistor Level in Nano-Scale CMOS Circuits

The development and the revolution of nanotechnology require more and effective methods to accurately estimating the timing analysis for any CMOS transistor level circuit. Many researches attempted to resolve the timing analysis, but the best method found till the moment is the Static Timing Analysis (STA). It is considered the best solution because of its accuracy and fast run time. Transistor level models are mandatory required for the best estimating methods, since these take into consideration all analysis scenarios to overcome problems of multiple-input switching, false paths and high stacks that are found in classic CMOS gates. In this paper, transistor level graph model is proposed to describe the behavior of CMOS circuits under predictive Nanotechnology SPICE parameters. This model represents the transistor in the CMOS circuit as nodes in the graph regardless of its positions in the gates to accurately estimating the timing analysis rather than inaccurate estimating which caused by the false paths at the gate level. Accurate static timing analysis is estimated using the model proposed in this paper. Building on the proposed model and the graph theory concepts, new algorithms are proposed and simulated to compute transistor timing analysis using RC model. Simulation results show the validity of the proposed graph model and its algorithms by using predictive Nano-Technology SPICE parameters for the tested technology. An important and effective extension has been achieved in this paper for a one that was published in international conference.

Real-Time Method for Detecting Harmonic and Reactive Currents of Single-Phase Circuits

According to the characteristics of single-phase circuits and demand of using active filter for real-time detecting harmonic and reactive currents, a detecting method based on Fryze＇s power definition is proposed. The results of theoretical analysis and simula- tion show that the proposed method is effective in realtime detecting of instantaneous harmonic and reactive currents in single-phase circuits. When only detecting the total reactive currents, this method does not need a phase-locked loop circuit, and it also can be used in some special applications to provide different compensations on the ground of different requirements of electric network. Compared with the other methods based on the theory of instantaneous reactive power, this method is simple and easy to realize.

Traffic Signal Timing via Deep Reinforcement Learning

In this paper, we propose a set of algorithms to design signal timing plans via deep reinforcement learning. The core idea of this approach is to set up a deep neural network (DNN) to learn the Q-function of reinforcement learning from the sampled traffic state/control inputs and the corresponding traffic system performance output. Based on the obtained DNN, we can find the appropriate signal timing policies by implicitly modeling the control actions and the change of system states. We explain the possible benefits and implementation tricks of this new approach. The relationships between this new approach and some existing approaches are also carefully discussed. © 2014 Chinese Association of Automation.

Test system of the front-end readout for an application-specific integrated circuit for the water Cherenkov detector array at the large high-altitude air shower observatory

The water Cherenkov detector array(WCDA) is an important part of the large high-altitude air shower observatory(LHAASO),which is in a research and development phase.The central scientific goal of LHAASO is to explore the origin of high-energy cosmic rays of the universe and to push forward the frontier of new physics.To simplify the WCDA's readout electronics,a prototype of a front-end readout for an application-specific integrated circuit(ASIC) is designed based on the timeover-threshold method to achieve charge-to-time conversion.High-precision time measurement and charge measurement are necessary over a full dynamic range[1-4000photoelectrons(P.E.)].To evaluate the performance of this ASIC,a test system is designed that includes the front-end ASIC test module,digitization module,and test software.The first module needs to be customized for different ASIC versions,whereas the digitization module and test software are tested for general-purpose use.In the digitization module,a field programmable gate array-based time-todigital converter is designed with a bin size of 333 ps,which also integrates an inter-integrated circuit to configure the ASIC test module,and a universal serial bus interface is designed to transfer data to the remote computer.Test results indicate that the time resolution is better than 0.5 ns,and the charge resolution is better than 30%root mean square(RMS) at 1 P.E.and 3%RMS at 4000 P.E.,which are beyond the application requirements.

Artificial Bee Colony Algorithm-based Parameter Estimation of Fractional-order Chaotic System with Time Delay

It is an important issue to estimate parameters of fractional-order chaotic systems in nonlinear science, which has received increasing interest in recent years. In this paper, time delay and fractional order as well as system's parameters are concerned by treating the time delay and fractional order as additional parameters. The parameter estimation is converted into a multi-dimensional optimization problem. A new scheme based on artificial bee colony ABC algorithm is proposed to solve the optimization problem. Numerical experiments are performed on two typical time-delay fractional-order chaotic systems to verify the effectiveness of the proposed method. © 2014 Chinese Association of Automation.

A New Analyzing Method of Single Event Latch-Up Protection Circuit Based on Current Comparing and Its Performance Verification

Single event latch-up (SEL) is a significant issue for electronics design in space application, which would cause large currents in electronic devices, and may lead to burning out of devices. A new monitoring circuit based on current-comparing method is designed to protect the electronics away from SEL’s damage in radiation environment. The response time of protection circuit has been analyzed. The signal simulation results indicated that the operating time of the SEL protection circuit is dependent on the action time of current comparator and system application recovery time. The function of the monitoring circuit protection device away from SEL’s damage has validated through experiment at last.

Direct Current Circuit Breaker in EAST

This paper introduces the configuration and the operation principles of a high power direct current circuit breaker （DCCB）. The commutating current principle of the breaker is described in details with its theory and simulation analysis. The test results presented show that the DCCB meets the requirements for quenching protection. It will be used as the main breaker for quench protection in EAST.

Research on Online Monitoring Methods on SF_(6) Circuit Breakers

To promote the accuracy and application of arcing time measurement for SF_6 circuit breaker in substation,five measurement methods are investigated by two cases experimentally. First,the test results of the five methods for a circuit breaker in different stages of wear and a circuit breaker with a component failure were presented. Then,the time error is analyzed by simulation.Finally,the advantage and disadvantage of these methods are discussed.

Process Analysis of Double Circuit Transmission Line Trip-out on the Same Tower Due to Lightning

In recent years,several failures of double circuit transmission line on the same tower due to lightning were happened in Beijing power grid.Although it can be reclosed successful,the lightning strike caused a grave threat to the power grid security.The cause of the accident and the accident process were studied for the sake of further understanding of the impact of lightning on power grid.As an example,110 kV double circuit transmission line(Xilong-line) was analyzed.At first,the system topology was given.Through the analysis on relay protection actions and the fault recorder data,over voltage on the insulator strings was calculated.Based on the analysis and the calculation,accident cause and the process were presented respectively.Secondly,it comes to the conclusion that the lightning failure was caused by counterattack.The wave of the lightning over voltage would spread to the not grounded neutral point of the transformers,and make the neutral protective gap breakdown,then cause freewheeling with the frequency of 50 Hz.As results of the relay protection,the double circuit transmission line all tripped out.Finally,the causes of the accident were proposed that included terrain features,large corner towers,strong thunderstorm weather and poor grounded contact of the tower.

An Experiment to Improve the Model of Lumped Element Circuit

The model of lumped element circuit ignores the finite time of signals to propagate around a circuit. However, using modern oscilloscope, the time of nanoseconds in a circuit can be measured. Then the speed of alternating electricity can be obtained in a RL circuit. A typical RL circuit is formed by a power source, wire, resistance and inductance. The basic formula is: U(t)=I(t)R+LdI(t)/dt. It can be derived from the Ohm’s law and Kirchhoff laws. Based on our experimental results, this paper has discussed the new explanation of this equation in a RL circuit. As a result, the speed of alternating electricity is greater than light in a special RL circuit. The model of lumped element circuit can be improved when considering the finite time of signals.

Modeling and Simulations in Symmetrical Supercapacitors Using Time Domain Mathematical Expressions

This study presents the deduction of time domain mathematical equations to simulate the curve of the charging process of a symmetrical electrochemical supercapacitor with activated carbon electrodes fed by a source of constant electric potential in time ε and the curve of the discharge process through two fixed resistors. The first resistor RCo is a control that aims to prevent sudden variations in the intensity of the electric current i1(t) present at the terminals of the electrochemical supercapacitor at the beginning of the charging process. The second resistor is the internal resistance RA of the ammeter used in the calculation of the intensity of the electric current i1(t) over time in the charging and discharging processes. The mathematical equations generated were based on a 2R(C + kUC(t)) electrical circuit model and allowed to simulate the effects of the potential-dependent capacitance (kUC(t)) on the charge and discharge curves and hence on the calculated values of the fixed capacitance C, the equivalent series resistance (ESR), the equivalent parallel resistance (EPR) and the electrical potential dependent capacitance index k.

Real-time and wearable functional electrical stimulation system for volitional hand motor function control using the electromyography bridge method

Voluntary participation of hemiplegic patients is crucial for functional electrical stimulation therapy.A wearable functional electrical stimulation system has been proposed for real-time volitional hand motor function control using the electromyography bridge method.Through a series of novel design concepts,including the integration of a detecting circuit and an analog-to-digital converter,a miniaturized functional electrical stimulation circuit technique,a low-power super-regeneration chip for wireless receiving,and two wearable armbands,a prototype system has been established with reduced size,power,and overall cost.Based on wrist joint torque reproduction and classification experiments performed on six healthy subjects,the optimized surface electromyography thresholds and trained logistic regression classifier parameters were statistically chosen to establish wrist and hand motion control with high accuracy.Test results showed that wrist flexion/extension,hand grasp,and finger extension could be reproduced with high accuracy and low latency.This system can build a bridge of information transmission between healthy limbs and paralyzed limbs,effectively improve voluntary participation of hemiplegic patients,and elevate efficiency of rehabilitation training.

基于短时傅里叶变换和深度网络的模块化多电平换流器子模块IGBT开路故障诊断

针对现有模块化多电平换流器(MMC)子模块故障诊断过程中所需传感器较多、测量干扰较大等问题,提出一种基于深度学习的MMC子模块IGBT开路故障诊断方法。在对MMC子模块开路故障特征进行分析的基础上,利用短时傅里叶变换(STFT)提取桥臂电压信号的谐波分量信息作为故障诊断所需的特征参数。将所得到的特征参数进行处理后构建故障诊断样本,在通过深度置信网络实现故障类型快速检测的基础上,依据不同故障类型,构建多个基于卷积神经网络的故障定位网络,进而实现开路故障的检测与定位。通过129电平的MMC系统仿真模型和降功率的MMC实验系统搭建,对该文所提方法进行了验证。仿真和实验结果表明,所提故障诊断方法可以在减少传感器数量的基础上实现子模块开路故障的诊断,提高系统的可靠性。

Dynamic modeling and analysis of the closed-circuit grinding-classification process

Mathematical models of the grinding process are the basis of analysis, simulation and control. Most existent models in- cluding theoretical models and identification models are, however, inconvenient for direct analysis. In addition, many models pay much attention to the local details in the closed-circuit grinding process while overlooking the systematic behavior of the process as a whole. From the systematic perspective, the dynamic behavior of the whole closed-circuit grinding-classification process is consid- ered and a first-order transfer function model describing the dynamic relation between the raw material and the product is established. The model proves that the time constant of the closed-circuit process is lager than that of the open-circuit process and reveals how physical parameters affect the process dynamic behavior. These are very helpful to understand, design and control the closed-circuit grinding-classification process.

基于自抗扰的永磁同步电机附加谐波损耗抑制方法

针对永磁同步电机在变频器供电时,由时间电流谐波所引起的附加谐波损耗过大及难以在电机初始设计时被考虑到的问题,采用场路耦合联合仿真模型来计算电机的附加谐波损耗,并以4台现有的表贴式永磁同步电机为例,通过实验验证了场路耦合联合仿真模型的有效性,为电机设计之初附加谐波损耗的选取,以及后续温升的计算提供了前期计算的方法。同时提出一种基于自抗扰技术的附加谐波损耗抑制方法,设计一种适用于永磁同步电机矢量控制的自抗扰控制器,并从理论上验证了自抗扰控制器对于时间电流谐波的抑制作用,以及针对自抗扰控制器参数众多调参困难的问题,给出一种参数整定方案。最后通过引入所设计的自抗扰控制器,对电机的时间电流谐波进行计算和分析,使电机的附加谐波损耗降低了68.1%,为同类型电机的附加谐波损耗抑制提供了一种有效的方法。