Multi-core processors are becoming prevalent rapidly in personal computing and embedded systems. Nevertheless, the programming environment for multi-core processor-based systems is still quite immature and lacks effic...Multi-core processors are becoming prevalent rapidly in personal computing and embedded systems. Nevertheless, the programming environment for multi-core processor-based systems is still quite immature and lacks efficient tools. In this work, we present a new VERTAF/Multi-Core framework and show how software code can be automatically generated from SysML models of multi-core embedded systems. We illustrate how model-driven design based on SysML can be seamlessly integrated with Intel＇s threading building blocks （TBB） and the quantum framework （QF） middleware. We use a digital video recording system to illustrate the benefits of the framework. Our experiments show how SysML/QF/TBB help in making multi-core embedded system programming model-driven, easy, and efficient.展开更多
Multi-core architectures are widely used to in time-to-market and power consumption of the chips enhance the microprocessor performance within a limited increase Toward the application of high-density data signal pro...Multi-core architectures are widely used to in time-to-market and power consumption of the chips enhance the microprocessor performance within a limited increase Toward the application of high-density data signal processing, this paper presents a novel heterogeneous multi-core architecture digital signal processor （DSP）, YHFT-QDSP, with one RISC CPU core and 4 VLIW DSP cores. By three kinds of interconnection, YHFT-QDSP provides high efficiency message communication for inner-chip RISC core and DSP cores, inner-chip and inter-chip DSP cores. A parallel programming platform is specifically developed for the heterogeneous nmlti-core architecture of YHFT-QDSP. This parallel programming environment provides a parallel support library and a friendly interface between high level application softwares and multi- core DSP. The 130 nm CMOS custom chip design results benchmarks show that the interconnection structure of in a high speed and moderate power design. The results of typical YHFT-QDSP is much better than other related structures and achieves better speedup when using the interconnection facilities in combing methods. YHFT-QDSP has been signed off and manufactured presently. The future applications of the multi-core chip could be found in 3G wireless base station, high performance radar, industrial applications, and so on.展开更多
A multifrontal code is introduced for the efficient solution of the linear system of equations arising from the analysis of structures. The factorization phase is reduced into a series of interleaved element assembly ...A multifrontal code is introduced for the efficient solution of the linear system of equations arising from the analysis of structures. The factorization phase is reduced into a series of interleaved element assembly and dense matrix operations for which the BLAS3 kernels are used. A similar approach is generalized for the forward and back substitution phases for the efficient solution of structures having multiple load conditions. The program performs all assembly and solution steps in parallel. Examples are presented which demonstrate the code’s performance on single and dual core processor computers.展开更多
伴随水电规模的扩大,水电站群优化调度的计算量不断增加,需要探求新的方法。在分析离散微分动态规划(discrete differentiation and dynamic programming,DDDP)算法的基础上,提出了基于分治模式的梯级水电站长期优化调度的细粒度并行离...伴随水电规模的扩大,水电站群优化调度的计算量不断增加,需要探求新的方法。在分析离散微分动态规划(discrete differentiation and dynamic programming,DDDP)算法的基础上,提出了基于分治模式的梯级水电站长期优化调度的细粒度并行离散微分动态规划(parallel discrete differentiation and dynamic programming,PDDDP)方法,并以澜沧江梯级的6个电站系统长期优化调度问题为应用实例,在多核计算环境下进行验证。结果表明,多核环境下的PDDDP方法简便易行,能充分利用闲置计算资源、大幅度提高优化调度的计算效率,是解决大规模复杂水电系统调度的高效和实用方法。展开更多
多核处理器越来越普及,如何通过软件技术最大提升CPU每个核心的使用率,成为热点问题。引入多核并行编程模型Threading Building Blocks,并与raw threads、Open MP进行各方面详细比较,分析了其优劣。并研究了TBB结合MPI在SMP集群系统上...多核处理器越来越普及,如何通过软件技术最大提升CPU每个核心的使用率,成为热点问题。引入多核并行编程模型Threading Building Blocks,并与raw threads、Open MP进行各方面详细比较,分析了其优劣。并研究了TBB结合MPI在SMP集群系统上实现高效的混合并行计算应用的方法。最终发现TBB在多核编程方面有显著的优势。TTB和MPI的结合,又为多核处理器结点集群提供了并行层次化结构,大大优化集群的性能。展开更多
文摘Multi-core processors are becoming prevalent rapidly in personal computing and embedded systems. Nevertheless, the programming environment for multi-core processor-based systems is still quite immature and lacks efficient tools. In this work, we present a new VERTAF/Multi-Core framework and show how software code can be automatically generated from SysML models of multi-core embedded systems. We illustrate how model-driven design based on SysML can be seamlessly integrated with Intel＇s threading building blocks （TBB） and the quantum framework （QF） middleware. We use a digital video recording system to illustrate the benefits of the framework. Our experiments show how SysML/QF/TBB help in making multi-core embedded system programming model-driven, easy, and efficient.
基金supported by the National Science and Technology Major Project of the Ministry of Science and Technology of China under Grant No.2009ZX01034-001-001-006the National High Technology Research and Development 863 Program of China under Grant No.2007AA01Z108the Program for Changjiang Scholars and Innovative Research Team in Universities of China under Grant No.IRT0614.
文摘Multi-core architectures are widely used to in time-to-market and power consumption of the chips enhance the microprocessor performance within a limited increase Toward the application of high-density data signal processing, this paper presents a novel heterogeneous multi-core architecture digital signal processor （DSP）, YHFT-QDSP, with one RISC CPU core and 4 VLIW DSP cores. By three kinds of interconnection, YHFT-QDSP provides high efficiency message communication for inner-chip RISC core and DSP cores, inner-chip and inter-chip DSP cores. A parallel programming platform is specifically developed for the heterogeneous nmlti-core architecture of YHFT-QDSP. This parallel programming environment provides a parallel support library and a friendly interface between high level application softwares and multi- core DSP. The 130 nm CMOS custom chip design results benchmarks show that the interconnection structure of in a high speed and moderate power design. The results of typical YHFT-QDSP is much better than other related structures and achieves better speedup when using the interconnection facilities in combing methods. YHFT-QDSP has been signed off and manufactured presently. The future applications of the multi-core chip could be found in 3G wireless base station, high performance radar, industrial applications, and so on.
文摘A multifrontal code is introduced for the efficient solution of the linear system of equations arising from the analysis of structures. The factorization phase is reduced into a series of interleaved element assembly and dense matrix operations for which the BLAS3 kernels are used. A similar approach is generalized for the forward and back substitution phases for the efficient solution of structures having multiple load conditions. The program performs all assembly and solution steps in parallel. Examples are presented which demonstrate the code’s performance on single and dual core processor computers.
文摘伴随水电规模的扩大,水电站群优化调度的计算量不断增加,需要探求新的方法。在分析离散微分动态规划(discrete differentiation and dynamic programming,DDDP)算法的基础上,提出了基于分治模式的梯级水电站长期优化调度的细粒度并行离散微分动态规划(parallel discrete differentiation and dynamic programming,PDDDP)方法,并以澜沧江梯级的6个电站系统长期优化调度问题为应用实例,在多核计算环境下进行验证。结果表明,多核环境下的PDDDP方法简便易行,能充分利用闲置计算资源、大幅度提高优化调度的计算效率,是解决大规模复杂水电系统调度的高效和实用方法。
文摘多核处理器越来越普及,如何通过软件技术最大提升CPU每个核心的使用率,成为热点问题。引入多核并行编程模型Threading Building Blocks,并与raw threads、Open MP进行各方面详细比较,分析了其优劣。并研究了TBB结合MPI在SMP集群系统上实现高效的混合并行计算应用的方法。最终发现TBB在多核编程方面有显著的优势。TTB和MPI的结合,又为多核处理器结点集群提供了并行层次化结构,大大优化集群的性能。
