Characteristics of dual-frequency capacitively coupled SF_6/O_2 plasma and plasma texturing of multi-crystalline silicon

Due to it being environmentally friendly, much attention has been paid to the dry plasma texturing technique serving as an alternative candidate for multicrystalline silicon （mc-Si） surface texturing. In this paper, capacitively coupled plasma （CCP） driven by a dual frequency （DF） of 40.68 MHz and 13.56 MHz is first used for plasma texturing of mc-Si with SF6/O2 gas mixture. Using a hairpin resonant probe and optical emission techniques, DF-CCP characteristics and their influence on mc-silicon surface plasma texturing are investigated at different flow rate ratios, pressures, and radio-frequency （RF） input powers. Experimental results show that suitable plasma texturing of mc-silicon occurs only in a narrow range of plasma parameters, where electron density ne must be larger than 6.3 x 109 cm-3 and the spectral intensity ratio of the F atom to that of the O atom （[F]/[O]） in the plasma must be between 0.8 and 0.3. Out of this range, no cone-like structure is formed on the mc-silicon surface. In our experiments, the lowest reflectance of about 7.3% for mc-silicon surface texturing is obtained at an [F]/[O] of 0.5 and ne of 6.9 × 109 cm-3.

Microstructure studies of the grinding damage in monocrystalline silicon wafers

The depth and nature of the subsurface damage in a silicon wafer will limit the performance of IC components. Damage microstructures of the silicon wafers ground by the #325, #600, and #2000 grinding wheels was analyzed. The results show that many microcracks, fractures, and dislocation rosettes appear in the surface and subsurface of the wafer ground by the #325 grinding wheel. No obvious microstructure change exists. The amorphous layer with a thickness of about 100 nm, microcracks, high density dislocations, and polycrystalline silicon are observed in the subsurface of the wafer ground by the #600 grinding wheel. For the wafer ground by the #2000 grinding wheel, an amorphous layer of about 30 nm thickness, a polycrystalline silicon layer, a few dislocations, and an elastic deformation layer exist. In general, with the decrease in grit size, the material removal mode changes from micro-fracture mode to ductile mode gradually.

Formation of subsurface cracks in silicon wafers by grinding

Single-crystal silicon is an important material in the semiconductor and optical industries.However,being hard and brittle,a silicon wafer is vulnerable to subsurface cracks(SSCs)during grinding,which is detrimental to the performance and lifetime of a wafer product.Therefore,studying the formation of SSCs is important for optimizing SSC-removal processes and thus improving surface integrity.In this study,a statistical method is used to study the formation of SSCs induced during grinding of silicon wafers.The statistical results show that grinding-induced SSCs are not stochastic but anisotropic in their distributions.Generally,when grinding with coarse abrasive grains,SSCs form along the cleavage planes,primarily the{111}planes.However,when grinding with finer abrasive grains,SSCs tend to form along planes with a fracture-surface energy higher than that of the cleavage planes.These findings provide a guidance for the accurate detection of SSCs in ground silicon wafers.

Challenges in Processing Diamond Wire Cut and Black Silicon Wafers in Large-Scale Manufacturing of High Efficiency Solar Cells

Texturing of diamond wire cut wafers using a standard wafer etch process chemistry has always been a challenge in solar cell manufacturing industry. This is due to the change in surface morphology of diamond wire cut wafers and the abundant presence of amorphous silicon content, which are introduced from wafer manufacturing industry during sawing of multi-crystalline wafers using ultra-thin diamond wires. The industry standard texturing process for multi-crystalline wafers cannot deliver a homogeneous etched silicon surface, thereby requiring an additive compound, which acts like a surfactant in the acidic etch bath to enhance the texturing quality on diamond wire cut wafers. Black silicon wafers on the other hand require completely a different process chemistry and are normally textured using a metal catalyst assisted etching technique or by plasma reactive ion etching technique. In this paper, various challenges associated with cell processing steps using diamond wire cut and black silicon wafers along with cell electrical results using each of these wafer types are discussed.

Electrochemical behaviors of silicon wafers in silica slurry

The electrochemical behaviors of n-type silicon wafers pH value and solid content of the slurry on the corrosion of silicon in silica-based slurry were investigated, and the influences of the wafers were studied by using electrochemical DC polarization and AC impedance techniques. The results revealed that these factors affected the corrosion behaviors of silicon wafers to different degrees and had their suitable parameters that made the maximum corrosion rate of the wafers. The corrosion potential of （100） sttrface was lower than that of（111）, whereas the current density of （100） was much higher than that of（111）.

DESIGN AND FABRICATION OF SUPER-HYDROPHOBIC SURFACES ON SILICON WAFERS AND STUDY OF EFFECTS TO HYDROPHOBICITY

Some superhydrophobic siliconbased surfaces with periodic square pillar array microstructures were designed and fabricated, also their apparent contact angles （CAs） were quantitatively measured. On the basis of the classical Wenzel＇s theory and Cassie＇s theory, two generally applicable equations corresponding of the cases of wetted contact and composite contact, which could reflect the relations between geometrical parameters of square pillar microstructures and apparent CAs, were educed. Then a theoretical prediction of the fabricated siliconbased surfaces was carried out by the equations, which was compatible with the result of experimental measurement, and this showed the rationality of the educed equations. The CAs of the surface prepared by merely plasma etching to create microstructures and by only Teflon treating were compared, and the result indicated that the effect of the former on achieving hydrophobic surfaces was greater than that of the later. Under the premise of synthetically considering transition between the two contact states, the effects of geometrical parameters of the square pillar microstructures to hydrophobicity were analyzcation, thereon a design condition and a design principle for super-hydrophobic surfaces which would be of specific application value were summarized.

Development of a miniature silicon wafer fuel cell using L-ascorbic acid as fuel

In the current studies a miniature silicon wafer fuel cell(FC) using L-ascorbic acid as fuel was developed. The cell employs L-ascorbic acid and air as reactants and a thin polymer electrolyte as a separator. Inductively coupled plasma(ICP) silicon etching was employed to fabricate high aspect-ratio columns on the silicon substrate to increase the surface area. A thin platinum layer deposited directly on the silicon surface by the sputtering was used as the catalyst layer for L-ascorbic acid electro-oxidation. Cyclic voltammetry shows that the oxidation of L-ascorbic acid on the sputtered platinum layer is irreversible and that the onset potentials for the oxidation of L-ascorbic acid are from 0.27 V to 0.35 V versus an Ag/AgCl reference electrode. It is found that at the room temperature,with 1 mol/L L-ascorbic acid/PBS(phosphate buffered solution) solution pumped to the anode at 1 ml/min flow rate and air spontaneously diffusing to the cathode as the oxidant,the maximum output power density of the cell was 1.95 mW/cm2 at a current density of 10 mA/cm2.

Stability Behaviour of Monolayer Tetraether Lipids on the Amino-Silanised Silicon Wafer: Comparative Study between Langmuir-Blodgett Monolayers with Self-Assembled Monolayers

This study investigated the stability behaviour of molecular monolayer symmetric chemically modified tetraether lipids caldarchaeol-PO4 on the amino-silanised silicon wafer using Langmuir-Blodgett films, Self Assembling Monolayers (SAMs), ellipsometry, and atomic force microscopy (AFM). The monolayers of caldarchaeol-PO4 were stable on the solid surface amino-silanised silicon wafer. The organizations of molecular monolayers caldarchaeol-PO4 by Langmuir-Blodgett method and SAMs have been analyzed. The surface of pressure in Langmuir-Blodgett processing is carried out monolayers caldarchaeol-PO4 more flat island inhomogeneous. Another method of monolayers caldarchaeol-PO4 by SAMs is showed a large flat domain. Monolayers caldarchaeol-PO4 by Langmuir-Blodgett method seems to be stable and chemically resistant after washing with organic solvent and an additional treatment ultrasonification with various thickness lipids arround 2 nm to 6 nm. Conversely, monolayer caldarchaeol-PO4 by SAMs appears fewer than monolayers caldarchaeol-PO4 by Langmuir-Blodgett method, the thickness of various from 1 nm to 3 nm.

Influence of nitrogen implantation into the buried oxide on the radiation hardness of silicon-on-insulator wafers

In order to improve the total-dose radiation hardness of the buried oxide of separation by implanted oxygen silicon- on-insulator wafers, nitrogen ions were implanted into the buried oxide with a dose of 1016 cm-2, and subsequent annealing was performed at 1100 ℃. The effect of annealing time on the radiation hardness of the nitrogen implanted wafers has been studied by the high frequency capacitance-voltage technique. The results suggest that the improvement of the radiation hardness of the wafers can be achieved through a shorter time annealing after nitrogen implantation. The nitrogen-implanted sample with the shortest annealing time 0.5 h shows the highest tolerance to total-dose radiation. In particular, for the 1.0 and 1.5 h annealing samples, both total dose responses were unusual. After 300-krad（Si） irradiation, both the shifts of capacitance-voltage curve reached a maximum, respectively, and then decreased with increasing total dose. In addition, the wafers were analysed by the Fourier transform infrared spectroscopy technique, and some useful results have been obtained.

Microstructure evolution and passivation quality of hydrogenated amorphous silicon oxide(a-SiOx:H) on〈100〉- and 〈111〉-orientated c-Si wafers

Hydrogenated amorphous silicon oxide(a-SiOx:H) is an attractive passivation material to suppress epitaxial growth and reduce the parasitic absorption loss in silicon heterojunction(SHJ) solar cells. In this paper, a-SiOx:H layers on different orientated c-Si substrates are fabricated. An optimal effective lifetime(τ(eff)) of 4743 μs and corresponding implied opencircuit voltage(iV(oc)) of 724 mV are obtained on〈100〉-orientated c-Si wafers. While τ(eff) of 2429 μs and iV_(oc) of 699 mV are achieved on 111-orientated substrate. The FTIR and XPS results indicate that the a-SiOx:H network consists of SiOx(Si-rich), Si–OH, Si–O–SiHx, SiO2 ≡ Si–Si, and O3 ≡ Si–Si. A passivation evolution mechanism is proposed to explain the different passivation results on different c-Si wafers. By modulating the a-SiOx:H layer, the planar silicon heterojunction solar cell can achieve an efficiency of 18.15%.

Finite Element Analysis for Grinding and Lapping of Wire-sawn Silicon Wafers

Silicon wafers are the most widely used substrates for semiconductors. The falling price of silicon wafers has created tremendous pressure on silicon wafer manufacturers to develop cost-effective manufacturing processes. A critical issue in wafer production is the waviness induced by wire sawing. If this waviness is not removed, it will affect wafer flatness and semiconductor performance. In practice, both lapping and grinding have been used to flatten wire-sawn wafers. Although grinding is not as effective as lapping in removing waviness, it has many other advantages over lapping (such as higher throughput, fully automatic, and more benign to environment) and has great potential to reduce manufacturing cost of silicon wafers. This paper presents a finite element analysis (FEA) study on grinding and lapping of wire-sawn silicon wafers. An FEA model is first developed to simulate the waviness deformation of wire-sawn wafers in grinding and lapping processes. It is then used to explain how the waviness is removed or reduced by lapping and grinding and why the effectiveness of grinding in removing waviness is different from that of lapping. Furthermore, the model is used to study the effects of various parameters including active-grinding-zone orientation, grinding force, waviness wavelength, and waviness height on the reduction and elimination of waviness. Finally, the results of pilot experiments to verify the model are discussed.

Surface Damage in Wire cut Silicon Wafers

The surface damage and the damage depth in wire-cut silicon wafers and inner-diameter (ID) cut silicon wafers were studied by means of thickness meter, scanning electron microscopy (SEM) and double crystal X-ray diffractometer. The results show that the surface of wire-cut silicon wafers is rougher than that of ID-cut silicon wafers and the surface damage in wire-cut silicon wafers is more serious than that in ID-cut silicon wafers, while the damage depth in wire-cut silicon wafers is smaller than that in ID-cut silicon wafers. The possible reasons for the generation of surface damage in wire-cut silicon wafers were also discussed.

Detailed Micro Raman Spectroscopy Analysis of Doped Silicon Thin Film Layers and Its Feasibility for Heterojunction Silicon Wafer Solar Cells

Hydrogenated doped silicon thin films deposited using RF (13.56 MHz) PECVD were studied in detail using micro Raman spectroscopy to investigate the impact of doping gas flow, film thickness, and substrate type on the film characteristics. In particular, by deconvoluting the micro Raman spectra into amorphous and crystalline components, qualitative and quantitative information such as bond angle disorder, bond length, film stress, and film crystallinity can be determined. By selecting the optimum doped silicon thin film deposition conditions, and combining our p-doped and n-doped silicon thin films in different heterojunction structures, we demonstrate both (i) an efficient field effect passivation and (ii) further improvement to c-Si/a-Si:H(i) interface defect density with observed improvement in implied open-circuit voltage VOC and minority carrier lifetimes across all injections levels of interest. In particular, the heterojunction structure (a-Si:H(p)/a-Si:H(i)/c-Si(n)/a-Si:H(i)/a-Si:H(p)) demonstrates a minority carrier lifetime of 2.4 ms at an injection level of 1015 cm-3, and a high implied open-circuit voltage of 725 mV. Simulation studies reveal a strong dependence of the interface defect density Dit on the heterojunction silicon wafer solar cell performance, affected by the deposition conditions of the overlying doped silicon thin film layers. Using our films, and a fitted Dit of 5 × 1010 cm-2·eV-1, we demonstrate that a solar cell efficiency of ~22.5% can be potentially achievable.

The Effect of Quartz Window on Bistability of the Silicon Wafer in Lamp-Based Reactor

The effect of a quartz plate (window) on the silicon wafer temperature is studied in the conditions of the combined thermal transfer in a lamp-based chamber for the rapid thermal treatment (RTP) set up. The chamber for RTP is simulated by a radiative-closed thermal system including the influence of quartz window as a spectral filter of lamp emission and a source of emitted thermal radiation. Energy equations for thermal fluxes involved in the heat input and output from the working wafer and quartz window are solved in spectral approximation. The transfer characteristics that are defined by the temperature dependencies of the silicon wafer and the quartz window on the temperature of the heater are accounted. It is shown that temperature bistability in the silicon wafer initiates an induced bistability into the quartz window that does not reveal bistable behavior because of the linear temperature dependence of its total optical characteristics. A possibility for simulation of the quartz window by spectral restriction of the heater radiation is confirmed. The availability of the weak bistable effect in the mode of zero effective heat exchange coefficient of a non-radiative component of the thermal flux removed from the working wafer has been obtained.

Characteristics of a Silicon Wafer <111>and <004>after Planting Nitrogen

In this paper, different steps of work and experiments that are done in order to implant nitrogen ion in silicon with the energy of 25 keV, density of 24 μA/cm2 and doses of 5 × 1013 atom/cm2, 1?× 1014 atom/cm2 and 1?× 1015 atom/ cm2 (according to the calculation and applying time at planting) at room temperature (in the lack of heat phase) and without annealing will be presented. The XRD analysis is done before and after planting to observe changes in the lattice and the possibility of forming a crystalline phase of silicon nitride in this case. Also, the study of changes in the lattice arrangement and AFM analysis is done to observe the topography of the surface. Besides, the investigation on surface roughness and changes caused by ion implantation on the surface and spectrophotometry analysis before and after planting due to the study of changes in optical properties are done.

Effects of thermal transport properties on temperature distribution within silicon wafer

A combined conduction and radiation heat transfer model was used to simulate the heat transfer within wafer and investigate the effect of thermal transport properties on temperature non-uniformity within wafer surface. It is found that the increased conductivities in both doped and undoped regions help reduce the temperature difference across the wafer surface. However, the doped layer conductivity has little effect on the overall temperature distribution and difference. The temperature level and difference on the top surface drop suddenly when absorption coefficient changes from 104 to 103 m-1. When the absorption coefficient is less or equal to 103 m-1, the temperature level and difference do not change much. The emissivity has the dominant effect on the top surface temperature level and difference. Higher surface emissivity can easily increase the temperature level of the wafer surface. After using the improved property data, the overall temperature level reduces by about 200 K from the basis case. The results will help improve the current understanding of the energy transport in the rapid thermal processing and the wafer temperature monitor and control level.

Slim Water Injection Nozzle for Silicon Wafer Wet Cleaning Bath

In order to effectively and quickly clean the surface of semiconductor silicon wafers, the fluid flow is one of the significant issues. For a batch-type silicon wafer wet cleaning bath, a slim water injection nozzle consisting of a dual tube was studied, based on theoretical calculations and experiments. A thin inner tube was placed at the optimum position in the water injection nozzle. Such a simple design could make the water injection direction normal and the water velocity profile symmetrical along the nozzle. The water flow in the wet cleaning bath was observed using a blue-colored ink tracer. When the nozzle developed in this study was placed at the bottom of the bath, a fast and symmetrical upward water stream was formed between and around the wafers.

深硅刻蚀晶圆位置偏移分析与研究

晶圆位置偏移过大是导致深硅刻蚀设备发生传片报警问题的主要原因之一,尤其是在采用静电卡盘的设备中。阐述了晶圆位置发生偏移原因,重点研究了解吸附配方、顶针驱动和片间清洗方案。研究表明,静电吸盘的表面聚合物残留是导致静电释放不充分的主要因素,表面聚合物的清除有助于优化晶圆位置偏移。电动三针在固有残留静电力的情况下,通过缓慢连续升针方案缓解了跳片现象。优化片间清洗方案大幅减小表面聚合物残留。实验结果表明:优化后的解吸附配方为工艺时长90 s、电极功率1000 W、气压20 mTorr(1 mTorr≈0.133 Pa)、氩气体积流量250 mL/min,电动三针接触晶圆前、接触中、脱离静电吸盘后的升针速度分别为3、2和6 mm/s,在上述工艺条件下,通过进一步优化片间清洗方案,使得晶圆位置偏移量从初始的2~6 mm降至0.2 mm以内。