The paper proposes a Current Source Multilevel Inverter (CSMLI) with single rating inductor topology. Multilevel inverters are most familiar with power converter’s applications due to reduced dv/dt, di/dt stress, and...The paper proposes a Current Source Multilevel Inverter (CSMLI) with single rating inductor topology. Multilevel inverters are most familiar with power converter’s applications due to reduced dv/dt, di/dt stress, and very efficient for reducing harmonic distortion in the output voltage and output current. The proposed nine-level current source inverter has been tested under symmetrical and asymmetrical modes of operation, and their activities are compared using PI and Fuzzy PI (Proportional Integral) controllers with multicarrier PWM (Pulse Width Modulation) strategy. MATLAB/Simulink simulation has been made for the proposed converter to obtain its performance measures. Some experimental results are given to verify the presented Current Source Multilevel Inverter.展开更多
As the demand for high voltage, high power inverters are increasing and there is a problem of connecting a power semiconductor switch directly to a high voltage network. As a part of this the multilevel inverters had ...As the demand for high voltage, high power inverters are increasing and there is a problem of connecting a power semiconductor switch directly to a high voltage network. As a part of this the multilevel inverters had been introduced. As a part of this, several researches had been done for the development of multilevel inverters. The commercially available and extensively studied topologies for multilevel voltage output are Neutral Point Clamped (NPC), Cascaded Half Bridge (CHB) and Flying Capacitor (FC) converters. However, with these existing topologies, there is a significant increase in the number of power switches and passive components. Thus it leads to more complex control circuitry and overall cost of the system increase with increase in the output levels. In this paper, a novel multilevel inverter is proposed in which it employs additive and subtractive topology to get higher output levels. This approach significantly reduces the number of power switches needed as compared to existing topology. The present developed multilevel inverter can generate only five voltage levels. With this proposed topology the multilevel inverter can be modified to nine-level inverter. Moreover modified hybrid multicarrier Pulse Width Modulation (PWM) technique can be implemented in the proposed multilevel inverter in order to obtain uniform switch utilization and lower THD. An appropriate modulation scheme is presented and also the proposed concept is analyzed through simulation studies.展开更多
文摘The paper proposes a Current Source Multilevel Inverter (CSMLI) with single rating inductor topology. Multilevel inverters are most familiar with power converter’s applications due to reduced dv/dt, di/dt stress, and very efficient for reducing harmonic distortion in the output voltage and output current. The proposed nine-level current source inverter has been tested under symmetrical and asymmetrical modes of operation, and their activities are compared using PI and Fuzzy PI (Proportional Integral) controllers with multicarrier PWM (Pulse Width Modulation) strategy. MATLAB/Simulink simulation has been made for the proposed converter to obtain its performance measures. Some experimental results are given to verify the presented Current Source Multilevel Inverter.
文摘As the demand for high voltage, high power inverters are increasing and there is a problem of connecting a power semiconductor switch directly to a high voltage network. As a part of this the multilevel inverters had been introduced. As a part of this, several researches had been done for the development of multilevel inverters. The commercially available and extensively studied topologies for multilevel voltage output are Neutral Point Clamped (NPC), Cascaded Half Bridge (CHB) and Flying Capacitor (FC) converters. However, with these existing topologies, there is a significant increase in the number of power switches and passive components. Thus it leads to more complex control circuitry and overall cost of the system increase with increase in the output levels. In this paper, a novel multilevel inverter is proposed in which it employs additive and subtractive topology to get higher output levels. This approach significantly reduces the number of power switches needed as compared to existing topology. The present developed multilevel inverter can generate only five voltage levels. With this proposed topology the multilevel inverter can be modified to nine-level inverter. Moreover modified hybrid multicarrier Pulse Width Modulation (PWM) technique can be implemented in the proposed multilevel inverter in order to obtain uniform switch utilization and lower THD. An appropriate modulation scheme is presented and also the proposed concept is analyzed through simulation studies.
