Analysis of multiple-faults of high-voltage circuit breakers based on non-negative matrix decomposition

High-voltage circuit breakers are the core equipment in power networks,and to a certain extent,are related to the safe and reliable operation of power systems.However,their core components are prone to mechanical faults.This study proposes a component separation method to detect multiple mechanical faults in circuit breakers that can achieve online real-time monitoring.First,a model and strategy are presented for obtaining mechanical voiceprint signals from circuit breakers.Subsequently,the component separation method was used to decompose the voiceprint signals of multiple faults into individual component signals.Based on this,the recognition of the features of a single-fault voiceprint signal can be achieved.Finally,multiple faults in high-voltage circuit breakers were identified through an experimental simulation and verification of the circuit breaker voiceprint signals collected from the substation site.The research results indicate that the proposed method exhibits excellent performance for multiple mechanical faults,such as spring structures and loose internal components of circuit breakers.In addition,it provides a reference method for the real-time online monitoring of high-voltage circuit breakers.

Three Dimensional Electric Circuits with Multiple Capacitors and Resistors

Two cubical 3D electric circuits with single and double capacitors and twelve ohmic resistors are considered. The resistors are the sides of the cube. The circuit is fed with a single internal emf. The charge on the capacitor(s) and the current distributions of all twelve sides of the circuit(s) vs. time are evaluated. The analysis requires solving twelve differential-algebraic intertwined symbolic equations. This is accomplished by applying a Computer Algebra System (CAS), specifically Mathematica. The needed codes are included. For a set of values assigned to the elements, the numeric results are depicted.

Process Analysis of Double Circuit Transmission Line Trip-out on the Same Tower Due to Lightning

In recent years,several failures of double circuit transmission line on the same tower due to lightning were happened in Beijing power grid.Although it can be reclosed successful,the lightning strike caused a grave threat to the power grid security.The cause of the accident and the accident process were studied for the sake of further understanding of the impact of lightning on power grid.As an example,110 kV double circuit transmission line(Xilong-line) was analyzed.At first,the system topology was given.Through the analysis on relay protection actions and the fault recorder data,over voltage on the insulator strings was calculated.Based on the analysis and the calculation,accident cause and the process were presented respectively.Secondly,it comes to the conclusion that the lightning failure was caused by counterattack.The wave of the lightning over voltage would spread to the not grounded neutral point of the transformers,and make the neutral protective gap breakdown,then cause freewheeling with the frequency of 50 Hz.As results of the relay protection,the double circuit transmission line all tripped out.Finally,the causes of the accident were proposed that included terrain features,large corner towers,strong thunderstorm weather and poor grounded contact of the tower.

A New Principle of Fault Identification of on the Same Tower Based on Traveling Wave Reactive Powers

In order to improve the reliability of fault identification of the double-circuit transmission lines on the same tower, a new algorithm for fast protection of double-circuit transmission lines on the same tower based on the reactive powers of traveling wave is proposed. With the implementation of S-transform, the initial traveling wave reactive powers are calculated and the change characteristics of reactive power under different fault conditions are studied. The protection criterion is constructed by analyzing the ratio of the reactive powers of the same end on double-circuit transmission lines and the ratio of the reactive powers at both ends on the same line. According to the ratio of reactive power on the same side of the line and both ends of the same line, it is possible to identify whether the faults of the double-circuit line of the same tower occurred in or out of the protection zone. A large number of simulation results show that the protection performance is sensitive and reliable, and quick to respond. The criterion is simple and is basically not affected by fault initial angles, fault types, and transitional resistances.

ON EQUIVALENCE BETWEEN THE SEQUENTIAL CIRCUITS IN SERIES AND IN PARALLEL

Propose the sequential circuits with the ternary D-ffs in series^1. Discuss the equivalence between the sequential circuits with the p-valued flip-flops in series and in parallel as a part of studying the multiple valued logic circuits.

A New Method for the Detections of Multiple Faults Using Binary Decision Diagrams

With the complexity of integrated circuits is continually increasing, a local defect in circuits may cause multiple faults. The behavior of a digital circuit with a multiple fault may significantly differ from that of a single fault. A new method for the detection of multiple faults in digital circuits is presented in this paper, the method is based on binary decision diagram （BDD）. First of all, the BDDs for the normal circuit and faulty circuit are built respectively. Secondly, a test BDD is obtained by the XOR operation of the BDDs corresponds to normal circuit and faulty circuit. In the test BDD, each input assignment that leads to the leaf node labeled 1 is a test vector of multiple faults. Therefore, the test set of multiple faults is generated by searching for the type of input assignments in the test BDD. Experimental results on some digital circuits show the feasibility of the approach presented in this paper.

FAULT DETECTION FOR MULTIPLE-VALUED LOGIC CIRCUITS WITH FANOUT-FREE

The single fault and multiple fault detections for multiple-valued logic circuits are studied in this paper. Firstly, it is shown that the cardinality of optimal single fault test set for fanout-free m-valued circuits with n primary inputs is not more than n + 1, for linear tree circuits is two, and for multiplication modulo circuits is two if n is an odd number or if n is an even number and m ＞ 3, where the optimal test set of a circuit has minimal number of test vectors. Secondly,it is indicated that the cardinality of optimal multiple fault test set for linear tree circuits with n primary inputs is 1 + [n/(m - 1)], for multiplication modulo circuits is n+ 1, for fanout-free circuits that consist of 2-input linear tree circuits and 2-input multiplication modulo circuits is not greater than n+ 1, where [x] denotes the smallest integer greater than or equal to x. Finally,the single fault location approaches of linear tree circuits and multiplication modulo circuits are presented, and all faults in the two types of circuits can be located by using a test set with n + 1 vectors.

THE RESEARCH ON TERNARY TTL SCHMITT CIRCUITS

By analyzing the threshold-jumping of Schmitt circuits, this paper indicates that the core element realizing this function in binary TTL Schmitt circuits is the differential current switch with controllable threshold. Based on the characteristic having two kinds of signal-detection threshold in ternary TTL circuits, a ternary TTL Schmitt circuit having twice reactions of threshold-jumping is designed. The simulation with PSPICE proves that the designed circuit has ideal function of Schmitt circuits.

A High Efficiency Hardware Implementation of S-Boxes Based on Composite Field for Advanced Encryption Standard

The SubBytes (S-box) transformation is the most crucial operation in the AES algorithm, significantly impacting the implementation performance of AES chips. To design a high-performance S-box, a segmented optimization implementation of the S-box is proposed based on the composite field inverse operation in this paper. This proposed S-box implementation is modeled using Verilog language and synthesized using Design Complier software under the premise of ensuring the correctness of the simulation result. The synthesis results show that, compared to several current S-box implementation schemes, the proposed implementation of the S-box significantly reduces the area overhead and critical path delay, then gets higher hardware efficiency. This provides strong support for realizing efficient and compact S-box ASIC designs.

逆变型电源场站故障稳态电流实用化计算方法

单机倍乘法常用于逆变型电源场站的故障稳态建模,可简单估算场站短路电流水平,但计算精度有待提升。文中首先分析了低电压穿越控制策略约束下,有功出力、电压跌落程度对发电单元输出的稳态电流的决定性作用,得出故障稳态电流输出特性曲线,基于此分析了场站电气距离及有功出力差异对单机倍乘法计算误差的影响。在误差分析的基础上,提出了计及发电单元分布特性的改进单机倍乘法。该方法在发电单元接入点电压计算中,利用等值阻抗来等效发电单元与并网点的电气距离;将场站分群等值为两台机组,减小发电单元间有功出力差异对短路特性的影响。不同场景下的仿真分析表明,改进方法计算精度较单机倍乘法有着较大的提升。所提方法仅需通过简单计算即可实现场站分群和短路电流聚合,有较好的工程实用性。

动车组合闸过电压故障机理兮析及仿真研究

[目的]动车组出分相时,断路器合闸产生的过电压会加剧高压设备的绝缘老化,研究合闸过电压的产生机理及影响因素对动车组主电路绝缘匹配和设备选型具有理论意义。[方法]结合动车组主电路结构和过分相过程,分析其正常运行方式下操作过电压的形成原因。考虑真空断路器合闸弹跳特性对过电压的特殊影响,建立动车组主电路仿真模型;对比研究动车组主电路合闸过电压特征,得出主回路状态动作时刻、动车组高压电缆参数、接触网参数及设备特性对过电压的影响规律。[结果及结论]极端状态下过电压峰值为工频电压峰值的2.39倍,接近《高速动车组整车试验规范》规定的2.4倍,在极端工况下产生的过电压会对动车组高压设备的绝缘性能产生影响,甚至导致击穿现象。因此,需采取如采用相控合闸技术控制断路器在目标相位闭合、选择单位分布电容较小的高压电缆、改进真空断路器的机械特性等相关措施进行防范,以有效降低动车组合闸过电压。

考虑多重性能水准的特高压双柱悬索拉线塔风灾易损性分析

特高压双柱悬索拉线塔为典型的风敏感结构,其在不同强度风荷载作用下易遭受不同程度的损伤及破坏,针对此类结构的风致损伤评估研究亟待开展。该文提出一种考虑多重性能水准的特高压双柱悬索拉线塔风灾易损性分析方法。首先,开展结构立柱刚性模型的风洞试验,获取立柱的气动三分力系数并模拟得到相应风荷载;进而,定性划分双柱悬索拉线塔的性能水准,并基于Pushover分析给出各性能水准所对应的量化模型;最后,在求得双柱悬索拉线塔概率风灾需求模型的基础上,对其进行风灾易损性分析,并研究风向角对易损性曲线的影响。结果表明:结构主体立柱的气动升力系数CL和气动力矩系数CM在不同工况下均接近于0,气动阻力系数CD则均大于2,且从0°到45°呈递增趋势;基于立柱顶点位移可建立双柱悬索拉线塔的多重性能水准,而由风灾易损性分析可知,双柱悬索拉线塔在正常使用条件下发生各级风致损伤及破坏的概率很小,结构具有良好的抗风性能;风向角对双柱悬索拉线塔风灾易损性影响显著,结构的最不利和最有利风向角分别为90°和0°。

多特征聚合表征的断路器热故障诊断评级方法

针对电力设备红外热故障特征的准确评估需求,提出一种多特征聚合表征的断路器热故障诊断评级方法,并以高压断路器红外图像为实例进行数据测试。首先,在高压断路器红外图像背景分离的基础上,对设备进行精准的区域划分,提取各区域温度信息;然后运用Meanshift和改进区域生长法融合,准确提取故障发热区域面积;其次,设计一种多维聚合表征矩阵,将同一设备发热面积、热点温度、热点温差、发热位置、两相同位温升等特征值聚合为多特征向量矩阵,并运用现场案例数据构建该向量矩阵与高压断路器故障类型、等级、处理意见的关联库;最后对350张高压断路器红外图像的1002组多特征向量进行训练测试。结果表明,该方法提取的多特征向量数据使用GWO SVM分类器测试的Fmeasure和Kappa系数分别为96%和95.43%,能够实现高压断路器设备热故障的全类型诊断评级及精准定位。

多重掩模场景详细布线算法

为了在多重掩模自动布线场景中取得缝线数目较少、总线长较小的布线效果,提出一种基于虚拟格点(virtual-vertex,V-V)模型的满足多重掩模约束的详细布线算法.首先在均匀网格下构建可以支持同色及异色间距的V-V模型,V-V的规模由工艺文件中定义的布线层的掩模数决定;然后为每个多端线网生成考虑多重掩模约束的最短路径拓扑结构,并将多端线网分解为多个双端线网;最后基于提出的V-V模型结合搜索算法,以最短路径拓扑结构作为指导,对每个双端线网完成自动布线,并通过代价函数严格控制缝线的引入,保证了以最小缝线数完成线网的连接.在详细布线比赛的基准测试集及其衍生测例进行实验的结果表明,与布线完成后再进行掩模分配的技术方案相比,所提算法可以减少约26%的缝线数.

运用Sawyer Tower电路测试薄膜铁电性能

声表面波煤矿瓦斯传感器是一种新型瓦斯传感器,PZT基高压电铁电薄膜是该类传感器制备的理想功能材料,铁电性作为PZT基铁电薄膜的另一个重要性能对传感器的工作特点和稳定性具有重要影响。因而,测试并掌握具有高压电性铁电薄膜的铁电性也是器件材料表征的一项重要工作。采用Sawyer Tower电路原理,自主设计铁电测试电路,制备PZT基铁电薄膜,并利用该电路测试薄膜的铁电性。由实验结果可知,自主设计的Sawyer Tower电路能简便、有效、准确和直观的测试薄膜的铁电性能,有望广泛应用于薄膜铁电性能测试及研究。

多三相分布式绕组和集中式绕组永磁磁阻电机对比研究

利用磁阻转矩替代永磁转矩,永磁磁阻电机可减少永磁用量,以较低的成本实现相同的性能,该电机在相关行业应用正愈发得到重视。得益于较低的永磁磁链,该类电机短路电流小,非常适合容错设计。电机运行性能和容错能力与绕组紧密相关,因此该文研究了两台分别采用分布式绕组和集中式绕组的多三相永磁磁阻电机,两台电机基于相同性能指标进行设计加工。通过深入的有限元仿真和实验测试,比较了两台电机的反电动势、最大转矩电流比(MTPA)曲线、输出转矩以及不同故障模式下的故障行为和容错能力。结果表明,对于中低速应用场合,采用集中式绕组永磁磁阻电机较之分布式绕组结构具有更好的容错表现。

实现Reed Solomon码译码的新电路——在普通基上用“比特串行乘法电路”实现RS码译码

本文推出了在域ＧＦ（２ ｍ）上用于ＲＳ码译码的两种新电路：普通基“比特串行序列乘法电路”和“比特串行乘法累加电路”，基本上以ｍ 个与门代替了两个任意元素相乘的复杂乘法器，使译码电路大大简化．作为一个应用实例，详细阐明了用它们构造的ＲＳ码纠删／纠错译码各步电路．

考虑源网协同支撑作用的含新能源电力系统网架重构决策优化方法

面对复杂多变的国际形势和日益增多的极端事件,研究新能源高比例接入下的系统恢复方案,对完善新型电力系统安全防御体系具有重要意义。在此背景下,提出一种含新能源电力系统网架重构决策优化方法。首先,基于核密度法对新能源出力不确定性进行分析建模;其次,考虑新能源并网和运行对网架强度的要求,实现了新能源多场站短路比约束的线性化建模;在此基础上,建立了能协同新能源、储能、常规机组和输电网络恢复的网架重构优化模型,并提出双层优化策略以提升模型求解效率。基于新英格兰10机39节点系统的算例结果验证了所提方法的有效性。

考虑新能源多场站短路比的暂态过电压风险评估

为解决电力系统暂态过电压风险评估中输入特征集构建合理性不足、强相关性差等问题,提出一种考虑新能源多场站短路比MRSCR(multiple renewable energy stations short circuit ratio)的暂态过电压风险评估方法。首先,通过分析暂态过电压数学模型,发现MRSCR与暂态过电压呈负相关性;然后,综合考虑MRSCR与其他影响系统暂态过电压的关键因素,构建多维输入特征集;最后,通过卷积神经网络建立输入特征与暂态过电压的高维映射,实现系统暂态过电压风险的快速、准确评估,并通过算例分析验证了所提方法的有效性、可行性。

AES-128中S盒变换的量子线路优化

使用空间资源优化的量子Karatsuba乘法来优化实现AES-128中的8×8 S盒变换,同时引入了衡量时间资源代价和空间资源代价折衷的指标——量子比特数目与T门深度之积。对实现8×8 S盒变换的分析表明,利用空间资源优化的量子Karatsuba乘法的求乘法逆线路具有更优性能,其Toffoli门数目、量子比特数目、量子比特数目与T门深度之积更优。此外,使用加窗量子查表方法,进一步优化了求乘法逆以及实现S盒所需的量子资源。在此基础上,基于Qiskit分析验证了所需的量子资源。