Performance Tendency of Gain and Noise Figure at Different EDFA Configurations

A comprehensive behavioral investigation of gain and noise figure （NF） at different erbium doped fiber amplifier （EDFA） configurations is proposed. Configurations such as single pass （SP）, single pass with filter （SPF）, double pass （DP） and double pass with filter （DPF） are designed, investigated and compared. A continuous increasing of gain value is recorded by changing the configuration from SP to SPF to DP then to DPF. The NF value shows different behaviors at different configurations.

Relationship Between Noise Figure and Equivalent Input Noise Current Spectral Density for Optical Receiver Design

Based on the equivalent circuit model of a two-port optical receiver front-end,the relationship between the equivalent input noise current spectral density and the noise figure is analyzed. The derived relationship has universal validity for determining the equivalent input noise current spectral density for optical receiver designs, as verified by measuring a 155Mb/s high-impedance optical receiver front.end. Good agreement between calculated and simulated results has been achieved.

Localization for mixed near-field and far-field sources under impulsive noise

In order to solve the problem that the performance of traditional localization methods for mixed near-field sources(NFSs)and far-field sources(FFSs)degrades under impulsive noise,a robust and novel localization method is proposed.After eliminating the impacts of impulsive noise by the weighted out-lier filter,the direction of arrivals(DOAs)of FFSs can be estimated by multiple signal classification(MUSIC)spectral peaks search.Based on the DOAs information of FFSs,the separation of mixed sources can be performed.Finally,the estimation of localizing parameters of NFSs can avoid two-dimension spectral peaks search by decomposing steering vectors.The Cramer-Rao bounds(CRB)for the unbiased estimations of DOA and range under impulsive noise have been drawn.Simulation experiments verify that the proposed method has advantages in probability of successful estimation(PSE)and root mean square error(RMSE)compared with existing localization methods.It can be concluded that the proposed method is effective and reliable in the environment with low generalized signal to noise ratio(GSNR),few snapshots,and strong impulse.

Design of a Low Power Low-Noise Amplifier with Improved Gain/Noise Ratio

This work details the development of a broad-spectrum LNA (Low Noise Amplifier) circuit using a 65 nm CMOS technology. The design incorporates an inductive degeneracy circuit, employing a theoretical approach to enhance gain, minimize noise levels, and uphold low power consumption. The progression includes a shift to a cascode structure to further refine LNA parameters. Ultimately, with a 1.8 V bias, the achieved performance showcases a gain-to-noise figure ratio of 16 dB/0.5 dB, an IIP3 linearity at 5.1 dBm, and a power consumption of 3 mW. This architecture is adept at operating across a wide frequency band spanning from 0.5 GHz to 6 GHz, rendering it applicable in diverse RF scenarios.

Implementation and noise optimization of a 433 MHz low power CMOS LNA

A low power 433 MHz CMOS （complementary metal- oxide-semiconductor transistor） low noise amplifier（LNA）, used for an ISM （ industrial-scientific-medical ） receiver, is implemented in a 0. 18 μm SMIC mixed-signal and RF （ radio frequency） CMOS process. The optimal noise performance of the CMOS LNA is achieved by adjusting the source degeneration inductance and by inserting an appropriate capacitance in parallel with the input transistor of the LNA. The measured results show that at 431 MHz the LNA has a noise figure of 2.4 dB. The S21 is equal to 16 dB, S11 = -11 dB, S22 = -9 dB, and the inverse isolation is 35 dB. The measured input 1-dB compression point （PtdB） and input third-order intermodulation product （IIP3）are - 13 dBm and -3 dBm, respectively. The chip area is 0. 55 mm × 1.2 mm and the DC power consumption is only 4 mW under a 1.8 V voltage supply.

Gain and Noise Properties of Bidirectional EDFAs

The rate equation model is setup for the signal gain, pump absorption and output noise spectrum of bidirectional EDFA (Bi EDFA) including numbers of signals, pumps of arbitrary direction, amplified spontaneous emission (ASE) and inherent loss. The influence of erbium doped fiber length, input signal power, pump style and pump power on the gain characteristics of Bi EDFA is analyzed. Forward and backward noise figure for different pump style versus bidirectional input signal power is investigated.

Design and Test of a CMOS Low Noise Amplifier in Bluetooth Transceiver

A RF low noise amplifier,integrated in a single bluetooth transceiver chip and fabricated in 0.35μm digital CMOS technology,is presented.Under the consideration of ESD protection and package,design methodology is discussed from the aspects of noise optimization,impedance match,and forward gain.At 2.05GHz,the measured S 11 is -6.4dB, S 21 is 11dB with 3dB-BW of 300MHz,and NF is about 5.3dB.It indicates that comprehensive consideration of parasitics,package model,and reasonable process is necessary for RF circuit design.

Novel Ka-band low-noise down-converter assembly

An efficient way to design a down-converter assembly for the Ka-band millimeter system is presented, in which dielectric resonators （DR＇s） are adopted in the Schottky barrier diode image recovery mixer and the local oscillator （LO）. DR structures guarantee high frequency stability with an acceptable volume. The configurations of low noise amplifier, mixer and oscillator in the assembly are described and fabricated to estimate the chain performance. According to the verification results, the assembly exhibits the noise figure of less than 5 dB over 1 GHz frequency range, and the single-sideband phase noise （200 kHz offset from carrier frequency） of - 70 dBc/Hz. Utilizing the DR structure, the frequency stability of the local oscillator is less than 60 × 10^-6/℃.

Design and analysis on four stage SiGe HBT low noise amplifier

Focusing on the linearity shortcoming on a bipolar low noise amplifier(LNA),a new 6 ~14GHz four stage SiGe HBT LNA is proposed.This amplifier adopts a method of gain allocation on multiple stages to avoid the limitation on linearity especially with the addition of negative gain on the third stage.To realize gain flatness,extra zero is introduced to compensate the gain roll-off formed by pole,and local shunt-shunt negative feedback is used to widen the bandwidth as well as optimize circuit' s noise.Simulated results have shown that in 6 ~14GHz,this circuit achieves noise figure(NF) less than 3dB,gain of 17.8dB(+0.2dB),input and output reflection parameters of less than- 10 dB,and the K factor is above 1.15.

A Wide-Band Low Noise Amplifier for Terrestrial and Cable Receptions

We present the design of a wide-band low-noise amplifier （LNA） implemented in 0.35μm SiGe BiCMOS technology for cable and terrestrial tuner applications. The LNA utilizes current injection to achieve high linearity. Without using inductors, the LNA achieves 0.1 ～ 1GHz wide bandwidth and 18. 8dB gain with less than 1.4dB of gain variation. The noise figure of the wideband LNA is 5dB, and its 1dB compression point is - 2dBm and IIP3 is 8dBm. The LNA dissipates 120mW of power with a 5V supply.

A NOVEL SIMULTANEOUS NOISE AND INPUT VSWR MATCHING TECHNIQUE FOR BROADBAND LNA

The Simultaneous Noise and Input Voltage Standing Wave Ratio (VSWR) Matching (SNIM) condition for Low Noise Amplifier (LNA), in principle, can only be satisfied at a single fre-quency. In this paper, by analyzing the fundamental limitations of the narrowband SNIM technique for the broadband application, the authors present a broadband SNIM LNA systematic design technique. The designed LNA guided by the proposed methodology achieves 10 dB power gain with a low Noise Figure of 0.53 dB. Meanwhile, it provides wonderful input matching of 27 dB across the fre-quency range of 3～5 GHz. Therefore, broadband SNIM is realized.

Design of 5GHz low noise amplifier with HBM SiGe 0. 13μm BiCMOS process

A fully integrated low noise amplifier( LNA) for WLAN 802. 11 ac is presented in this article.A cascode topology combining BJT and MOS transistor is used for better performance. An inductive source degeneration is chosen to get 50 Ohm impedance matching at the input. The noise contribution of common gate transistor is analyzed for the first time. The designed LNA is verified with IBM silicon-germanium(SiGe ) 0. 13μm BiCMOS process. The measured results show that the designed LNA has the gain of 13 dB and NF of 2. 8 dB at the center frequency of 5. 5 GHz. The input reflection S11 and output reflection S22 are equal to-19 dB and-11 dB respectively. The P-1 dB and IIP3 are-8. 9 dBm and 6. 6 dBm for the linearity performance respectively. The power consumption is only 1. 3 mW under the 1. 2 V supply. LNA achieves high gain,low noise,and high linearity performance,allowing it to be used for the WLAN 802. 11 ac applications.

A 9 - 10.6 GHz Microstrip Antenna—UWB Low Noise Amplifier with Differential Noise Canceling Technique for IoT Applications

An ultra-wide band (UWB) receiver front-end that operates at the UWB frequency range, starting from 9 GHz - 10.6 GHz is proposed in this paper. The proposed system consists of an off-chip microstrip antenna and CMOS differential low noise amplifier with a differential noise canceling (DNC) technique. The proposed antenna is trapezoidal dipole shaped with balun and printed on a low-cost FR4 substrate with dimensions 10 × 10 × 0.8 mm3. The balun circuit integrated with the ground antenna to improve the antenna impedance matching. Noise canceling is obtained by using a differential block with each stage having 2 amplifiers that generate differential signals, subtracted to improve total noise performance. The proposed DNC block improves NF by 50% while increasing total power consumption with only 0.1 Mw. The differential CMOS cascode LNA with DNC block is implemented using UMC 0.13 μm CMOS process, exhibits a flat gain of 19 dB, maximum noise figure of 2.75 dB, 1 dB compression point −16 dBm and 3rd order intercept point (IIP3) −10 dBm. The proposed system has total DC power consumption of 2.8 mW at 1.2 V power supply.

Noise and linearity optimization methods for a 1.9GHz low noise amplifier

Noise and linearity performances are critical characteristics for radio frequency integrated circuits (RFICs), especially for low noise amplifiers (LNAs). In this paper, a detailed analysis of noise and linearity for the cascode architecture, a widely used circuit structure in LNA designs, is presented. The noise and the linearity improvement techniques for cascode structures are also developed and have been proven by computer simulating experiments. Theoretical analysis and simulation results showed that, for cascode structure LNAs, the first metallic oxide semiconductor field effect transistor (MOSFET) dominates the noise performance of the LNA, while the second MOSFET contributes more to the linearity. A conclusion is thus obtained that the first and second MOSFET of the LNA can be designed to optimize the noise performance and the linearity performance separately, without trade offs. The 1.9GHz Complementary Metal Oxide Semiconductor (CMOS) LNA simulation results are also given as an application of the developed theory.

Optimum Design for a Low Noise Amplifier in S-Band

An optimum design of a low noise amplifier （LNA） in S-band working at 2-4 GHz is described. Choosing FHC40LG high electronic mobility transistor （HEMT）, the noise figure of the designed amplifier simulated by Microwave Office is no more than 1.5 dB, meanwhile the gain is no less than 20 dB in the given bandwidth. The simulated results agree with the performance of the transistor itself well in consideration of its own minimum noise figure （0.3 dB） and associated gain （15.5 dB）. Simultaneously, the stability factor of the designed amplifier is no less than 1 in the given bandwidth.

基于Y系数法的频谱分析仪噪声系数测量

噪声系数是反映射频模块内部噪声的重要指标,射频模块设计及选型都离不开对噪声系数的测量,因此,一般使用噪声系数分析仪进行测试。由于并非每个实验室都配备有相关仪器,因此,相比噪声系数分析仪,频谱分析仪的配备较普遍。本文以Y系数法测量噪声系数的原理,通过软件设计,实现了频谱分析仪可替代噪声系数分析仪,并进行噪声系数测量。

基于信噪比和噪声功率密度测量的射频接收通道状态检测方法

针对传统射频接收通道中靠近天线射频前端的故障检测代价大,检测颗粒度受限等问题,提出了一种基于噪声功率密度测量的射频接收通道状态检测方法。利用噪声系数与增益的级联迭代关联特性,实现对射频接收通道中各单元故障的准确定位。对技术原理进行了理论推导,并构建测试系统验证了方法的可行性与有效性。与传统方法相比,该方法可减少自检电路设计复杂度,减少链路上各个单元自检成本,并可消除自检盲区,实现对故障单元的准确定位。

太赫兹混频器噪声系数测量

噪声系数是评价高频电子器件传输信号性能的重要参数,随着工作频率的增加,高频电子器件的噪声系数通常会增大,现有噪声源的超噪比无法满足测量需求。为了实现高频电子器件噪声系数的测量,本文基于非相干光混频技术,将三束非相干光耦合进入单行载流子光电二极管,研制了220~325 GHz高超噪比且可调谐的太赫兹光子噪声源,超噪比可调谐至45 dB。通过Y因子法将其应用于大噪声系数、负变频增益太赫兹混频器噪声系数的测量。测量得到太赫兹混频器噪声系数的范围为16~32 dB,变频增益约为-13 dB,测量不确定度为0.43 dB。研制的高超噪比且可调谐的太赫兹光子噪声源,能够满足大噪声系数太赫兹电子器件的测量需求,对太赫兹电子器件噪声系数的测量以及指导器件的进一步优化有着重要的作用。

噪声所致耳蜗毛细胞表达NF-κB中维生素E的调节

目的探讨维生素E在噪声暴露引起的大白鼠听力损伤有明显的保护作用及机制。方法健康雄性纯种Wistar大鼠9只,鼠龄2～3个月,体质量180～200g,由长春市高新开发区实验动物中心提供(清洁级)。无噪声暴露及耳毒性药物使用史,耳廓反射正常,实验前清洁外耳道,显微镜下检查均无中耳炎。以听阈、耳蜗基底膜铺片及免疫荧光染色为指标,观察大白鼠在稳态噪声持续暴露之前30d至暴露后7d,灌维生素E及生理盐水,对大白鼠听觉脑干电位分析和耳蜗外毛细胞(OHC)丢失率分析及NF-κB在耳蜗毛细胞中表达定量分析。结果维生素E在噪声暴露后大白鼠听力阈值明显低于单纯噪声组,OHC丢失率也明显降低,免疫荧光染色结果显示VE干预组的耳蜗细胞表达NF-κB的强度低于单纯噪声组(P<0.05)。结论维生素E在噪声暴露引起的大白鼠听力损伤有明显的保护作用,通过上调耳蜗毛细胞中NF-κB的表达。

基于不同泵浦方案的全光纤少模放大器放大特性对比研究

设计并构建全光纤型少模掺铒放大器,实验对比研究不同泵浦模式及方向对LP01、LP11a、LP11b这3个信号模式的增益特性影响.实验对泵浦功率、输入信号功率以及多波长情况下的放大器特性进行分析.结果表明,4种泵浦方案中,前向LP11泵浦情况下放大器有最佳性能,在整个C波段上信号增益超过20 dB、模式增益差低于0.9 dB,噪声系数小于9.6 dB;信号输入功率为-10 dBm/模式时,在1550 nm处,3个信号模式的增益均超过20.8 dB、DMG低至0.3 dB、LP01信号光的噪声系数低于6.2 dB以及LP11信号光的噪声系数低于9.6 dB.4种泵浦方案下对比不同泵浦方向可得:前向泵浦放大器的噪声系数最小,但3种信号模式的增益也较小,而采用后向泵浦时,高阶信号模式增益增加,但噪声系数也会变大.对比泵浦模式可发现,相比于LP01泵浦,LP11泵浦能大幅提高LP11信号光的增益,对LP01信号光增益影响较小,从而可降低DMG值.