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Low-Frequency Noise in Gate Tunable Topological Insulator Nanowire Field Emission Transistor near the Dirac Point
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作者 张浩 宋志军 +2 位作者 冯军雅 姬忠庆 吕力 《Chinese Physics Letters》 SCIE CAS CSCD 2016年第8期109-112,共4页
Low-frequency flicker noise is usually associated with material defects or imperfection of fabrication procedure. Up to now, there is only very limited knowledge about flicker noise of the topological insulator, whose... Low-frequency flicker noise is usually associated with material defects or imperfection of fabrication procedure. Up to now, there is only very limited knowledge about flicker noise of the topological insulator, whose topologically protected conducting surface is theoretically immune to back scattering. To suppress the bulk conductivity we synthesize antimony doped Bi2Se3 nanowires and conduct transport measurements at cryogenic temperatures. The low-frequency current noise measurement shows that the noise amplitude at the high-drain current regime can be described by Hooge's empirical relationship, while the noise level is significantly lower than that predicted by Hooge's model near the Dirac point. Furthermore, different frequency responses of noise power spectrum density for specific drain currents at the low drain current regime indicate the complex origin of noise sources of topological insulator. 展开更多
关键词 of in Low-Frequency noise in gate Tunable Topological Insulator Nanowire Field Emission Transistor near the Dirac Point for were is with EDX that from
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A Systematical Approach for Noise in CMOS LNA 被引量:1
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作者 冯东 石秉学 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2005年第3期487-493,共7页
A systematic approach is used to analyze the noise in CMOS low noise amplifier(LNA),including channel noise and induced gate noise in MOS devices.A new analytical formula for noise figure is proposed.Based on this for... A systematic approach is used to analyze the noise in CMOS low noise amplifier(LNA),including channel noise and induced gate noise in MOS devices.A new analytical formula for noise figure is proposed.Based on this formula,the impacts of distributed gate resistance and intrinsic channel resistance on noise performance are discussed.Two kinds of noise optimization approaches are performed and applied to the design of a 5 2GHz CMOS LNA. 展开更多
关键词 amplifier noise channel noise channel resistance induced gate noise low noise amplifier noise optimization
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