A Low-Power,Single-Poly,Non-Volatile Memory for Passive RFID Tags

Single-poly,576bit non-volatile memory is designed and implemented in an SMIC 0.18μm standard CMOS process for the purpose of reducing the cost and power of passive RFID tag chips. The memory bit cell is designed with conventional single-poly pMOS transistors, based on the bi-directional Fowler-Nordheim tunneling effect, and the typical program/erase time is 10ms for every 16bits. A new ,single-ended sense amplifier is proposed to reduce the power dissipation in the current sensing scheme. The average current consumption of the whole memory chip is 0.8μA for the power supply voltage of 1.2V at a reading rate of 640kHz.

Molecular dynamics simulations on the wet/dry self-latching and electric fields triggered wet/dry transitions between nanosheets:A non-volatile memory nanostructure

We design a nanostructure composing of two nanoscale graphene sheets parallelly immersed in water.Using molecular dynamics simulations,we demonstrate that the wet/dry state between the graphene sheets can be self-latched;moreover,the wet→dry/dry→wet transition takes place when applying an external electric field perpendicular/parallel to the graphene sheets(E;/E;).This structure works like a flash memory device(a non-volatile memory):the stored information(wet and dry states)of the system can be kept spontaneously,and can also be rewritten by external electric fields.On the one hand,when the distance between the two nanosheets is close to a certain distance,the free energy barriers for the transitions dry→wet and wet→dry can be quite large.As a result,the wet and dry states are self-latched.On the other hand,an E;and an E;will respectively increase and decrease the free energy of the water located in-between the two nanosheets.Consequently,the wet→dry and dry→wet transitions are observed.Our results may be useful for designing novel information memory devices.

Design of an Electrically Written and Optically Read Non-volatile Memory Device Employing BiFeO3/Au Heterostructures with Strong Absorption Resonance

Exploiting new concepts for dense, fast, and nonvolatile random access memory with reduced energy consump- tion is a significant issue for information technology. Here we design an ＇electrically written and optically read＇ information storage device employing BiFeO3/A u heterostruetures with strong absorption resonance. The electro- optic effect is the basis for the device design, which arises from the strong absorption resonance in BiFeO3/Au heterostructures and the electrically tunable significant birefringence of the BiFeO3 film. We first construct a sim- ulation calculation of the BiFeO3/Au structure spectrum and identify absorption resonance and electro-optical modulation characteristics. Following a micro scale partition, the surface reflected light intensity of different polarization units is calculated. The results depend on electric polarization states of the BiFeO3 film, thus BiFeO3/Au heterostructures can essentially be designed as a type of electrically written and optically read infor- mation storage device by utilizing the scanning near-field optical microscopy technology based on the conductive silicon cantilever tip with nanofabricated aperture. This work will shed light on information storage technology.

Overview of one transistor type of hybrid organic ferroelectric non-volatile memory

Organic ferroelectric memory devices based on field effect transistors that can be configured between two stable states of on and off have been widely researched as the next generation data storage media in recent years.This emerging type of memory devices can lead to a new instrument system as a potential alternative to previous non-volatile memory building blocks in future processing units because of their numerous merits such as cost-effective process,simple structure and freedom in substrate choices.This bi-stable non-volatile memory device of information storage has been investigated using several organic or inorganic semiconductors with organic ferroelectric polymer materials.Recent progresses in this ferroelectric memory field,hybrid system have attracted a lot of attention due to their excellent device performance in comparison with that of all organic systems.In this paper,a general review of this type of ferroelectric non-volatile memory is provided,which include the device structure,organic ferroelectric materials,electrical characteristics and working principles.We also present some snapshots of our previous study on hybrid ferroelectric memories including our recent work based on zinc oxide nanowire channels.

A review of in situ transmission electron microscopy study on the switching mechanism and packaging reliability in non-volatile memory

Non-volatile memory(NVM)devices with non-volatility and low power consumption properties are important in the data storage field.The switching mechanism and packaging reliability issues in NVMs are of great research interest.The switching process in NVM devices accompanied by the evolution of microstructure and composition is fast and subtle.Transmission electron microscopy(TEM)with high spatial resolution and versatile external fields is widely used in analyzing the evolution of morphology,structures and chemical compositions at atomic scale.The various external stimuli,such as thermal,electrical,mechanical,optical and magnetic fields,provide a platform to probe and engineer NVM devices inside TEM in real-time.Such advanced technologies make it possible for an in situ and interactive manipulation of NVM devices without sacrificing the resolution.This technology facilitates the exploration of the intrinsic structure-switching mechanism of NVMs and the reliability issues in the memory package.In this review,the evolution of the functional layers in NVM devices characterized by the advanced in situ TEM technology is introduced,with intermetallic compounds forming and degradation process investigated.The principles and challenges of TEM technology on NVM device study are also discussed.

Bipolar resistive switching based on bis(8-hydroxyquinoline) cadmium complex:Mechanism and non-volatile memory application

Stable and persistent bipolar resistive switching was observed in an organic diode with the structure of indium-tin oxide （ITO）/bis（8-hydroxyquinoline） cadmium （Cdq2）/Al. Aggregate formation and electric field driven trapping and detrapping of charge carriers in the aggregate states that lie in the energy gap of the highest occupied molecular orbital （HOMO） and the lowest unoccupied molecular orbital （LUMO） of the organic molecule were proposed as the mechanism of the observed bipolar resistive switching, and this was solidly supported by the results of AFM investigations. Repeatedly set, read, and reset measurements demonstrated that the device is potentially applicable in non-volatile memories.

Challenges and recent advances in HfO_(2)-based ferroelectric films for non-volatile memory applications

The emergence of data-centric applications such as artificial intelligence(AI),machine learning,and the Internet of Things(IoT),has promoted surges in demand for storage memories with high operating speed and nonvolatile characteristics.HfO_(2)-based ferroelectric memory technologies,which emerge as a promising alternative,have attracted considerable attention due to their high performance,energy efficiency,and full compatibility with the standard complementary metal-oxide-semiconductors(CMOS)process.These nonvolatile storage elements,such as ferroelectric random access memory(FeRAM),ferroelectric field-effect transistors(FeFETs),and ferroelectric tunnel junctions(FTJs),possess different data access mechanisms,individual merits,and specific application boundaries in next-generation memories or even beyond von Neumann architecture.This paper provides an overview of ferroelectric HfO2 memory technologies,addresses the current challenges,and offers insights into future research directions and prospects.

An ultra-low-power area-efficient non-volatile memory in a 0.18μm single-poly CMOS process for passive RFID tags

This paper presents an ultra-low-power area-efficient non-volatile memory（NVM） in a 0.18μm singlepoly standard CMOS process for passive radio frequency identification（RFID） tags.In the memory cell,a novel low-power operation method is proposed to realize bi-directional Fowler-Nordheim tunneling during write operation. Furthermore,the cell is designed with PMOS transistors and coupling capacitors to minimize its area.In order to improve its reliability,the cell consists of double floating gates to store the data,and the 1 kbit NVM was implemented in a 0.18μm single-poly standard CMOS process.The area of the memory cell and 1 kbit memory array is 96μm^2 and 0.12 mm^2,respectively.The measured results indicate that the program/erase voltage ranges from 5 to 6 V.The power consumption of the read/write operation is 0.19μW/0.69μW at a read/write rate of （268 kb/s）/（3.0 kb/s）.

WOBTree:a write-optimized B+-tree for non-volatile memory

The emergence of non-volatile memory(NVM)has introduced new opportunities for performance optimizations in existing storage systems.To better utilize its byte-addressability and near-DRAM performance,NVM can be attached on the memory bus and accessed via load/store memory instructions rather than the conventional block interface.In this scenario,a cache line(usually 64 bytes)becomes the data transfer unit between volatile and non-volatile devices.However,the failure-atomicity of write on NVM is the memory bit width(usually 8 bytes).This mismatch between the data transfer unit and the atomicity unit may introduce write amplification and compromise data consistency of node-based data structures such as B+-trees.In this paper,we propose WOBTree,a Write-Optimized B+-Tree for NVM to address the mismatch problem without expensive logging.WOBTree minimizes the update granularity from a tree node to a much smaller subnode and carefully arranges the write operations in it to ensure crash consistency and reduce write amplification.Experimental results show that compared with previous persistent B+-tree solutions,WOBTree reduces the write amplification by up to 86× and improves write performance by up to 61× while maintaining similar search performance.

Formation of high density TiN nanocrystals and its application in non-volatile memories

Non-volatile memory based on TiN nanocrystal （TiN-NC） charge storage nodes embedded in SiO2 has been fabricated and its electrical properties have been measured. It was found that the density and size distribution of TiN-NCs can be controlled by annealing temperature. The formation of well separated crystalline TiN nano-dots with an average size of 5 nm is confirmed by transmission electron microscopy and x-ray diffraction, x-ray photoelectron spectroscopy confirms the existence of a transition layer of TiNxOy/SiON oxide between TiN-NC and SiO2, which reduces the barrier height of tunnel oxide and thereby enhances programming/erasing speed. The memory device shows a memory window of 2.5V and an endurance cycle throughout 10^5. Its charging mechanism, which is interpreted from the analysis of programming speed （dVth/dt） and the gate leakage versus voltage characteristics （Ig vs Vg）, has been explained by direct tunnelling for tunnel oxide and Fowler Nordheim tunnelling for control oxide at programming voltages lower than 9V, and by Fowler-Nordheim tunnelling for both the oxides at programming voltages higher than 9V.

Fine-grained checkpoint based on non-volatile memory

New non-volatile memory （e.g., phase-change memory） provides fast access, large capacity, byteaddressability, and non-volatility features. These features, fast-byte-persistency, will bring new opportunities to fault tolerance. We propose a fine-grained checkpoint based on non-volatile memory. We extend the current virtual memory manager to manage non-volatile memory, and design a persistent heap with support for fast allocation and checkpointing of persistent objects. To achieve a fine-grained checkpoint, we scatter objects across virtual pages and rely on hardware page-protection to monitor the modifications. In our system, two objects in different virtual pages may reside on the same physical page. Modifying one object would not interfere with the other object. This allows us to monitor and checkpoint objects smaller than 4096 bytes in a fine-grained way. Compared with previous page-grained based checkpoint mechanisms, our new checkpoint method can greatly reduce the data copied at checkpoint time and better leverage the limited bandwidth of non-volatile memory.

Unimem: Runtime Data Management on Non-Volatile Memory-BasedHeterogeneous Main Memory for High Performance Computing

Non-volatile memory(NVM)provides a scalable and power-efficient solution to replace dynamic random access memory(DRAM)as main memory.However,because of the relatively high latency and low bandwidth of NVM,NVM is often paired with DRAM to build a heterogeneous memory system(HMS).As a result,data objects of the application must be carefully placed to NVM and DRAM for the best performance.In this paper,we introduce a lightweight runtime solution that automatically and transparently manages data placement on HMS without the requirement of hardware modifications and disruptive change to applications.Leveraging online profiling and performance models,the runtime solution characterizes memory access patterns associated with data objects,and minimizes unnecessary data movement.Our runtime solution effectively bridges the performance gap between NVM and DRAM.We demonstrate that using NVM to replace the majority of DRAM can be a feasible solution for future HPC systems with the assistance of a software-based data management.

NEHASH:high-concurrency extendible hashing for non-volatile memory

Extendible hashing is an effective way to manage increasingly large file system metadata,but it suffers from low concurrency and lack of optimization for non-volatile memory(NVM).In this paper,a multilevel hash directory based on lazy expansion is designed to improve the concurrency and efficiency of extendible hashing,and a hash bucket management algorithm based on groups is presented to improve the efficiency of hash key management by reducing the size of the hash bucket,thereby improving the performance of extendible hashing.Meanwhile,a hierarchical storage strategy of extendible hashing for NVM is given to take advantage of dynamic random access memory(DRAM)and NVM.Furthermore,on the basis of the device driver for Intel Optane DC Persistent Memory,the prototype of high-concurrency extendible hashing named NEHASH is implemented.Yahoo cloud serving benchmark(YCSB)is used to test and compare with CCEH,level hashing,and cuckoo hashing.The results show that NEHASH can improve read throughput by up to 16.5%and write throughput by 19.3%.

Comparative evaluation of commercial Douchi by different molds:biogenic amines,non-volatile and volatile compounds

To provide new insights into the development and utilization of Douchi artificial starters,three common strains(Aspergillus oryzae,Mucor racemosus,and Rhizopus oligosporus)were used to study their influence on the fermentation of Douchi.The results showed that the biogenic amine contents of the three types of Douchi were all within the safe range and far lower than those of traditional fermented Douchi.Aspergillus-type Douchi produced more free amino acids than the other two types of Douchi,and its umami taste was more prominent in sensory evaluation(P<0.01),while Mucor-type and Rhizopus-type Douchi produced more esters and pyrazines,making the aroma,sauce,and Douchi flavor more abundant.According to the Pearson and PLS analyses results,sweetness was significantly negatively correlated with phenylalanine,cysteine,and acetic acid(P<0.05),bitterness was significantly negatively correlated with malic acid(P<0.05),the sour taste was significantly positively correlated with citric acid and most free amino acids(P<0.05),while astringency was significantly negatively correlated with glucose(P<0.001).Thirteen volatile compounds such as furfuryl alcohol,phenethyl alcohol,and benzaldehyde caused the flavor difference of three types of Douchi.This study provides theoretical basis for the selection of starting strains for commercial Douchi production.

Extending SSD Lifespan with Comprehensive Non-Volatile Memory-Based Write Buffers

New non-volatile memory (NVM)technologies are expected to replace main memory DRAM (dynamic random access memory)in the near future.NAND flash technological breakthroughs have enabled wide adoption of solid state drives (SSDs)in storage systems.However,flash-based SSDs,by nature,cannot avoid low endurance problems because each cell only allows a limited number of erasures.This can give rise to critical SSD reliability issues.Since many SSD write operations eventually cause many SSD erase operations,reducing SSD write traffic plays a crucial role in SSD reliability. This paper proposes two NVM-based buffer cache policies which can work together in different layers to maximally reduce SSD write traffic:a main memory buffer cache design named Hierarchical Adaptive Replacement Cache (H-ARC)and an internal SSD write buffer design named Write Traffic Reduction Buffer (WRB).H-ARC considers four factors (dirty,clean, recency,and frequency)to reduce write traffic and improve cache hit ratios in the host.WRB reduces block erasures and write traffic further inside an SSD by effectively exploiting temporal and spatial localities.These two comprehensive schemes significantly reduce total SSD write traffic at each different layer (i.e.,host and SSD)by up to 3x.Consequently,they help extend SSD lifespan without system performance degradation.

Correlation of gut microorganisms and non-volatile flavor substances provides new insights for breeding Scylla paramamosain

The farming of Scylla paramamosain with specific flavors has a higher commercial value,and the flavors are related to the integrated farming environment and non-volatile flavor substances,while the survival environment is one of the important ways to source gut microorganisms in the organism.In this study,the levels of dominant taxa in the gut flora of S.paramamosain from Mong Cai,Vietnam(VN),Taishan City,Guangdong Province(TS)of China,and Ninghai County,Ningbo City(NB)Zhejiang Province of China converged with those of S.paramamosain from Sanmen County,Ningbo City(CK 1,CK 2,and CK 3)at 28 d of domestication.The top 15 genera with the highest abundance of VN,TS,and NB gut flora were the same as CK 1,CK 2,and CK 3,but with different percentages,and gradually converged to CK 1,CK 2,and CK 3,respectively,at 28 d of domestication.Correlation between intestinal flora and non-volatile flavor substances in the hepatopancreas at the percentage level of relative abundance of bacterial genera found that above 28 d of domestication,Muribaculaceae,Psychrilyobacter,Clostridia_vadinBB 60_group,Halarcobacter Carboxylicivirga,Sediminispirochaeta may be the most important genera affecting flavor amino acids of VN.Sediminispirochaeta,Carboxylicivirga,Halarcobacter,Photobacterium,ZOR 0006,Psychrilyobacter,and Pseudomonas may be the most important genera affecting flavor amino acids of NB.Sediminispirochaeta,Carboxylicivirga,Halarcobacter,Photobacterium,ZOR 0006,Vibrio,and Sphingomonas may be the most important genera affecting flavor amino acids of TS.These results show that the intestinal flora structure of crabs from different areas were domesticated in the same area for at least 28 d before they converged to that of the domesticated crab,and the most important genera affecting the flavor amino acids of TS,VN,and NB were also identified.The results of this study provide a reference and basis for the technique of directional cultivation of the flavor quality of the crab.

A novel non-volatile memory storage system for I/O-intensive applications

The emerging memory technologies, such as phase change memory （PCM）, provide chances for high- performance storage of I/O-intensive applications. However, traditional software stack and hardware architecture need to be optimized to enhance I/O efficiency. In addition, narrowing the distance between computation and storage reduces the number of I/O requests and has become a popular research direction. This paper presents a novel PCM- based storage system. It consists of the in-storage processing enabled file system （ISPFS） and the configurable parallel computation fabric in storage, which is called an in-storage processing （ISP） engine. On one hand, ISPFS takes full advantage of non-volatile memory （NVM）＇s characteristics, and reduces software overhead and data copies to provide low-latency high-performance random access. On the other hand, ISPFS passes ISP instructions through a command file and invokes the ISP engine to deal with I/O-intensive tasks. Extensive experiments are performed on the prototype system. The results indicate that ISPFS achieves 2 to 10 times throughput compared to EXT4. Our ISP solution also reduces the number of I/O requests by 97% and is 19 times more efficient than software implementation for I/O-intensive applications.

An Overview of Non-Volatile Flip-Flops Based on Emerging Memory Technologies(Invited paper)

Low power consumption is a major issue in nowadays electronics systems. This trend is pushed by the development of data center related to cloud services and soon to the Internet of Things （IoT） deployment. Memories are one of the major contributors to power consumption. However, the development of emerging memory technologies paves the way to low-power design, through the partial replacement of the dynamic random access memory （DRAM） with the non-volatile stand-alone memory in servers or with the embedded or distributed emerging non-volatile memory in IoT objects. In the latter case, non-volatile flip-flops （NVFFs） seem a promising candidate to replace the retention latch. Indeed, IoT objects present long sleep time and NVFFs offer to save data in registers with zero power when the application is idle. This paper gives an overview of NVFF architecture flavors for various emerging memory technologies.

The complex roles of m^(6)A modifications in neural stem cell proliferation, differentiation, and self-renewal and implications for memory and neurodegenerative diseases

N6-methyladenosine(m^(6)A), the most prevalent and conserved RNA modification in eukaryotic cells, profoundly influences virtually all aspects of mRNA metabolism. mRNA plays crucial roles in neural stem cell genesis and neural regeneration, where it is highly concentrated and actively involved in these processes. Changes in m^(6)A modification levels and the expression levels of related enzymatic proteins can lead to neurological dysfunction and contribute to the development of neurological diseases. Furthermore, the proliferation and differentiation of neural stem cells, as well as nerve regeneration, are intimately linked to memory function and neurodegenerative diseases. This paper presents a comprehensive review of the roles of m^(6)A in neural stem cell proliferation, differentiation, and self-renewal, as well as its implications in memory and neurodegenerative diseases. m^(6)A has demonstrated divergent effects on the proliferation and differentiation of neural stem cells. These observed contradictions may arise from the time-specific nature of m^(6)A and its differential impact on neural stem cells across various stages of development. Similarly, the diverse effects of m^(6)A on distinct types of memory could be attributed to the involvement of specific brain regions in memory formation and recall. Inconsistencies in m^(6)A levels across different models of neurodegenerative disease, particularly Alzheimer's disease and Parkinson's disease, suggest that these disparities are linked to variations in the affected brain regions. Notably, the opposing changes in m^(6)A levels observed in Parkinson's disease models exposed to manganese compared to normal Parkinson's disease models further underscore the complexity of m^(6)A's role in neurodegenerative processes. The roles of m^(6)A in neural stem cell proliferation, differentiation, and self-renewal, and its implications in memory and neurodegenerative diseases, appear contradictory. These inconsistencies may be attributed to the timespecific nature of m^(6)A and its varying effects on distinct brain regions and in different environments.

Exercise preconditioning alleviates ischemia-induced memory deficits by increasing circulating adiponectin

Cerebral ischemia is a major health risk that requires preventive approaches in addition to drug therapy.Physical exercise enhances neurogenesis and synaptogenesis,and has been widely used for functional rehabilitation after stroke.In this study,we determined whether exercise training before disease onset can alleviate the severity of cerebral ischemia.We also examined the role of exercise-induced circulating factors in these effects.Adult mice were subjected to 14 days of treadmill exercise training before surgery for middle cerebral artery occlusion.We found that this exercise pre-conditioning strategy effectively attenuated brain infarct area,inhibited gliogenesis,protected synaptic proteins,and improved novel object and spatial memory function.Further analysis showed that circulating adiponectin plays a critical role in these preventive effects of exercise.Agonist activation of adiponectin receptors by Adipo Ron mimicked the effects of exercise,while inhibiting receptor activation abolished the exercise effects.In summary,our results suggest a crucial role of circulating adiponectin in the effects of exercise pre-conditioning in protecting against cerebral ischemia and supporting the health benefits of exercise.