A novel non-volatile memory storage system for I/O-intensive applications

The emerging memory technologies, such as phase change memory （PCM）, provide chances for high- performance storage of I/O-intensive applications. However, traditional software stack and hardware architecture need to be optimized to enhance I/O efficiency. In addition, narrowing the distance between computation and storage reduces the number of I/O requests and has become a popular research direction. This paper presents a novel PCM- based storage system. It consists of the in-storage processing enabled file system （ISPFS） and the configurable parallel computation fabric in storage, which is called an in-storage processing （ISP） engine. On one hand, ISPFS takes full advantage of non-volatile memory （NVM）＇s characteristics, and reduces software overhead and data copies to provide low-latency high-performance random access. On the other hand, ISPFS passes ISP instructions through a command file and invokes the ISP engine to deal with I/O-intensive tasks. Extensive experiments are performed on the prototype system. The results indicate that ISPFS achieves 2 to 10 times throughput compared to EXT4. Our ISP solution also reduces the number of I/O requests by 97% and is 19 times more efficient than software implementation for I/O-intensive applications.

A Low-Power,Single-Poly,Non-Volatile Memory for Passive RFID Tags

Single-poly,576bit non-volatile memory is designed and implemented in an SMIC 0.18μm standard CMOS process for the purpose of reducing the cost and power of passive RFID tag chips. The memory bit cell is designed with conventional single-poly pMOS transistors, based on the bi-directional Fowler-Nordheim tunneling effect, and the typical program/erase time is 10ms for every 16bits. A new ,single-ended sense amplifier is proposed to reduce the power dissipation in the current sensing scheme. The average current consumption of the whole memory chip is 0.8μA for the power supply voltage of 1.2V at a reading rate of 640kHz.

Fabrication and integration of photonic devices for phase-change memory and neuromorphic computing

In the past decade,there has been tremendous progress in integrating chalcogenide phase-change materials(PCMs)on the silicon photonic platform for non-volatile memory to neuromorphic in-memory computing applications.In particular,these non von Neumann computational elements and systems benefit from mass manufacturing of silicon photonic integrated circuits(PICs)on 8-inch wafers using a 130 nm complementary metal-oxide semiconductor line.Chip manufacturing based on deep-ultraviolet lithography and electron-beam lithography enables rapid prototyping of PICs,which can be integrated with high-quality PCMs based on the wafer-scale sputtering technique as a back-end-of-line process.In this article,we present an overview of recent advances in waveguide integrated PCM memory cells,functional devices,and neuromorphic systems,with an emphasis on fabrication and integration processes to attain state-of-the-art device performance.After a short overview of PCM based photonic devices,we discuss the materials properties of the functional layer as well as the progress on the light guiding layer,namely,the silicon and germanium waveguide platforms.Next,we discuss the cleanroom fabrication flow of waveguide devices integrated with thin films and nanowires,silicon waveguides and plasmonic microheaters for the electrothermal switching of PCMs and mixed-mode operation.Finally,the fabrication of photonic and photonic–electronic neuromorphic computing systems is reviewed.These systems consist of arrays of PCM memory elements for associative learning,matrix-vector multiplication,and pattern recognition.With large-scale integration,the neuromorphic photonic computing paradigm holds the promise to outperform digital electronic accelerators by taking the advantages of ultra-high bandwidth,high speed,and energy-efficient operation in running machine learning algorithms.

Unconventional phase transition of phase-change-memory materials for optical data storage

Recent years, optically controlled phase-change memory draws intensive attention owing to some advanced applications including integrated all-optical nonvolatile memory, in-memory computing, and neuromorphic computing. The light-induced phase transition is the key for this technology. Traditional understanding on the role of light is the heating effect. Generally, the RESET operation of phase-change memory is believed to be a melt-quenching-amorphization process. However, some recent experimental and theoretical investigations have revealed that ultrafast laser can manipulate the structures of phase-change materials by non-thermal effects and induces unconventional phase transitions including solid-to-solid amorphization and order-to-order phase transitions. Compared with the conventional thermal amorphization,these transitions have potential superiors such as faster speed, better endurance, and low power consumption. This article summarizes some recent progress of experimental observations and theoretical analyses on these unconventional phase transitions. The discussions mainly focus on the physical mechanism at atomic scale to provide guidance to control the phase transitions for optical storage. Outlook on some possible applications of the non-thermal phase transition is also presented to develop new types of devices.

Universal memory based on phase-change materials:From phase-change random access memory to optoelectronic hybrid storage

The era of information explosion is coming and information need to be continuously stored and randomly accessed over long-term periods,which constitute an insurmountable challenge for existing data centers.At present,computing devices use the von Neumann architecture with separate computing and memory units,which exposes the shortcomings of“memory bottleneck”.Nonvolatile memristor can realize data storage and in-memory computing at the same time and promises to overcome this bottleneck.Phase-change random access memory(PCRAM)is called one of the best solutions for next generation non-volatile memory.Due to its high speed,good data retention,high density,low power consumption,PCRAM has the broad commercial prospects in the in-memory computing application.In this review,the research progress of phase-change materials and device structures for PCRAM,as well as the most critical performances for a universal memory,such as speed,capacity,and power consumption,are reviewed.By comparing the advantages and disadvantages of phase-change optical disk and PCRAM,a new concept of optoelectronic hybrid storage based on phase-change material is proposed.Furthermore,its feasibility to replace existing memory technologies as a universal memory is also discussed as well.

Overview of one transistor type of hybrid organic ferroelectric non-volatile memory

Organic ferroelectric memory devices based on field effect transistors that can be configured between two stable states of on and off have been widely researched as the next generation data storage media in recent years.This emerging type of memory devices can lead to a new instrument system as a potential alternative to previous non-volatile memory building blocks in future processing units because of their numerous merits such as cost-effective process,simple structure and freedom in substrate choices.This bi-stable non-volatile memory device of information storage has been investigated using several organic or inorganic semiconductors with organic ferroelectric polymer materials.Recent progresses in this ferroelectric memory field,hybrid system have attracted a lot of attention due to their excellent device performance in comparison with that of all organic systems.In this paper,a general review of this type of ferroelectric non-volatile memory is provided,which include the device structure,organic ferroelectric materials,electrical characteristics and working principles.We also present some snapshots of our previous study on hybrid ferroelectric memories including our recent work based on zinc oxide nanowire channels.

Total Ionization Dose Effects on Charge Storage Capability of Al2O3/HfO2/Al2O3-Based Charge Trapping Memory Cell

Because of the discrete charge storage mechanism, charge trapping memory（CTM） technique is a good candidate for aerospace and military missions. The total ionization dose（TID） effects on CTM cells with Al2O3/HfO2/Al2O3（AHA） high-k gate stack structure under in-situ 10 keV x-rays are studied. The C-V characteristics at different radiation doses demonstrate that charge stored in the device continues to be leaked away during the irradiation,thereby inducing the shift of flat band voltage（V（fb））. The dc memory window shows insignificant changes, suggesting the existence of good P/E ability. Furthermore, the physical mechanisms of TID induced radiation damages in AHA-based CTM are analyzed.

Formation of high density TiN nanocrystals and its application in non-volatile memories

Non-volatile memory based on TiN nanocrystal （TiN-NC） charge storage nodes embedded in SiO2 has been fabricated and its electrical properties have been measured. It was found that the density and size distribution of TiN-NCs can be controlled by annealing temperature. The formation of well separated crystalline TiN nano-dots with an average size of 5 nm is confirmed by transmission electron microscopy and x-ray diffraction, x-ray photoelectron spectroscopy confirms the existence of a transition layer of TiNxOy/SiON oxide between TiN-NC and SiO2, which reduces the barrier height of tunnel oxide and thereby enhances programming/erasing speed. The memory device shows a memory window of 2.5V and an endurance cycle throughout 10^5. Its charging mechanism, which is interpreted from the analysis of programming speed （dVth/dt） and the gate leakage versus voltage characteristics （Ig vs Vg）, has been explained by direct tunnelling for tunnel oxide and Fowler Nordheim tunnelling for control oxide at programming voltages lower than 9V, and by Fowler-Nordheim tunnelling for both the oxides at programming voltages higher than 9V.

Molecular dynamics simulations on the wet/dry self-latching and electric fields triggered wet/dry transitions between nanosheets:A non-volatile memory nanostructure

We design a nanostructure composing of two nanoscale graphene sheets parallelly immersed in water.Using molecular dynamics simulations,we demonstrate that the wet/dry state between the graphene sheets can be self-latched;moreover,the wet→dry/dry→wet transition takes place when applying an external electric field perpendicular/parallel to the graphene sheets(E;/E;).This structure works like a flash memory device(a non-volatile memory):the stored information(wet and dry states)of the system can be kept spontaneously,and can also be rewritten by external electric fields.On the one hand,when the distance between the two nanosheets is close to a certain distance,the free energy barriers for the transitions dry→wet and wet→dry can be quite large.As a result,the wet and dry states are self-latched.On the other hand,an E;and an E;will respectively increase and decrease the free energy of the water located in-between the two nanosheets.Consequently,the wet→dry and dry→wet transitions are observed.Our results may be useful for designing novel information memory devices.

An Overview of Non-Volatile Flip-Flops Based on Emerging Memory Technologies(Invited paper)

Low power consumption is a major issue in nowadays electronics systems. This trend is pushed by the development of data center related to cloud services and soon to the Internet of Things （IoT） deployment. Memories are one of the major contributors to power consumption. However, the development of emerging memory technologies paves the way to low-power design, through the partial replacement of the dynamic random access memory （DRAM） with the non-volatile stand-alone memory in servers or with the embedded or distributed emerging non-volatile memory in IoT objects. In the latter case, non-volatile flip-flops （NVFFs） seem a promising candidate to replace the retention latch. Indeed, IoT objects present long sleep time and NVFFs offer to save data in registers with zero power when the application is idle. This paper gives an overview of NVFF architecture flavors for various emerging memory technologies.

Design of an Electrically Written and Optically Read Non-volatile Memory Device Employing BiFeO3/Au Heterostructures with Strong Absorption Resonance

Exploiting new concepts for dense, fast, and nonvolatile random access memory with reduced energy consump- tion is a significant issue for information technology. Here we design an ＇electrically written and optically read＇ information storage device employing BiFeO3/A u heterostruetures with strong absorption resonance. The electro- optic effect is the basis for the device design, which arises from the strong absorption resonance in BiFeO3/Au heterostructures and the electrically tunable significant birefringence of the BiFeO3 film. We first construct a sim- ulation calculation of the BiFeO3/Au structure spectrum and identify absorption resonance and electro-optical modulation characteristics. Following a micro scale partition, the surface reflected light intensity of different polarization units is calculated. The results depend on electric polarization states of the BiFeO3 film, thus BiFeO3/Au heterostructures can essentially be designed as a type of electrically written and optically read infor- mation storage device by utilizing the scanning near-field optical microscopy technology based on the conductive silicon cantilever tip with nanofabricated aperture. This work will shed light on information storage technology.

Approximate Similarity-Aware Compression for Non-Volatile Main Memory

Image bitmaps,i.e.,data containing pixels and visual perception,have been widely used in emerging applica-tions for pixel operations while consuming lots of memory space and energy.Compared with legacy DRAM(dynamic ran-dom access memory),non-volatile memories(NVMs)are suitable for bitmap storage due to the salient features of high density and intrinsic durability.However,writing NVMs suffers from higher energy consumption and latency compared with read accesses.Existing precise or approximate compression schemes in NVM controllers show limited performance for bitmaps due to the irregular data patterns and variance in bitmaps.We observe the pixel-level similarity when writing bitmaps due to the analogous contents in adjacent pixels.By exploiting the pixel-level similarity,we propose SimCom,an approximate similarity-aware compression scheme in the NVM module controller,to efficiently compress data for each write access on-the-fly.The idea behind SimCom is to compress continuous similar words into the pairs of base words with runs.The storage costs for small runs are further mitigated by reusing the least significant bits of base words.SimCom adaptively selects an appropriate compression mode for various bitmap formats,thus achieving an efficient trade-off be-tween quality and memory performance.We implement SimCom on GEM5/zsim with NVMain and evaluate the perfor-mance with real-world image/video workloads.Our results demonstrate the efficacy and efficiency of our SimCom with an efficient quality-performance trade-off.

Deep Learning Network for Energy Storage Scheduling in Power Market Environment Short-Term Load Forecasting Model

In the electricity market,fluctuations in real-time prices are unstable,and changes in short-term load are determined by many factors.By studying the timing of charging and discharging,as well as the economic benefits of energy storage in the process of participating in the power market,this paper takes energy storage scheduling as merely one factor affecting short-term power load,which affects short-term load time series along with time-of-use price,holidays,and temperature.A deep learning network is used to predict the short-term load,a convolutional neural network(CNN)is used to extract the features,and a long short-term memory(LSTM)network is used to learn the temporal characteristics of the load value,which can effectively improve prediction accuracy.Taking the load data of a certain region as an example,the CNN-LSTM prediction model is compared with the single LSTM prediction model.The experimental results show that the CNN-LSTM deep learning network with the participation of energy storage in dispatching can have high prediction accuracy for short-term power load forecasting.

A Low Power Non-Volatile LR-WPAN Baseband Processor with Wake-Up Identification Receiver

The paper proposes a low power non-volatile baseband processor with wake-up identification(WUI) receiver for LR-WPAN transceiver.It consists of WUI receiver,main receiver,transmitter,non-volatile memory(NVM) and power management module.The main receiver adopts a unified simplified synchronization method and channel codec with proactive Reed-Solomon Bypass technique,which increases the robustness and energy efficiency of receiver.The WUI receiver specifies the communication node and wakes up the transceiver to reduce average power consumption of the transceiver.The embedded NVM can backup/restore the states information of processor that avoids the loss of the state information caused by power failure and reduces the unnecessary power of repetitive computation when the processor is waked up from power down mode.The baseband processor is designed and verified on a FPGA board.The simulated power consumption of processor is 5.1uW for transmitting and 28.2μW for receiving.The WUI receiver technique reduces the average power consumption of transceiver remarkably.If the transceiver operates 30 seconds in every 15 minutes,the average power consumption of the transceiver can be reduced by two orders of magnitude.The NVM avoids the loss of the state information caused by power failure and energy waste caused by repetitive computation.

基于长短时记忆网络和生成对抗网络的VRB储能系统虚假数据注入攻击检测

随着信息技术的不断发展,直流微电网储能系统已成为深度融合的信息物理系统,而精确的荷电状态估计对储能系统的实时监测和安全稳定运行至关重要。针对全钒液流电池(vanadium redox flow battery,VRB)储能系统荷电状态估计中,由虚假数据注入攻击导致的异常数据检测问题,提出一种基于长短时记忆网络和生成对抗网络的检测方法。首先,建立了VRB等效电路模型和虚假数据注入攻击模型;然后,通过训练长短时记忆网络和生成对抗网络组成的循环网络,将长短时记忆神经网络嵌入生成对抗网络框架作为生成器和鉴别器来分析电池时序数据,通过判别网络中的判别损失误差和生成网络中的重构残差得到异常损失进行综合判断;最后,以CEC-VRB-5kW型号电池为对象,并构造不同强度的虚假数据攻击进行实验,验证检测方法的准确性与可行性。结果表明,与经典循环神经网络、随机森林、自编码器、长短时记忆网络检测方法进行对比,所提方法具有较高的检测精度,在VRB储能系统荷电状态估计中能够有效辨识虚假数据攻击。

面向NVM的IoT时序数据多态协作压缩策略

压缩策略是影响IoT时序数据存储系统性能的重要因素,而现有压缩策略缺乏针对NVM与IoT时序数据特性的优化机制。因此,提出了面向NVM的IoT时序数据多态协作压缩策略。首先,给出了IoT时序数据的组织结构。然后,针对IoT时序数据在一段时间内较稳定以及在用户态与内核态读写NVM适合的粒度差异较大的情况,设计了分层压缩策略。在用户态接收数据时,采用轻量级的数据压缩算法减少需存储的数据量,也减小了对IoT时序数据的存储效率的影响;针对IoT系统以查询和分析异常时序数据为主的特性,设计了深度压缩算法,在内核态对历史IoT时序数据进行深度压缩。其次,针对深度压缩历史IoT时序数据与存储新接收的IoT时序数据之间对NVM带宽的竞争,提出了写带宽保证的动态调整算法。最后,构建了面向NVM的IoT时序数据多态协作压缩策略原型PCCTSMS,并使用YCSB-TS工具进行测试与分析。实验结果表明,与InfluxDB、OpenTSDB、KairosDB和TVStore相比,PCCTSMS最高能提升161.3%的写吞吐率以及减少14.6%的存储空间。

存算一体技术研究现状

冯诺依曼计算机体系结构面临着“存储墙”的瓶颈,阻碍AI(Artificial Intelligence)计算性能提升.存算一体硬件结构打破了“存储墙”的限制,大大提升了AI计算的性能.目前存算一体计算方案已在多种存储介质上得到实现,根据计算信号类型,可以将存算一体计算方案分成数字存算一体方案和模拟存算一体方案.存算一体硬件结构使得AI计算的性能取得巨大提升,然而进一步发展仍面临重大挑战.本文对不同信号域的存算一体方案的进行了对比分析,指出了每一种方案的主要优缺点,也指明了存算一体技术面临的挑战.我们认为,随着工艺集成、器件、电路、架构,软件工具链的跨层次协同研究发展,存算一体技术将在边缘端和云端,为AI计算提供更加强大和高效的算力.

LSTM-EKF算法实现储能集装箱电芯SOC的优化估计

储能集装箱是锂电池储能电站的核心设备,每个集装箱由数千只电芯串并联构成。因此,对集装箱电芯锂电池荷电状态(state of charge,SOC)的准确估计成为表征储能电站运行最核心最基础的参数,并且为辅助新能源高效并网,储能系统的工作状态也会相应地呈现随机性、波动性和不确定性,这对电芯状态估计的准确度提出了更高的要求。为此,首先基于基尔霍夫定律建立Thevenin电池模型,根据安时积分法列出系统的状态和观测方程,并且将其状态和观测方程作为扩展卡尔曼滤波(extended Kalman filtering,EKF)算法的研究对象。然后利用EKF算法对估计值电池SOC更新迭代,再将EKF算法中得到的卡尔曼矩阵和状态变量更新误差值以及UDDS工况下的电池数据,作为长短期记忆(long short-term memory,LSTM)神经网络算法的训练数据集,由此完成LSTM-EKF联合算法,实现对储能集装箱电芯SOC的优化估计。该文所提LSTM-EKF算法可将电芯SOC的误差值降低到1%以下。最后对优化算法在储能电站安全运行与监控平台中的应用情况进行介绍。

基于混合存储结构的分级协同节能方案

新能源的应用已成为一种趋势,但具体到存储I/O领域,存储设备通常会根据存储负载的强度进行节点调度,而不规则波动的新能源和存储负载之间存在波峰波谷错位匹配的问题,增加了存储设备的调度难度。提出了一种针对NVM-SSD混合存储介质的分级协同节能方案MixSave,为每一层提供定制化节能方案并且协同调度,提升了新能源能效比。基于NVM和SSD存储介质的性能与能耗特点,MixSave采用NVMSSD的高性价比分级存储架构,为用户提供高性能、大容量存储服务,并且通过副本保证数据可靠性。NVM作为缓存层采用负载驱动型方案,以保证性能为优先目标,即根据负载变化动态调整高功耗状态的NVM设备数量,满足负载需求;SSD作为数据层采用新能源驱动型节能方案,以提升新能源利用率为目标,根据新能源的变化动态调整SSD启用数量,进行缓存数据同步与预取。测试表明,与未采取节能措施的标准方案相比,MixSave性能下降不超过4%,在轻负载模式下,MixSave可节省73%~80%的传统能源,在重负载模式下,可节省55%~61%的传统能源。

swLLVM:面向神威新一代超级计算机的优化编译器

异构众核架构具有超高的能效比,已成为超级计算机体系结构的重要发展方向.然而,异构系统的复杂性给应用开发和优化提出了更高要求,其在发展过程中面临好用性和可编程性等众多技术挑战.我国自主研制的神威新一代超级计算机采用了国产申威异构众核处理器SW26010Pro.为了发挥新一代众核处理器的性能优势,支撑新兴科学计算应用的开发和优化,设计并实现面向SW26010Pro平台的优化编译器swLLVM.该编译器支持Athread和SDAA双模态异构编程模型,提供多级存储层次描述及向量操作扩展,并且针对SW26010Pro架构特点实现控制流向量化、基于代价的节点合并以及针对多级存储层次的编译优化.测试结果表明,所设计并实现的编译优化效果显著,其中,控制流向量化和节点合并优化的平均加速比分别为1.23和1.11,而访存相关优化最高可获得2.49倍的性能提升.最后,使用SPEC CPU2006标准测试集从多个维度对swLLVM进行了综合评估,相较于SWGCC的相同优化级别,swLLVM整型课题性能平均下降0.12%,浮点型课题性能平均提升9.04%,整体性能平均提升5.25%,编译速度平均提升79.1%,代码尺寸平均减少1.15%.