Normally-off AlGaN/GaN heterojunction field-effect transistors with in-situ AlN gate insulator

AlGaN/GaN heterojunction field-effect transistors(HFETs)with p-GaN cap layer are developed for normally-off operation,in which an in-situ grown AlN layer is utilized as the gate insulator.Compared with the SiNxgate insulator,the AlN/p-GaN interface presents a more obvious energy band bending and a wider depletion region,which helps to positively shift the threshold voltage.In addition,the relatively large conduction band offset of AlN/p-GaN is beneficial to suppress the gate leakage current and enhance the gate breakdown voltage.Owing to the introduction of AlN layer,normally-off p-GaN capped AlGaN/GaN HFET with a threshold voltage of 4 V and a gate swing of 13 V is realized.Furthermore,the field-effect mobility is approximately 1500 cm^(2)·V^(-1)·s^(-1)in the 2DEG channel,implying a good device performance.

Simulation design of normally-off AlGaN/GaN high-electron-mobility transistors with p-GaN Schottky hybrid gate

A novel normally-off AlGaN/GaN high-electron-mobility transistor(HEMT)with a p-GaN Schottky hybrid gate(PSHG)is proposed,and compared with the conventional p-GaN normally-off AlGaN/GaN HEMTs.This structure can be realized by selective etching of p-GaN layer,which enables the Schottky junction and PN junction to control the channel charge at the same time.The direct current(DC)and switching characteristics of the PSHG HEMTs are simulated by Slivaco TCAD,and the p-GaN HEMTs and conventional normally-on HEMTs are also simulated for comparison.The simulation results show that the PSHG HEMTs have a higher current density and a lower on-resistance than p-GaN HEMTs,which is more obvious with the decrease of p-GaN ratios of the PSHG HEMTs.The breakdown voltage and threshold voltage of the PSHG HEMTs are very close to those of the p-GaN HEMTs.In addition,the PSHG HEMTs have a higher switching speed than the conventional normally-on HEMTs,and the p-GaN layer ratio has no obvious effect on the switching speed.

Normally-off metamorphic AlInAs/AlInAs HEMTs on Si substrates grown by MOCVD

A combination of self-aligned fluoride-based plasma treatment and post-gate rapid thermal annealing was developed to fabricate a novel 120-nm T-shaped gate normally-off metamorphic Al0.49In0.51As/Ga0.47In0.53 As HEMT device on a Si substrate grown by metal-organic chemical vapor deposition（MOCVD）. A shift of the threshold voltage, from-0.42 V to 0.11 V was obtained and the shift can be effectively adjusted by the process parameter of CF4 plasma treatment. Furthermore, a side benefit of reducing the leakage current of the device up to two orders of magnitude was also observed.E-mode transistors with 120 nm gate length own fTup to 160 GHz and fmax of 140 GHz. These characteristics imply the potential of the fluoride-based plasma treatment technology for the fabrication of monolithic enhancement/depletion-mode mHEMTs, which also encourage the massive production with this low-cost technology.

Physical analysis of normally-off ALD Al_(2)O_(3)/GaN MOSFET with different substrates using self-terminating thermal oxidation-assisted wet etching technique

Based on the self-terminating thermal oxidation-assisted wet etching technique,two kinds of enhancement mode Al_(2)O_(3)/GaN MOSFETs(metal-oxide-semiconductor field-effect transistors)separately with sapphire substrate and Si sub-strate are prepared.It is found that the performance of sapphire substrate device is better than that of silicon substrate.Comparing these two devices,the maximum drain current of sapphire substrate device(401 mA/mm)is 1.76 times that of silicon substrate device(228 mA/mm),and the field-effect mobility(μ_(FEmax))of sapphire substrate device(176 cm^(2)/V·s)is 1.83 times that of silicon substrate device(96 cm^(2)/V·s).The conductive resistance of silicon substrate device is 21.2Ω-mm,while that of sapphire substrate device is only 15.2Ω·mm,which is 61%that of silicon substrate device.The significant difference in performance between sapphire substrate and Si substrate is related to the differences in interface and border trap near Al_(2)O_(3)/GaN interface.Experimental studies show that(i)interface/border trap density in the sapphire substrate device is one order of magnitude lower than in the Si substrate device,(ii)Both the border traps in Al_(2)O_(3) dielectric near Al_(2)O_(3)/GaN and the interface traps in Al_(2)O_(3)/GaN interface have a significantly effect on device channel mobility,and(iii)the properties of gallium nitride materials on different substrates are different due to wet etching.The research results in this work provide a reference for further optimizing the performances of silicon substrate devices.

Design consideration and fabrication of 1.2-kV 4H-SiC trenched-and-implanted vertical junction field-effect transistors

We present the design consideration and fabrication of 4H-SiC trenched-and-implanted vertical junction field-effect transistors （TI-VJFETs）. Different design factors, including channel width, channel doping, and mesa height, are con- sidered and evaluated by numerical simulations. Based on the simulation result, normally-on and normally-off devices are fabricated. The fabricated device has a 12 μm thick drift layer with 8 × 10^15 cm^-3 N-type doping and 2.6 μm channel length. The normally-on device shows a 1.2 kV blocking capability with a minimum on-state resistance of 2.33 mΩ.cm2, while the normally-off device shows an on-state resistance of 3.85 mΩ.cm2. Both the on-state and the blocking performances of the device are close to the state-of-the-art values in this voltage range.

Low Power Computing Paradigms Based on Emerging Non-Volatile Nanodevices

Traditional digital processing approaches are based on semiconductor transistors, which suffer from high power consumption, aggravating with technology node scaling. To solve definitively this problem, a number of emerging non-volatile nanodevices are under intense investigations. Meanwhile, novel computing circuits are invented to dig the full potential of the nanodevices. The combination of non-volatile nanodevices with suitable computing paradigms have many merits compared with the complementary metal-oxide-semiconductor transistor （CMOS） technology based structures, such as zero standby power, ultra-high density, non-volatility, and acceptable access speed. In this paper, we overview and compare the computing paradigms based on the emerging nanodevices towards ultra-low dissipation.

Zero-static-power nonvolatile logic-in-memory circuits for flexible electronics

Flexible logic circuits and memory with ultra-low static power consumption are in great demand for battery-powered flexible electronic systems. Here, we show that a flexible nonvolatile logic-in-memory circuit enabling normally-off computing can be implemented using a poly（1,3,5-trivinyl-l,3,5-trimethyl cyclotrisiloxane） （pV3D3）-based memristor array. Although memristive logic-in-memory circuits have been previously reported, the requirements of additional components and the large variation of memristors have limited demonstrations to simple gates within a few operation cycles on rigid substrates only. Using memristor-aided logic （MAGIC） architecture requiring only memristors and pV3D3-memristor with good uniformity on a flexible substrate, for the first time, we experimentally demonstrated our implementation of MAGIC-NOT and -NOR gates during multiple cycles and even under bent conditions. Other functions, such as OR, AND, NAND, and a half adder, are also realized by combinations of NOT and NOR gates within a crossbar array. This research advances the development of novel computing architecture with zero static power consumption for battery- powered flexible electronic systems.