In this paper,an NMOS output-capacitorless low-dropout regulator(OCL-LDO)featuring dual-loop regulation has been proposed,achieving fast transient response with low power consumption.An event-driven charge pump(CP)loo...In this paper,an NMOS output-capacitorless low-dropout regulator(OCL-LDO)featuring dual-loop regulation has been proposed,achieving fast transient response with low power consumption.An event-driven charge pump(CP)loop with the dynamic strength control(DSC),is proposed in this paper,which overcomes trade-offs inherent in conventional structures.The presented design addresses and resolves the large signal stability issue,which has been previously overlooked in the event-driven charge pump structure.This breakthrough allows for the full exploitation of the charge-pump structure's poten-tial,particularly in enhancing transient recovery.Moreover,a dynamic error amplifier is utilized to attain precise regulation of the steady-state output voltage,leading to favorable static characteristics.A prototype chip has been fabricated in 65 nm CMOS technology.The measurement results show that the proposed OCL-LDO achieves a 410 nA low quiescent current(IQ)and can recover within 30 ns under 200 mA/10 ns loading change.展开更多
An ultra-low power output-capacitorless low-dropout（LDO） regulator with a slew-rate-enhanced（SRE）circuit is introduced. The increased slew rate is achieved by sensing the transient output voltage of the LDO and th...An ultra-low power output-capacitorless low-dropout（LDO） regulator with a slew-rate-enhanced（SRE）circuit is introduced. The increased slew rate is achieved by sensing the transient output voltage of the LDO and then charging（or discharging） the gate capacitor quickly. In addition, a buffer with ultra-low output impedance is presented to improve line and load regulations. This design is fabricated by SMIC 0.18 μm CMOS technology. Experimental results show that, the proposed LDO regulator only consumes an ultra-low quiescent current of 1.2 μA.The output current range is from 10 μA to 200 m A and the corresponding variation of output voltage is less than 40 m V. Moreover, the measured line regulation and load regulation are 15.38 m V/V and 0.4 m V/m A respectively.展开更多
基金supported by the National Natural Science Foundation of China under Grant 62274189the Natural Science Foundation of Guangdong Province,China,under Grant 2022A1515011054the Key Area R&D Program of Guangdong Province under Grant 2022B0701180001.
文摘In this paper,an NMOS output-capacitorless low-dropout regulator(OCL-LDO)featuring dual-loop regulation has been proposed,achieving fast transient response with low power consumption.An event-driven charge pump(CP)loop with the dynamic strength control(DSC),is proposed in this paper,which overcomes trade-offs inherent in conventional structures.The presented design addresses and resolves the large signal stability issue,which has been previously overlooked in the event-driven charge pump structure.This breakthrough allows for the full exploitation of the charge-pump structure's poten-tial,particularly in enhancing transient recovery.Moreover,a dynamic error amplifier is utilized to attain precise regulation of the steady-state output voltage,leading to favorable static characteristics.A prototype chip has been fabricated in 65 nm CMOS technology.The measurement results show that the proposed OCL-LDO achieves a 410 nA low quiescent current(IQ)and can recover within 30 ns under 200 mA/10 ns loading change.
基金Project supported by the National Natural Science Foundation of China(Nos.61401137,61404043,61674049)
文摘An ultra-low power output-capacitorless low-dropout（LDO） regulator with a slew-rate-enhanced（SRE）circuit is introduced. The increased slew rate is achieved by sensing the transient output voltage of the LDO and then charging（or discharging） the gate capacitor quickly. In addition, a buffer with ultra-low output impedance is presented to improve line and load regulations. This design is fabricated by SMIC 0.18 μm CMOS technology. Experimental results show that, the proposed LDO regulator only consumes an ultra-low quiescent current of 1.2 μA.The output current range is from 10 μA to 200 m A and the corresponding variation of output voltage is less than 40 m V. Moreover, the measured line regulation and load regulation are 15.38 m V/V and 0.4 m V/m A respectively.
