基于Switch-Capacitor网络实现分时供电的多输入升压变换器

在新能源联合发电系统中,多输入直流变换器可分时或同时向负载提供能量,具有简化系统结构、降低系统成本等优点。然而,现有的多输入直流变换器不能很好地满足新能源发电领域对高升压比、低纹波、低开关应力等技术参数的要求。因此,本文基于Switch-Capacitor网络串联放电、并联充电和多个网络累加升压的工作特性,推导出一种新型多输入升压变换器。本文以三输入升压变换器为例,详细分析了其在连续工作模式下的工作原理和工作性能,进行了仿真分析,并搭建了实验模型,仿真分析与实验研究的结果表明:①升压能力强,其升压比与Switch-Capacitor网络组中的网络个数有关;②开关器件的电压应力、输入电流纹波和输出电压纹波小;③所有开关管由同一控制信号隔离驱动,控制电路简单;④实现分时供电,元器件利用率高;⑤推演出对应的同时供电多输入升压变换器。

Waveform digitization utilizing switched-capacitor arrays

Compared with traditional waveform digitization with flash-ADCs, waveform digitization with switched-capacitor arrays (SCAs) is able to achieve the sampling speed above 1 GS/s without degrading the analog to digital conversion precision significantly. In this paper, we present the implementation of a fast waveform digitization system with the use of SCAs, and evaluate its performance of waveform digitization and the waveform timing. At about 5 GS/s, the dynamic input range of the digitizer is about 66 dB, and its timing precision is about 20 ps (RMS).

Fault Location Method and Simulation Analysis of Parallel Compensating Capacitors

At present, the operational parallel compensating capacitors can only through the protection action for the information, so we can‘t location the fault capacitor. In order to obtain every parallel capacitor running status information and meanwhile according to internal structure and the operation mode of film capacitor, this paper established the physical model on the single capacitor and the capacitors and simulated different forms of capacitor fault model and calculated currents changes which flow through the capacitor in every group. According to the above situation, we established fault criterion matrix of capacitors. The simulation results show that the fault criterion matrix can reflect capacitor running state information accurately, and it positioned fault capacitor effectively.

ANALYSIS AND DESIGN OF THE STABLE PARALLEL PACKET SWITCH

This paper analyzes the Parallel Packet Switch(PPS) architecture and studies how to guarantee its performance. Firstly a model of Stable PPS (SPPS) is proposed. The constraints of traffic scheduling algorithms, the number of switching layers and internal speedup, for both bufferless and buffered SPPS architecture, are theoretically analyzed. Based on these results, an example of designing a scalable SPPS with 1.28T capacity is presented, and practical considerations on implementing the scheduling algorithm are discussed. Simulations are carried out to investigate the validity and delay performance of the SPPS architecture.

Design of a Switched Capacitor Negative Feedback Circuit for a Very Low Level DC Current Amplifier

To miniaturize a very low level dc current amplifier and to improve its output response speed, the switched capacitor negative feedback circuit (SCNF), instead of the conventionally used high-ohmage resistor, is presented in this paper. In our system, a switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier using SCNF. The theoretical output voltage of the very low level dc current amplifier using SCNF is obtained. The experimental results show that the unnecessary components of the amplifier’s output are much decreased, and that the response speed of the amplifier with both the SCNF and SCF is faster than that using high-ohmage resistor.

Tunable Bandwidth Third Order Switched-Capacitor with Multiple Feedbacks Filter for Different Center Frequencies

This paper proposes third order tunable bandwidth active Switched-Capacitor filter. The circuit consists of only op-amps and switched capacitors. The circuit is designed for circuit merit factor Q = 10. The proposed circuit implements three filter functions low pass, band pass and high pass simultaneously in single circuit. The filter circuit can be used for both narrow as well as for wide bandwidth. For various values of cut-off frequencies the behaviour of circuit is studied. The circuit works properly only for higher central frequencies, when f0 > 10 kHz.

Effect of Switching Devices on Power Quality and Transient Voltage Suppression Using Capacitor Bank Model

The main purpose of the electrical power system is to transport and distribute energy generated by the central power plants in a safe and reliable manner to the customer premises. Most of the electrical equipment is exposed within the open which suggests they can be vulnerable to lightning strikes, road dwindling, windstorms, and a few engineering activities with the potential of causing different degrees of damage to the electrical equipment. One of the ways to guard the equipment is to deploy switching devices. However, the operations of most of these switching devices produce oscillatory transient in the electrical transmission and distribution systems which result in voltage, current, and frequency fluctuations in the load. This paper investigates the effect of switching devices on power quality and proposes a positive sequence voltage power transient suppression technique that can spontaneously improve the distorted voltage at the instant of capacitor switching using the capacitor line model as a case study. MATLAB/Simulink software was utilized for the analysis on an electrical network model with bus voltages of 69 kV/12.47 kV and 480 V. The results showed that, during switching operations, the positive sequence voltage power detector block produces ripple-free accurate results.

Active Current Sharing of LCLC Resonant Converter with Switch-Controlled-Capacitor Technology

In this paper,an interleaved LCLC converter with enhancement-mode(E-mode)GaN devices is introduced to achieve the accurate current sharing performance for data center applications. Any tolerance in the resonant tank elements can lead to large load imbalance between any two different phases. Due to the steep gain curves of LCLC converters,conventional current sharing methods are not effective. In the proposed converter,the impedances of the resonant networks are matched by switching a capacitor,i.e.,switch controlled capacitor(SCC),in series with the resonant capacitor in one or some of the phases,which results in accurate load current sharing among the phases with an accuracy around 0.025%. The load share of a phase is sensed through the resonant current on it,and the control logic applied to such current sharing can be achieved. By this method,accurate current sharing is achieved for a wide input voltage range required for the hold-up time in data center applications. Interleaving is applied in the proposed multiphase LCLC converter,resulting in low current stress on the output capacitor and allowing ceramic capacitor implementation. Moreover,phase shedding accomplishes high light load efficiency. The performance of the proposed interleaved LCLC converter is verified by a two-phase 1 k W prototype with an input voltage ranging from 250 V to 400 V and a fixed 12 V output voltage.

Switching of Capacitors in an Asymmetric Induction Motor with Single-Phase Power,Triggering Several Applied Loads

xThis study has as its objective to collaborate with the expansion in the market of electric energy in rural areas,offering as such an innovative prospect to the solution of associated problems through use of the asymmetric three-phase induction motor,supplied by a single-phase source.In this system,capacitor switching is applied during operation,while theoretical and practical results are presented for the application of this switching in a three-phase asymmetric induction motor of 20 hp.

Design of Sixth-Order Lowpass Elliptic Switched-Capacitor Filter

In this paper the design and implementation of sixth-order lowpass elliptic switched-capacitor filter( SCF) for interface circuit of Micro-Electro-Mechanical System( MEMS) sensor are presented. This work aims to lower total harmonic distortion( THD) without deteriorating other performances. After system design in Simulink,the filter is realized in transistor level and finally fabricated in Central Semiconductor Manufacturing Corporation( CSMC) 0.5 μm metal-oxide-semiconductor( CMOS) technology. Typical measured results are: it operates with 25: 1 clock-to-corner frequency ratio and a 10 k Hz maximum corner frequency. The maximum passband ripple is about 0.49 d B and the minimum stopband rejection is 40 d B for the temperature from-20 ℃to 80 ℃. For the 250 k Hz clock frequency setting,given the 1 k Hz,- 8 d BVrms input signal,the measured worst case THD is-64 d B. The active area of the chip is 2.8 mm2 with 8 pads. The analog power dissipation is10 m W from a 5 V power supply.

NOVEL LINEAR TRANSFORMATION SWITCHED-CAPACITOR FILTER DESIGN

This paper presents a novel method that is applied to realize the Linear Transformation(LT)Switched-Capacitor Filter(SCF).It adopts the Voltage Control Voltage Source(VCVS)equalized transfor-mation to revise the original LC ladder filter and induce it into 16 basic sections and then extend the princi-ple of the LT in order to fit active and 3 port networks and give out switched-capacitor circuits corre-sponding to the 16 basic sections,which can realize all four kinds of filters——LP,HP,BP,BS filters.De-signed examples are given here.An Nth order filter only requires N amplifiers and the circuit is insensitive toparasitic capacitances.The experimental results of a 3rd order elliptic LP and a 6th order elliptic BP are giv-en and agree with the theory.

A Novel Dual-Rate Sampling Switched-Capacitor Configuration and Its Application

In order to realize accurate bilinear transformation from s- to z-domain,a novelswitched-capacitor configuration is proposed in the light of principles of dual-rate sampling and chargeconservation,which has also been used for building a 5th-order elliptic lowpass filter.The filter issimulated and measured in typical 0.34 μm/3.3 V Si CMOS process models,special full differentialoperational amplifiers and CMOS transfer gate switches,which achieves 80 MHz sampling rate,17.8MHz cutoff frequency,0.052 dB maximum passband ripple,42.1 dB minimum stopband attenuation and74 mW quiescent power dissipation.At the same time,the dual-rate sampling topology breaks thetraditional restrictions of filter introduced by unit-gain bandwidth and slew rate of operational amplifiersand also improves effectively their performances in high-frequency applications.It has been applied forthe design of an anti-alias filter in analog front-end of video decoder IC with 15 MHz signal frequencyyet.

Multi-Phase QR ZCS Switched-Capacitor Bidirectional Power Converter for PV System Application

The multi-phase implementation in the QR （quasi resonant） ZCS （zero current switching） SC （switched capacitor） bidirectional DC-DC converter structure has been proposed to reduce current ripple, switching loss and significantly increase the converter efficiency and power density. This approach provides a more precise output voltage to obtain voltage conversion ratios from the double-mode versus half-mode to n-mode versus 1/n mode. This is accomplished by adding a different number of switched-capacitors and power MOSFET switches with a small series connected resonant inductor for forward and reverse schemes. The size and cost can be reduced when the proposed converter has been designed with the coupled inductors. The simulation and experimental results have been used to demonstrate the performance of the two-phase with and without coupled inductor interleaved QR ZCS SC converters for bidirectional power flow control application, and an extending structure for N-phase is mentioned.

Direct on Line Starting Induction Motor with Thyristor Switched Capacitor Based Voltage Regulation

The purpose of this paper is to show a laboratory scale implementation of a Thyristor Switched Capacitors （TSC） as an alternative for voltage regulation during a direct on line three-phase induction motor starting on an emulated weak transmission line. Thyristor switched capacitor bank was chosen because it is a well known topology, considering the very nature of the direct starting induction motors, which represents a highly inductive load, the use of switched reactors becomes unnecessary. Such fact minimizes the introduction of harmonics components, and also reduces the cost of the implementation. The binary disposition of the banks allows a variable Var compensation with sixteen steps, in this case. The solution makes use of low cost devices combined with sliding window voltage and current measurement algorithm and a PI control with dead band control for achieve the shown experimental results, where the system is able to manage a typically 20% voltage drop, reducing it to less than 4%. The schematic of the developed circuit, the control technique and a quite simple method to calculate the binary weight capacitors banks are also presented.

Genetic Algorithm Based 7-Level Step-Up Inverter with Reduced Harmonics and Switching Devices

This paper presents a unique voltage-raising topology for a single-phase seven-level inverter with triple output voltage gain using single input source and two switched capacitors.The output voltage has been boosted up to three times the value of input voltage by configuring the switched capacitors in series and parallel combinations which eliminates the use of additional step-up converters and transformers.The selective harmonic elimination(SHE)approach is used to remove the lower-order harmonics.The optimal switching angles for SHE is determined using the genetic algorithm.These switching angles are com-bined with a level-shifted pulse width modulation(PWM)technique for pulse generation,resulting in reduced total harmonic distortion(THD).A detailed com-parison has been made against other relevant seven-level inverter topologies in terms of the number of switches,drivers,diodes,capacitors,and boosting facil-ities to emphasize the benefits of the proposed model.The proposed topology is simulated using MATLAB/SIMULINK and an experimental prototype has been developed to validate the results.The Digital Signal Processing(DSP)TMS320F2812 board is used to generate the switching pulses for the proposed technique and the experimental results concur with the simulated model outputs.

A High-Performance Operational Amplifier for High-Speed High-Accuracy Switch-Capacitor Cells

A high-speed high-accuracy fully differenttial operational amplifier （op-amp） is realized based on no-Miller-capacitor feedforward （NMCF） compensation scheme. In order to achieve a good phase margin, the NMCF compensation scheme uses the positive phase shift of left-half-plane （LHP） zero caused by the feedforvvard path to counteract the negative phase shift of the non-dominant pole. Compared to traditional Miller compensation method, the op-amp obtains high gain and wide band synchronously without the pole-splitting effect while saves significant chip area due to the absence of the Miller capacitor. Simulated by the 0.35 μm CMOS RF technology, the result shows that the open-loop gain of the op-amp is 118 dB with the unity gain-bandwidth （UGBW） of 1 GHz, and the phase margin is 61°while the settling time is 5.8 ns when achieving 0.01% accuracy. The op-amp is especially suitable for the front-end sample/hold （S/H） cell and the multiplying D/A converter （MDAC） module of the high-speed high-resolution pipelined A/D converters （AVCs）.

面向数据中心48 V供电系统的混合型母线变换器及其高密度集成

该文提出适用于数据中心48 V供电系统的混合型母线变换器电路拓扑及其高密度集成方法,通过在开关电容变换器中嵌入自耦变压器和LLC谐振变换器,大幅增加开关电容变换器的降压比,且利用矩阵式变压器结构实现变换器输出电流能力的大幅提升。基于所提出的混合型母线变换器,进一步提出其高密度集成方法,综合采用磁集成、绕组集成等方式,实现变换器功率密度和效率的提升。研制40~60 V输入、变比8:1、输出电流100 A、开关频率1 MHz的八分之一砖模块,功率密度达到1.704 kW/in3,最高效率达到97.9%。

分体分步式换流变有载分接开关研制

特高压直流换流变压器有载分接开关长期承载满负荷运行的方波电流,切换电流di/dt大,熄弧困难,并且动作频繁,基本被国外企业垄断。文中首先针对特高压换流变传统有载分接开关无任何直接有效的电气量监测保护的“黑盒”难题,以及故障极易引起换流变本体损坏,影响特高压直流工程可用率问题,提出了一种分体分步式有载分接开关拓扑,实现换流变有载分接开关核心部件分体布置以及分步闭环控制保护,并分析梳理了工程应用的电气应力;然后进行了切换开关、分接选择器和控制保护装置等关键核心部件的研制;最后搭建基于LC谐振法的切换试验系统,对所研制的分体分步式有载分接开关进行了切换试验、容量试验、温升试验以及绝缘试验。试验结果表明:所研制的分体分步式有载分接开关额定级电压4 kV,最大通过电流1600 A,切换开关外置,无油化设计,内部集成电气测量系统,切换过程能够实现分步操作控制和保护,避免故障扩大化,满足±800 kV/5000 A特高压直流输电换流变压器的工程应用需求。

基于二次型升压变换器和开关电容的混合式升压方案研究

提出一种混合式高升压比DC-DC变换器。该变换器由二次型升压变换器、开关电容和耦合电感单元集成。为了减少元件的数量,耦合电感一次侧与二次型升压变换器共用;二次型升压变换器的输出电容一分为二,并与开关电容共用。由于电源和负载之间的共地特性,则输入电流连续。对所提变换器的电压增益进行了推导,并分析其电压应力。结果表明所提逆变器具备高电压增益、低电压应力的特性。最后,搭建了80 W的实验样机,实验结果验证了所提变换器的正确性和有效性。

一种应用于光伏的高增益DC/DC变换器研究

基于耦合电感、开关电容与输入电压源组成的基本功率单元,提出一种集成式新型DC/DC变换器。该拓扑结构具有模块化和可扩展性,耦合电感和开关电容结构组成的倍压单元提升了电路的升压比。漏感能量通过钳位电路回收,以降低开关管电压应力和功率损耗;同时缓解了二极管的反向恢复问题,优化了开关管和二极管的选择。详细介绍了稳态分析、工作原理和设计考虑;最后并制作了90 W实验样机,验证了理论分析的正确性。