Using three-dimensional technology computer-aided design （TCAD） simulation, parasitic bipolar amplification in a single event transient （SET） current of a single transistor and its temperature dependence are studi...Using three-dimensional technology computer-aided design （TCAD） simulation, parasitic bipolar amplification in a single event transient （SET） current of a single transistor and its temperature dependence are studied. We quantify the contributions of different current components in a SET current pulse, and it is found that the proportion of parasitic bipolar amplification in total collected charge is about 30% in both ]30-nm and 90-nm technologies. The temperature dependence of parasitic bipolar amplification and the mechanism of the SET pulse are also investigated and quantified. The results show that the proportion of charge induced by parasitic bipolar increases with rising temperature, which illustrates that the parasitic bipolar amplification plays an important role in the charge collection of a single transistor.展开更多
In this paper, a new method is proposed to study the mechanism of charge collection in single event transient （SET） production in 90 nm bulk complementary metal oxide semiconductor （CMOS） technology. We find that ...In this paper, a new method is proposed to study the mechanism of charge collection in single event transient （SET） production in 90 nm bulk complementary metal oxide semiconductor （CMOS） technology. We find that different from the case in the pMOSFET, the parasitic bipolar amplification effect （bipolar effect） in the balanced inverter does not exist in the nMOSFET after the ion striking. The influence of the suhstrate process on the bipolar effect is also studied in the pMOSFET. We find that the bipolar effect can be effectively mitigated by a buried deep P＋-well layer and can be removed by a buried SO2 layer.展开更多
The contribution of parasitic bipolar amplification to SETs is experimentally verified using two P-hit target chains in the normal layout and in the special layout. For PMOSs in the normal layout, the single-event cha...The contribution of parasitic bipolar amplification to SETs is experimentally verified using two P-hit target chains in the normal layout and in the special layout. For PMOSs in the normal layout, the single-event charge collection is composed of diffusion, drift, and the parasitic bipolar effect, while for PMOSs in the special layout, the parasitic bipolar junction transistor cannot turn on. Heavy ion experimental results show that PMOSs without parasitic bipolar amplification have a 21.4% decrease in the average SET pulse width and roughly a 40.2% reduction in the SET cross-section.展开更多
建立了单粒子多位翻转的测试方法和数据处理方法,在此基础上开展了体硅90nm SRAM重离子单粒子多位翻转的实验研究。通过分析单粒子多位翻转百分比、均值、尺寸等参数随线性能量转移(linear energy transfer,LET)的变化关系,表明了纳米...建立了单粒子多位翻转的测试方法和数据处理方法,在此基础上开展了体硅90nm SRAM重离子单粒子多位翻转的实验研究。通过分析单粒子多位翻转百分比、均值、尺寸等参数随线性能量转移(linear energy transfer,LET)的变化关系,表明了纳米尺度下器件单粒子多位翻转的严重性,指出了单粒子多位翻转对现有重离子单粒子效应实验方法和预估方法带来的影响。构建了包含多个存储单元的全三维器件模型,数值模拟研究了不同阱接触布放位置对单粒子多位翻转电荷收集的影响机制,表明阱电势扰动触发多单元双极放大机制是导致单粒子多位翻转的主要因素,减小阱接触与存储单元之间的距离是降低单粒子多位翻转的有效方法。展开更多
A comparison of the temperature dependence of the P-hit single event transient （SET） in a two-transistor （2T） inverter with that in a three-transistor （3T） inverter is carried out based on a three-dimensional nu...A comparison of the temperature dependence of the P-hit single event transient （SET） in a two-transistor （2T） inverter with that in a three-transistor （3T） inverter is carried out based on a three-dimensional numerical simulation. Due to the significantly distinct mechanisms of the single event change collection in the 2T and the 3T inverters, the temperature plays different roles in the SET production and propagation. The SET pulse will be significantly broadened in the 2T inverter chain while will be compressed in the 3T inverter chain as temperature increases. The investigation provides a new insight into the SET mitigation under the extreme environment, where both the high temperature and the single event effects should be considered. The 3T inverter layout structure （or similar layout structures） will be a better solution for spaceborne integrated circuit design for extreme environments.展开更多
基金Project supported by the National Natural Science Foundation of China (Grant Nos. 60836004, 61076025, and 61006070)the Specialized Research Fund for the Doctoral Program of Higher Education of China (Grant No. 20104307120006)
文摘Using three-dimensional technology computer-aided design （TCAD） simulation, parasitic bipolar amplification in a single event transient （SET） current of a single transistor and its temperature dependence are studied. We quantify the contributions of different current components in a SET current pulse, and it is found that the proportion of parasitic bipolar amplification in total collected charge is about 30% in both ]30-nm and 90-nm technologies. The temperature dependence of parasitic bipolar amplification and the mechanism of the SET pulse are also investigated and quantified. The results show that the proportion of charge induced by parasitic bipolar increases with rising temperature, which illustrates that the parasitic bipolar amplification plays an important role in the charge collection of a single transistor.
基金Project supported by the Key Program of the National Natural Science Foundation of China(Grant No.60836004)the National Natural Science Foundation of China(Grant Nos.61006070 and 61076025)
文摘In this paper, a new method is proposed to study the mechanism of charge collection in single event transient （SET） production in 90 nm bulk complementary metal oxide semiconductor （CMOS） technology. We find that different from the case in the pMOSFET, the parasitic bipolar amplification effect （bipolar effect） in the balanced inverter does not exist in the nMOSFET after the ion striking. The influence of the suhstrate process on the bipolar effect is also studied in the pMOSFET. We find that the bipolar effect can be effectively mitigated by a buried deep P＋-well layer and can be removed by a buried SO2 layer.
基金supported by the National Natural Science Foundation of China(Grant No.61376109)
文摘The contribution of parasitic bipolar amplification to SETs is experimentally verified using two P-hit target chains in the normal layout and in the special layout. For PMOSs in the normal layout, the single-event charge collection is composed of diffusion, drift, and the parasitic bipolar effect, while for PMOSs in the special layout, the parasitic bipolar junction transistor cannot turn on. Heavy ion experimental results show that PMOSs without parasitic bipolar amplification have a 21.4% decrease in the average SET pulse width and roughly a 40.2% reduction in the SET cross-section.
文摘建立了单粒子多位翻转的测试方法和数据处理方法,在此基础上开展了体硅90nm SRAM重离子单粒子多位翻转的实验研究。通过分析单粒子多位翻转百分比、均值、尺寸等参数随线性能量转移(linear energy transfer,LET)的变化关系,表明了纳米尺度下器件单粒子多位翻转的严重性,指出了单粒子多位翻转对现有重离子单粒子效应实验方法和预估方法带来的影响。构建了包含多个存储单元的全三维器件模型,数值模拟研究了不同阱接触布放位置对单粒子多位翻转电荷收集的影响机制,表明阱电势扰动触发多单元双极放大机制是导致单粒子多位翻转的主要因素,减小阱接触与存储单元之间的距离是降低单粒子多位翻转的有效方法。
基金Project supported by the Key Program of the National Natural Science Foundation of China(Grant No.60836004)
文摘A comparison of the temperature dependence of the P-hit single event transient （SET） in a two-transistor （2T） inverter with that in a three-transistor （3T） inverter is carried out based on a three-dimensional numerical simulation. Due to the significantly distinct mechanisms of the single event change collection in the 2T and the 3T inverters, the temperature plays different roles in the SET production and propagation. The SET pulse will be significantly broadened in the 2T inverter chain while will be compressed in the 3T inverter chain as temperature increases. The investigation provides a new insight into the SET mitigation under the extreme environment, where both the high temperature and the single event effects should be considered. The 3T inverter layout structure （or similar layout structures） will be a better solution for spaceborne integrated circuit design for extreme environments.
