The analysis and design of a semi-passive radio frequency identification（RFID） tag is presented.By studying the power transmission link of the backscatter RFID system and exploiting a power conversion efficiency mod...The analysis and design of a semi-passive radio frequency identification（RFID） tag is presented.By studying the power transmission link of the backscatter RFID system and exploiting a power conversion efficiency model for a multi-stage AC-DC charge pump,the calculation method for semi-passive tag＇s read range is proposed.According to different read range limitation factors,an intuitive way to define the specifications of tag＇s power budget and backscatter modulation index is given.A test chip is implemented in SMIC 0.18μm standard CMOS technology under the guidance of theoretical analysis.The main building blocks are the threshold compensated charge pump and low power wake-up circuit using the power triggering wake-up mode.The proposed semi-passive tag is fully compatible to EPC C1G2 standard.It has a compact chip size of 0.54 mm^2,and is adaptable to batteries with a 1.2 to 2.4 V output voltage.展开更多
A 2.4 GHz ultra-low-power RF transceiver with a 900 MHz auxiliary wake-up link for wireless body area networks（WBANs）in medical applications is presented.The RF transceiver with an asymmetric architecture is propose...A 2.4 GHz ultra-low-power RF transceiver with a 900 MHz auxiliary wake-up link for wireless body area networks（WBANs）in medical applications is presented.The RF transceiver with an asymmetric architecture is proposed to achieve high energy efficiency according to the asymmetric communication in WBANs.The transceiver consists of a main receiver（RX）with an ultra-low-power free-running ring oscillator and a high speed main transmitter（TX）with fast lock-in PLL.A passive wake-up receiver（WuRx）for wake-up function with a high power conversion efficiency（PCE）CMOS rectifier is designed to offer the sensor node the capability of work-on-demand with zero standby power.The chip is implemented in a 0.18μm CMOS process.Its core area is 1.6 mm^2. The main RX achieves a sensitivity of-55 dBm at a 100 kbps OOK data rate while consuming just 210μA current from the 1 V power supply.The main TX achieves ＋3 dBm output power with a 4 Mbps/500 kbps/200 kbps data rate for OOK/4 FSK/2 FSK modulation and dissipates 3.25 mA/6.5 mA/6.5 mA current from a 1.8 V power supply. The minimum detectable RF input energy for the wake-up RX is-15 dBm and the PCE is more than 25%.展开更多
基金Project supported by the Ministry of Science & Technology of China(No.2008BAI55B07)the State Key Laboratory of ASIC and System,Fudan University,China(No.09MS009).
文摘The analysis and design of a semi-passive radio frequency identification（RFID） tag is presented.By studying the power transmission link of the backscatter RFID system and exploiting a power conversion efficiency model for a multi-stage AC-DC charge pump,the calculation method for semi-passive tag＇s read range is proposed.According to different read range limitation factors,an intuitive way to define the specifications of tag＇s power budget and backscatter modulation index is given.A test chip is implemented in SMIC 0.18μm standard CMOS technology under the guidance of theoretical analysis.The main building blocks are the threshold compensated charge pump and low power wake-up circuit using the power triggering wake-up mode.The proposed semi-passive tag is fully compatible to EPC C1G2 standard.It has a compact chip size of 0.54 mm^2,and is adaptable to batteries with a 1.2 to 2.4 V output voltage.
基金Project supported by the National High-Tech Research and Development Program of China(Nos2008AA010703,2009AA011606)the National Natural Science Foundation of China(No60976023)
文摘A 2.4 GHz ultra-low-power RF transceiver with a 900 MHz auxiliary wake-up link for wireless body area networks（WBANs）in medical applications is presented.The RF transceiver with an asymmetric architecture is proposed to achieve high energy efficiency according to the asymmetric communication in WBANs.The transceiver consists of a main receiver（RX）with an ultra-low-power free-running ring oscillator and a high speed main transmitter（TX）with fast lock-in PLL.A passive wake-up receiver（WuRx）for wake-up function with a high power conversion efficiency（PCE）CMOS rectifier is designed to offer the sensor node the capability of work-on-demand with zero standby power.The chip is implemented in a 0.18μm CMOS process.Its core area is 1.6 mm^2. The main RX achieves a sensitivity of-55 dBm at a 100 kbps OOK data rate while consuming just 210μA current from the 1 V power supply.The main TX achieves ＋3 dBm output power with a 4 Mbps/500 kbps/200 kbps data rate for OOK/4 FSK/2 FSK modulation and dissipates 3.25 mA/6.5 mA/6.5 mA current from a 1.8 V power supply. The minimum detectable RF input energy for the wake-up RX is-15 dBm and the PCE is more than 25%.
