PHASE AND FREQUENCY LOCKING OF MICROWAVE AND MILLIMETER WAVE POWER COMBINING

The phase and frequency locking of microwave, millimeter wave power combining were analysed and summarized in an all-round way. The master/slave phase locking of cavity oscillators, the peer phase locking of mutually coupled oscillators, and the peer phase locking of ring-connected multiple oscillators were investigated. The results of numerical calculations, and the relations of phase to phase locking model and oscillator parameters were given. And the cavity and space power combining aspects for microwave and millimeter wave were presented.

A novel high precision Doppler frequency estimation method based on the third-order phase-locked loop

In deep space exploration,many engineering and scientific requirements require the accuracy of the measured Doppler frequency to be as high as possible.In our paper,we analyze the possible frequency measurement points of the third-order phase-locked loop(PLL)and find a new Doppler measurement strategy.Based on this finding,a Doppler frequency measurement algorithm with significantly higher measurement accuracy is obtained.In the actual data processing,compared with the existing engineering software,the accuracy of frequency of 1 second integration is about 5.5 times higher when using the new algorithm.The improved algorithm is simple and easy to implement.This improvement can be easily combined with other improvement methods of PLL,so that the performance of PLL can be further improved.

Relative phase locking of a terahertz laser system configured with a frequency comb and a single-mode laser

Stable operation is one of the most important requirements for a laser source for high-precision applications.Many efforts have been made to improve the stability of lasers by employing various techniques,e.g.,electrical and/or optical injection and phase locking.However,these techniques normally involve complex experimental facilities.Therefore,an easy implementation of the stability evaluation of a laser is still challenging,especially for lasers emitting in the terahertz(THz)frequency range because the broadband photodetectors and mature locking techniques are limited.In this work,we propose a simple method,i.e.,relative phase locking,to quickly evaluate the stability of THz lasers without a need of a THz local oscillator.The THz laser system consists of a THz quantum cascade laser(QCL)frequency comb and a single-mode QCL.Using the single-mode laser as a fast detector,heterodyne signals resulting from the beating between the singlemode laser and the comb laser are obtained.One of the heterodyne beating signals is selected and sent to a phase-locked loop(PLL)for implementing the relative phase locking.Two kinds of locks are performed by feeding the output error signal of the PLL,either to the comb laser or to the single-mode laser.By analyzing the current change and the corresponding frequency change of the PLL-controlled QCL in each phase-locking condition,we,in principle,are able to experimentally compare the stability of the emission frequency of the single-mode QCL(f s)and the carrier envelope offset frequency(f CEO)of the QCL comb.The experimental results reveal that the QCL comb with the repetition frequency injection locked demonstrates much higher stability than the single-mode laser.The work provides a simple heterodyne scheme for understanding the stability of THz lasers,which paves the way for the further locking of the lasers and their high-precision applications in the THz frequency range.

A 330-W single-frequency retrievable multi-tone monolithic fiber amplifier

A single-frequency retrievable phase modulated multi-tone fiber amplifier is presented in theory and demonstrated in experiment. A multi-tone seed laser generated by a sine wave phase modulated single-frequency laser is employed for stimulated Brillouin scattering suppression in an all-fiber amplifier. A demodulation signal which is π phase shifted with respect to the modulation signal is used to retrieve the single-frequency laser from the multi-tone laser. In experiment, we first optimize the all-fiber master-oscillator power-amplifier. With this amplifier, we demonstrate a single-frequency retrievable multi-tone laser with 330-W output when driven by the multi-tone seed, while the ultimate output power is only 130 W when driven by the single-frequency laser. Then, we carry out an experiment for retrieving the single-frequency laser from the amplified multi-tone laser. Results indicate that the single-frequency laser can be retrieved with a sideband suppression of more than 20 dB. Retrieving an even higher power single-frequency laser is possible if a high power demodulator is available.

A Low Phase Noise Ring-VCO Based PLL Using Injection Locking for ZigBee Applications

A low power low phase noise frequency synthesizer with subharmonic injection locking is proposed for ZigBee applications. The PLL is based on a ring VCO to decrease area and production cost. In order to improve phase noise performance, a high frequency injection signal of which frequency varies with channel number is used. The circuit is designed in TSMC 0.18 μm CMOS technology and simulated in ADS (Advanced Design System). The phase noise at 3.5 and 10 MHz offsets is -116 and -118 dBc/Hz, respectively, and total circuit consumes 2.2 mA current.

PHASE-LOCKING OF HIGH POWER GYROTRON OSCILLATOR

The phase-locking process is studied for high-power gyrotron oscillator driven by an external signal. The phase-locking nonlinear differential equations are derived, and the condition of phase-locking is shown and analyzed. The phase-locking signal can be introduced after gyrotron oscillates into saturation or before it. Two different ways of inputting signal make markable influence on the phase-locking process, this phenomenon is discussed. In this paper, the numerical calculations and analysis are given for gyrotron TE13 mode.

Multi-Order Intermittent Chaotic Synchronization of Closed Phase Locked Loop

For the model of a Closed Phase Locked Loop (CPLL) communication System consists of both the transmission and receiver ends. This model is considered to be in a multi-order intermittent chaotic state. The chaotic signals are then synchronized along side with our system. This chaotic synchronization will be demonstrated and furthermore, a modulation will be formed to examine the system if it will perfectly reconstruct or not. Finally we will demonstrate the synchronization conditions of the system.

A 2.4GHz Quadrature Output Frequency Synthesizer

A design and implementation for a 2.4GHz quadrature output frequency synthesizer intended for bluetooth in 0. 35μm CMOS technology are presented. A differentially controlled quadrature voltage-controlled oscillator （QVCO） is employed to generate quadrature （I/Q） signals. A second-order loop filter, with a unit gain transconductance amplifier having the performance of a third-order loop filter,is exploited for low cost. The measured spot phase noise is -106.15dBc/Hz@ 1MHz. Close-in phase noise is less than -70dBc/Hz. The synthesizer consumes 13.5mA under a 3.3V voltage supply. The core size is 1.3mm×0. 8mm.

A Σ-Δ Fractional-N PLL Frequency Synthesizer with AFC for SRD Applications

A fractional-N frequency synthesizer for 433/868MHz SRD applications is implemented in a 0.3μm CMOS process. A wide-band VCO and an AFC are used to cover the desired bands. A 3bit third order sigma-delta modulator is adopted to reduce the out-band phase noise. The measurements show a VCO tuning range from 1.31 to 1.88GHz with AFC working correctly,an out-band phase noise of -139dBc/Hz at 3MHz offset frequency, and a fractional spur of less than - 60dBc. The chip area is 1.5mm × 1.2mm and the total current dissipation including LO buffers is 19mA from a single 3.0V supply voltage.

基于三频观测的Multi_GNSS载波相位特性分析

载波相位观测噪声和多径误差是衡量载波相位观测数据质量的重要指标。采用三频消电离层无几何组合对GPS、BDS和Galileo系统的载波相位观测噪声和多径误差进行计算。选取IGS ARHT和MGO2两测站2021年连续30 d的数据,对上述GNSS系统的载波相位观测噪声和多径误差特性进行了分析,采用高阶谐函数对GPS Block IIF卫星的频间钟偏差进行模型化以降低其对DIF的影响,结论显示,各系统的DIF组合均方根值随着仰角的增大逐渐减小,在高仰角区间内比低仰角区间下降约90%;受残余IFCB的影响,GPS系统的DIF组合均方根值最大,约为BDS-2系统的3—7倍,约为BDS-3和GAL系统的20倍。

Joint frequency offset tracking and PAPR reduction algorithm in OFDM systems

This paper presents an algorithm that aims to reduce the peak-to-average power ratio（PAPR） of orthogonal frequency division multiplexing（OFDM） communication systems while maintaining frequency tracking.The algorithm achieves PAPR reduction by applying the complex conjugates of the data symbol obtained from the frequency domain to cancel the phase of the data symbol.A likelihood estimator is used to obtain the sub-carrier phase error due to the residual carrier frequency offset（RCFO） using the same complex conjugates as a pilot signal.Furthermore,a joint time and frequency domain multicarrier phase locked loop（MPLL） is developed to compensate additional frequency offset.Simulation results show that this algorithm is capable of reducing PAPR without impacting the frequency tracking performance.

Precise determination of characteristic laser frequencies by an Er-doped fiber optical frequency comb

Femtosecond optical frequency combs correlate the microwave and optical frequencies accurately and coherently.Therefore,any optical frequency in visible to near-infrared region can be directly traced to a microwave frequency.As a result,the length unit“meter”is directly related to the time unit“second”.This paper validates the capability of the national wavelength standards based on a home-made Er-doped fiber femtosecond optical frequency comb to measure the laser frequencies ranging from visible to near-infrared region.Optical frequency conversion in the femtosecond optical frequency comb is achieved by combining spectral broadening in a highly nonlinear fiber with a single-point frequencydoubling scheme.The signal-to-noise ratio of the beat notes between the femtosecond optical frequency comb and the lasers at 633,698,729,780,1064,and 1542 nm is better than 30 d B.The frequency instability of the above lasers is evaluated by using a hydrogen clock signal with a instability of better than 1×10^(-13)at 1-s averaging time.The measurement is further validated by measuring the absolute optical frequency of an iodine-stabilized 532-nm laser and an acetylenestabilized 1542-nm laser.The results are within the uncertainty range of the international recommended values.Our results demonstrate the accurate optical frequency measurement of lasers at different frequencies using the femtosecond optical frequency comb,which is not only important for the precise and accurate traceability and calibration of the laser frequencies,but also provides technical support for establishing the national wavelength standards based on the femtosecond optical frequency comb.

2.7-4.0 GHz PLL with dual-mode auto frequency calibration for navigation system on chip

A 2.7-4.0 GHz dual-mode auto frequency calibration(AFC) fast locking PLL was designed for navigation system on chip(SoC). The SoC was composed of one radio frequency(RF) receiver, one baseband and several system control parts. In the proposed AFC block, both analog and digital modes were designed to complete the AFC process. In analog mode, the analog part sampled and detected the charge pump output tuning voltage, which would give the indicator to digital part to adjust the voltage control oscillator(VCO) capacitor bank. In digital mode, the digital part counted the phase lock loop(PLL) divided clock to judge whether VCO frequency was fast or slow. The analog and digital modes completed the auto frequency calibration function independently by internal switch. By designing a special switching algorithm, the switch of the digital and analog mode could be realized anytime during the lock and unlock detecting process for faster and more stable locking. This chip is fabricated in 0.13 μm RF complementary metal oxide semiconductor(CMOS) process, and the VCO supports the frequency range from 2.7 to 4.0 GHz. Tested 3.96 GHz frequency phase noise is -90 d Bc/Hz@100 k Hz frequency offset and -120 d Bc/Hz@1 MHz frequency offset. By using the analog mode in lock detection and digital mode in unlock detection, tested AFC time is less than 9 μs and the total PLL lock time is less than 19 μs. The SoC acquisition and tracking sensitivity are about-142 d Bm and-155 d Bm, respectively. The area of the proposed PLL is 0.35 mm^2 and the total SoC area is about 9.6 mm^2.

A 1-GHz Charge Pump PLL Frequency Synthesizer for IEEE 1394b PHY

The design procedure of an 1-GHz phase-locked loop （PLL）-based frequency synthesizer used in IEEE 1394b physical （PHY） system is presented in this paper. The PLL＇s loop dynamics are analyzed in depth and theoretical relationships between all loop parameters are clearly described. All the parameters are derived and verified by Verilog-A model, which ensures the accuracy and efficiency of the circuit design and simulation. A 4-stage ring oscillator is employed to generate 1-GHz oscillation frequency and is divided into low frequency clocks by a feedback divider. The architecture is a third-order, type-2 charge pump PLL. The simulated settling time is less than 4μs. The RMS value of period jitter of the PLL＇s output is 2.1 ps. The PLL core occupies an area of 0.12 mm2, one fourth of which is occupied by the MiM loop capacitors. The total current consumption of the chip is 16.5 mA. The chip has been sent for fabrication in 0.13 μm complementary metal oxide semiconductor （CMOS） technology.

Applications of Localized Phase Compensation Method to Design a Stabilizer in a Multi-machine Power System

为了演示和验证稳定器设计的就地相位补偿法在多机电力系统中的应用,介绍在多机电力系统中,就地补偿设计稳定器的2个应用实例。第1个实例是在多机电力系统中就地补偿设计电力系统稳定器（power system stabilizer,PSS）,阻尼电力系统局部模振荡。第2个实例是就地补偿设计附加在静态同步补偿器（static synchronous compensator,STATCOM）上的稳定器,抑制多机电力系统中的区域模振荡,并给出在一个16机电力系统中的应用计算和仿真结果。

TDTL Based Frequency Synthesizers with Auto Sensing Technique

This paper presents a frequency synthesizer architecture based on the time delay digital tanlock loop (TDTL). The loop is of the first order type. The synthesizer architecture includes an adaptation mechanism to keep the complete system in lock. The mechanism uses a frequency sensing structure to control critical TDTL parameters responsible for locking. Both integer and fractional multiples of the loop reference frequency are synthesized by the new architecture. The ability of the TDTL based frequency synthesizer to respond to sudden variations in the system input frequency is studied. The results obtained indicate the proposed synthesizer has a robust performance and is capable of responding to those changes provided that they are within the bounds of its locking region.

COMPARISON OF SIGMA-DELTA MODULATOR FOR FRACTIONAL-N PLL FREQUENCY SYNTHESIZER

This paper investigates the design of digital Sigma-Delta Modulator (SDM) for fractional-N frequency synthesizer. Characteristics of SDMs are compared through theory analysis and simulation. The curve of maximum-loop-bandwidth vs. maximum-phase-noise is suggested to be a new criterion to the performance of SDM,which greatly helps designers to select an appropriate SDM structure to meet their real application requirements and to reduce the cost as low as possible. A low-spur 3-order Mul-tistage Noise Shaping (MASH)-1-1-1 SDM using three 2-bit first-order cascaded modulators is proposed,which balances the requirements of tone-free and maximum operation frequency.

Pump-induced carrier envelope offset frequency dynamics and stabilization of an Yb-doped fiber frequency comb

In this paper, we demonstrate a carrier envelope phase-stabilized Yb-doped fiber frequency comb seeding by a nonlinear-polarization-evolution（NPE） mode-locked laser at a repetition rate of 60 MHz with a pulse duration of 191 fs.The pump-induced carrier envelope offset frequency（ f0） nonlinear tuning is discussed and further explained by the spectrum shift of the laser pulse. Through the environmental noise suppression, the drift of the free-running f0 is reduced down to less than 3 MHz within an hour. By feedback control on the pump power with a self-made phase-lock loop（PLL）electronics the carrier envelope offset frequency is well phase-locked with a frequency jitter of 85 m Hz within an hour.

一种低复杂度的Multi-h CPM相干解调算法及FPGA实现

多调制指数连续相位调制(Multi-h Continuous Phase Modulation,Multi-h CPM)是一种恒包络调制,具有多个周期出现的调制指数,因此其频谱效率和功率效率比单调制指数CPM更高,但其接收机的复杂度也随之增加。本文在倾斜相位(Tilted Phase,TP)的基础上采用频率脉冲截断(Frequency Pulse Truncation,FPT)和状态空间分割(State Space Partition,SSP)相结合的方法来降低多调制指数连续相位调制的复杂度,使相位状态由512降低到16,理论损耗约为0.8 dB。同时,对降低复杂度的解调算法在现场可编程门阵列(Field Programmable Gate Arrays,FPGA)上进行了验证。仿真和在线测试的误码率曲线接近理论分析曲线,和常用的128状态解调算法相比,资源消耗降低了约59%。

基于自适应增强型复系数滤波器的多电飞机变频电网状态估计

多电飞机的电网是一种典型的孤岛微网,具有360~800 Hz的宽频率工作范围,传统恒定频率电网同步方法的动态性能在飞机变频电网中有所不足。为了准确估计飞机变频电网的电网状态,结合自适应模块,对增强型复系数滤波器锁相环进行改进,设计了一种适应于MEA变频电网的自适应增强型复系数滤波器锁相环结构(AECCF-PLL)。分析了其传递函数与阶跃响应之间的关系,推导了模型参数与频率的关系,建立了频率自适应模块,满足飞机变频交流电网状态估计对稳定性和快速性的要求。实验结果表明,在飞机变频电网含有大小频率跳变、谐波、斜坡等扰动情况时,提出的AECCF-PLL可以实现对电网状态的快速稳定估计。