Fast source mask co-optimization method for high-NA EUV lithography

Extreme ultraviolet(EUV)lithography with high numerical aperture(NA)is a future technology to manufacture the integrated circuit in sub-nanometer dimension.Meanwhile,source mask co-optimization(SMO)is an extensively used approach for advanced lithography process beyond 28 nm technology node.This work proposes a novel SMO method to improve the image fidelity of high-NA EUV lithography system.A fast high-NA EUV lithography imaging model is established first,which includes the effects of mask three-dimensional structure and anamorphic magnification.Then,this paper develops an efficient SMO method that combines the gradient-based mask optimization algorithm and the compressivesensing-based source optimization algorithm.A mask rule check(MRC)process is further proposed to simplify the optimized mask pattern.Results illustrate that the proposed SMO method can significantly reduce the lithography patterning error,and maintain high computational efficiency.

A hardware/software co-optimization approach for embedded software of MP3 decoder

In order to improve the efficiency of embedded software running on processor core, this paper proposes a hard-ware/software co-optimization approach for embedded software from the system point of view. The proposed stepwise methods aim at exploiting the structure and the resources of the processor as much as possible for software algorithm optimization. To achieve low memory usage and low frequency need for the same performance, this co-optimization approach was used to optimize embedded software of MP3 decoder based on a 16-bit fixed-point DSP core. After the optimization, the results of decoding 128 kbps, 44.1 kHz stereo MP3 on DSP evaluation platform need 45.9 MIPS and 20.4 kbytes memory space. The optimization rate achieves 65.6% for memory and 49.6% for frequency respectively compared with the results by compiler using floating-point computation. The experimental result indicates the availability of the hardware/software co-optimization approach depending on the algorithm and architecture.

Co-optimization approach to post-storm recovery for interdependent power and transportation systems

The power and transportation systems are urban interdependent critical infrastructures(CIs).During the post-disaster restoration process,transportation mobility and power restoration process are interdependent,and their functionalities significantly affect the well-beings of other urban CIs.Therefore,to enhance the resilience of urban CIs,successful recovery strategies should promote CI function cooperatively and synergistically to distribute goods and services efficiently.This paper develops an integrative framework that addresses the challenges of enhancing the recovery efficiency of urban power and transportation systems in short-term recovery period.Specifically,the post-storm recovery process is considered as a scheduling problem with the constraints representingcrew dispatch,equipment and fuel limit.We propose a new framework for co-optimizing the recovery scheduling of power and transportation systems,respecting precedency requirement and network constraints.The advantages and benefits of co-optimized recovery scheduling are validated in a testing system.

HW/SW Co-optimization for Stencil Computation：Beginning with a Customizable Core

Energy efficiency is one of the most important issues for High Performance Computing（HPC） today.Heterogeneous HPC platform with some energy-efficient customizable cores（as application-specific accelerators）is believed as one of the promising solutions to meet ever-increasing computing needs and to overcome power density limitations. In this paper, we focus on using customizable processor cores to optimize the typical stencil computations—— the kernel of many high-performance applications. We develop a series of effective software/hardware co-optimization strategies to exploit the instruction-level and memory-computation parallelism,as well as to decrease the energy consumption. These optimizations include loop tiling, prefetching, cache customization, Single Instruction Multiple Data（SIMD）, and Direct Memory Access（DMA）, as well as necessary ISA extensions. Detailed tests of power-efficiency are given to evaluate the effect of all these optimizations comprehensively. The results are impressive： the combination of these optimizations has improved the application performance by 341% while the energy consumption has been decreased by 35%; a preliminary comparison with X86, GPU, and FPGA platforms also showed that the design could achieve an order of magnitude higher performance efficiency. We believe this work can help understand sources of inefficiency in general-purpose chips and can be used as a beginning to customize an energy efficient CMP for further improvement.

DFM:“Design for Manufacturing”or“Design Friendly Manufacturing”

As the IC manufacturing enter sub 20nm tech nodes,DFM become more and more important to make sure more stable yield and lower cost.However,by introducing newly designed hardware(1980i etc.)process chemical(NTD)and Control Algorithm(Focus APC)into the mature tech nodes such as 14nm/12nm,more process window and less process variations are expected for latecomer wafer fabs(Tier-2/3 companies)who just started the competition with Tier-1 companies.With improved weapons,latecomer companies are able to review their DFM strategy one more time to see whether the benefit from hardware/process/control algorithm improvement can be shared with designers.In this paper,we use OPC simulation tools from different EDA suppliers to see the feasibility of transferring the benefits of hardware/process/control algorithm improvement to more relaxed design limitation through source mask optimization(SMO):1)Better hardware:scanner(better focus/exposure variation),CMP(intrafield topo),Mask CD variation(relaxed MEEF spec),etc.2) New process:from positive tone development to negative tone development.3)Better control schemes:holistic focus feedback,feedback/forward overlay control,high order CD uniformity improvement.Simulations show all those gains in hardware and process can be transferred into more relaxed design such as sub design rule structure process window include forbidden pitches(1D)and smaller E2E gaps(2D weak points).

The future is frozen:cryogenic CMOS for high-performance computing

Low temperature complementary metal oxide semiconductor(CMOS)or cryogenic CMOS is a promising avenue for the continuation of Moore’s law while serving the needs of high performance computing.With temperature as a control“knob”to steepen the subthreshold slope behavior of CMOS devices,the supply voltage of operation can be reduced with no impact on operating speed.With the optimal threshold voltage engineering,the device ON current can be further enhanced,translating to higher performance.In this article,the experimentally calibrated data was adopted to tune the threshold voltage and investigated the power performance area of cryogenic CMOS at device,circuit and system level.We also presented results from measurement and analysis of functional memory chips fabricated in 28 nm bulk CMOS and 22 nm fully depleted silicon on insulator(FDSOI)operating at cryogenic temperature.Finally,the challenges and opportunities in the further development and deployment of such systems were discussed.

Resilient outage recovery of a distribution system: co-optimizing mobile power sources with network structure

Outage recovery is important for reducing the economic cost and improving the reliability of a distribution system(DS)in extreme weather and with equipment faults.Previous studies have separately considered network reconfigu-ration(NR)and dispatching mobile power sources(MPS)to restore the outage load.However,NR cannot deal with the scenario of an electrical island,while dispatching MPS results in a long power outage.In this paper,a resilient outage recovery method based on co-optimizing MPS and NR is proposed,where the DS and traffic network(TN)are considered simultaneously.In the DS,the switch action cost and power losses are minimized,and the access points of MPSs are changed by carrying out the NR process.In the TN,an MPS dispatching model with the objective of mini-mizing power outage time,routing and power generation cost is developed to optimize the MPSs’schedule.A solu-tion algorithm based on iteration and relaxation methods is proposed to simplify the solving process and obtain the optimal recovery strategy.Finally,numerical case studies on the IEEE 33 and 119-bus systems validate the proposed resilient outage recovery method.It is shown that the access point of MPS can be changed by NR to decrease the power outage time and dispatching cost of MPS.The results also show that the system operation cost can be reduced by considering power losses in the objective function.

Boosting electromagnetic wave absorption of Ti_(3)AlC_(2) by improving effective electrical conductivity

Electromagnetic wave-absorbing(EMA)materials at high temperatures are limited by poor conduction loss(L_(c)).However,adding conductors simultaneously increases the conduction loss and interfacial polarization loss,leading to a conflict between impedance matching(Z_(in)/Z_(0))and electromagnetic wave loss.This will prevent electromagnetic waves from entering the EMA materials,finally reducing overall absorbing performance.Here,the effective electrical conductivity(σ)is enhanced by synchronizing particle size and grain number of Ti_(3)AlC_(2) to increase the conduction loss and avoid the conflict between the impedance matching and the electromagnetic wave loss.As a result,the best-absorbing performance with an effective absorption bandwidth(EAB)of 4.8 GHz(10.6–15.4 GHz)at a thickness of only 1.5 mm is realized,which is the best combination of wide absorption bandwidth and small thickness,and the minimum reflection loss(RL_(min))reaches−45.6 dB at 4.1 GHz.In short,this work explores the regulating mechanism of the EMA materials of effective electrical conductivity by simulated calculations using the Vienna ab-initio Simulation Package(VASP)and COMSOL as well as a series of experiments,which provide new insight into a rational design of materials with anisotropic electrical conductivity.

Coordinated expansion co-planning of integrated gas and power systems

As a significant clean energy source, natural gas plays an important role in modern energy context. The growing utilization of natural gas brings uncertainties into the power system, which requires an integrated way to plan natural gas and power systems. In this paper, the co-planning process is formulated as a mixed integer nonlinear programming problem to address emerging challenges,such as system reliability evaluation, market time line mismatch, market uncertainties, demand response effect,etc. An innovative expansion co-planning(ECP) framework is established in this paper to find the best augmentation plan which comes with the minimum cost.Specifically, to cope with uncertainties in market share,decision analysis is introduced. Meanwhile, the energy conversion efficiency between gas and electricity in the coupled load center is considered in the ECP constraints.Comprehensive case studies are applied to validate the performance of proposed approach.