An Investigation on a Tin Fixed Abrasive Polishing Pad with Phyllotactic Pattern for Polishing Wafer

In order to improve the polishing ability of polishing pads, a kind of polishing pad with the tin fixed abrasive blocks, which are arranged based on the phyllotaxis theory of biology, was designed and fabricated by the use of electroplating technology, and also its polishing ability for JGS-2 wafer was investigated by polishing experiments. The research results show that the phyllotactic parameters of the polishing pad influence the arrangement density of the tin fixed abrasive blocks, the polishing pad with phyllotactic pattern is feasibly fabricated by the use of electroplating technology, and the good polishing result can be obtained by using the polishing pad with phyllotactic pattern to polish a wafer when the diameter D of the tin fixed abrasive block is between Φ1.3 mm and Φ1.4 mm, and the phyllotactic coefficient k between 1.0 and 1.1,respectively.

Scratching by pad asperities in copper electrochemical-mechanical polishing

Low dielectric constant materials/Cu interconnects integration technology provides the direction as well as the challenges in the fabrication of integrated circuits(IC) wafers during copper electrochemical-mechanical polishing(ECMP). These challenges arise primarily from the mechanical fragility of such dielectrics, in which the undesirable scratches are prone to produce. To mitigate this problem, a new model is proposed to predict the initiation of scratching based on the mechanical properties of passive layer and copper substrate. In order to deduce the ratio of the passive layer yield strength to the substrate yield strength and the layer thickness, the limit analysis solution of surface scratch under Berkovich indenter is used to analyze the nano-scratch experimental measurements. The modulus of the passive layer can be calculated by the nano-indentation test combined with the FEM simulation. It is found that the film modulus is about 30% of the substrate modulus. Various regimes of scratching are delineated by FEM modeling and the results are verified by experimental data.

Chemical mechanical planarization of Ge_2Sb_2Te_5 using IC1010 and Politex reg pads in acidic slurry

In the paper, chemical mechanical planarization （CMP） of Ge2 Sb2Te5 （GST） is investigated using IC 1010 and Politex reg pads in acidic slurry. For the CMP with blank wafer, it is found that the removal rate （RR） of GST increases with the increase of pressure for both pads, but the RR of GST polished using IC 1010 is far more than that of Politex reg. To check the surface defects, GST film is observed with an optical microscope （OM） and scanning electron microscope （SEM）. For the CMP with Politex reg, many spots are observed on the surface of the blank wafer with OM, but no obvious spots are observed with SEM. With regard to the patterned wafer, a few stains are observed on the GST cell, but many residues are found on other area with OM. However, from SEM results, a few residues are observed on the GST cell, more dielectric loss is revealed about the trench structure. For the CMP with IC1010, the surface of the polished blank wafer suffers serious scratches found with both OM and SEM, which may result from a low hardness of GST, compared with those of IC1010 and abrasives. With regard to the patterned wafer, it can achieve a clean surface and almost no scratches are observed with OM, which may result from the high-hardness SiO2 film on the surface, not from the soft GST film across the whole wafer. From the SEM results, a clean interface and no residues are observed on the GST surface, and less dielectric loss is revealed. Compared with Politex reg, the patterned wafer can achieve a good performance after CMP using IC1010.