动脉粥样硬化是心血管疾病重要的病理生理基础,延缓和防治动脉粥样硬化对于减少和降低心血管疾病的发病率及病死率具有重要意义。高密度脂蛋白(high density lipoprotein,HDL)通过参与介导胆固醇逆向转运(reverse cholesterol transport...动脉粥样硬化是心血管疾病重要的病理生理基础,延缓和防治动脉粥样硬化对于减少和降低心血管疾病的发病率及病死率具有重要意义。高密度脂蛋白(high density lipoprotein,HDL)通过参与介导胆固醇逆向转运(reverse cholesterol transport,RCT)在抗动脉粥样硬化的形成和进展中发挥了重要作用。Preβ-1高密度脂蛋白(prebeta-1 high density lipoprotein,Preβ-1HDL)作为HDL的一种亚类,是外周细胞移出胆固醇的最初接受体,直接参与了RCT的起始步骤,并在随后的胆固醇酯化及转运中起着重要作用。本文就Preβ-1HDL的结构、代谢及其与心血管疾病的关系作一简要综述。展开更多
We experimentally demonstrate a small-size and high-speed silicon optical switch based on the free carrier plasma dispersion in silicon. Using an embedded racetrack resonator with a quality factor of 7400, the optical...We experimentally demonstrate a small-size and high-speed silicon optical switch based on the free carrier plasma dispersion in silicon. Using an embedded racetrack resonator with a quality factor of 7400, the optical switch shows an extinction ratio exceeding 13 dB with a footprint of only 2.2 × 10-3 mm^2. Moreover, a novel pre-emphasis technique is introduced to improve the optical response performance and the rise and the fall times are reduced down to 0.24 ns and 0.42 ns respectively, which are 25% and 44% lower than those without the pre-emphasis.展开更多
This paper presents the implementation of a multi-rate SerDes transceiver for IEEE 1394b applications. Simple and effective pre-emphasis and equalizer circuits are used in the transmitter and receiver, respectively. A...This paper presents the implementation of a multi-rate SerDes transceiver for IEEE 1394b applications. Simple and effective pre-emphasis and equalizer circuits are used in the transmitter and receiver, respectively. A phase interpolator based clock and data recovery circuit with optimized linearity is also described. With an on-chip fully integrated phase locked loop, the transceiver works at data rates of 100 Mb/s, 400 Mb/s, and 800 Mb/s, supporting three different operating modes of S100b, S400b, and S800b for IEEE 1394b. The chip has been fabricated using 0.13 μm technology. The die area of transceiver is 2.9×1.6 mm2^ including bonding pads and the total power dissipation is 284 mW with 1.2 V core supply and 3.3 V input/output supply voltages.展开更多
A multi-standard compatible transmitter with pre-emphasis for high speed serial links is presented. Based on the comparison between voltage mode（VM） and current mode（CM） output driver architectures,a low power CM ...A multi-standard compatible transmitter with pre-emphasis for high speed serial links is presented. Based on the comparison between voltage mode（VM） and current mode（CM） output driver architectures,a low power CM output driver with reverse scaling and bias current filtering technique is proposed.A 2-tap pre-emphasis filter is used to reduce the intersymbol interference caused by the low-pass channel,and a high speed,low power combined serializer is implemented to convert 10 bit parallel data into a serial data stream.The whole transmitter is fabricated in 65 nm 1.2 V/2.5 V CMOS technology.It provides an eye height greater than 800 mV for data rates of both 2.5 Gb/s and 5 Gb/s.The output root mean square jitter of the transmitter at 5 Gb/s is only 9.94 ps without pre-emphasis.The transmitter consumes 41.2 mA at 5 Gb/s and occupies only 240×140μm^2.展开更多
文摘动脉粥样硬化是心血管疾病重要的病理生理基础,延缓和防治动脉粥样硬化对于减少和降低心血管疾病的发病率及病死率具有重要意义。高密度脂蛋白(high density lipoprotein,HDL)通过参与介导胆固醇逆向转运(reverse cholesterol transport,RCT)在抗动脉粥样硬化的形成和进展中发挥了重要作用。Preβ-1高密度脂蛋白(prebeta-1 high density lipoprotein,Preβ-1HDL)作为HDL的一种亚类,是外周细胞移出胆固醇的最初接受体,直接参与了RCT的起始步骤,并在随后的胆固醇酯化及转运中起着重要作用。本文就Preβ-1HDL的结构、代谢及其与心血管疾病的关系作一简要综述。
基金Project supported by the National Natural Science Foundation of China(Grant No.60877036)the National Basic Research Program of China(Grant No.2006CB302803)+1 种基金the State Key Laboratory of Advanced Optical Communication Systems and Networks,China(Grant No.2008SH02)the Knowledge Innovation Program of Institute of Semiconductors,Chinese Academy of Sciences(Grant No.ISCAS2008T10)
文摘We experimentally demonstrate a small-size and high-speed silicon optical switch based on the free carrier plasma dispersion in silicon. Using an embedded racetrack resonator with a quality factor of 7400, the optical switch shows an extinction ratio exceeding 13 dB with a footprint of only 2.2 × 10-3 mm^2. Moreover, a novel pre-emphasis technique is introduced to improve the optical response performance and the rise and the fall times are reduced down to 0.24 ns and 0.42 ns respectively, which are 25% and 44% lower than those without the pre-emphasis.
基金supported by the National Natural Science Foundation of China under Grant No. 61006027the New Century Excellent Talents Program under Grant No. NCET-10-0297
文摘This paper presents the implementation of a multi-rate SerDes transceiver for IEEE 1394b applications. Simple and effective pre-emphasis and equalizer circuits are used in the transmitter and receiver, respectively. A phase interpolator based clock and data recovery circuit with optimized linearity is also described. With an on-chip fully integrated phase locked loop, the transceiver works at data rates of 100 Mb/s, 400 Mb/s, and 800 Mb/s, supporting three different operating modes of S100b, S400b, and S800b for IEEE 1394b. The chip has been fabricated using 0.13 μm technology. The die area of transceiver is 2.9×1.6 mm2^ including bonding pads and the total power dissipation is 284 mW with 1.2 V core supply and 3.3 V input/output supply voltages.
基金Project supported by the National High Technology Research and Development Program of China(No.2011AA010403)the National Natural Science Foundation of China(No.60801045)
文摘A multi-standard compatible transmitter with pre-emphasis for high speed serial links is presented. Based on the comparison between voltage mode（VM） and current mode（CM） output driver architectures,a low power CM output driver with reverse scaling and bias current filtering technique is proposed.A 2-tap pre-emphasis filter is used to reduce the intersymbol interference caused by the low-pass channel,and a high speed,low power combined serializer is implemented to convert 10 bit parallel data into a serial data stream.The whole transmitter is fabricated in 65 nm 1.2 V/2.5 V CMOS technology.It provides an eye height greater than 800 mV for data rates of both 2.5 Gb/s and 5 Gb/s.The output root mean square jitter of the transmitter at 5 Gb/s is only 9.94 ps without pre-emphasis.The transmitter consumes 41.2 mA at 5 Gb/s and occupies only 240×140μm^2.
