Multi-level programmable photonic integrated circuits(PICs)and optical metasurfaces have gained widespread attention in many fields,such as neuromorphic photonics,opticalcommunications,and quantum information.In this ...Multi-level programmable photonic integrated circuits(PICs)and optical metasurfaces have gained widespread attention in many fields,such as neuromorphic photonics,opticalcommunications,and quantum information.In this paper,we propose pixelated programmable Si_(3)N_(4)PICs with record-high 20-level intermediate states at 785 nm wavelength.Such flexibility in phase or amplitude modulation is achieved by a programmable Sb_(2)S_(3)matrix,the footprint of whose elements can be as small as 1.2μm,limited only by the optical diffraction limit of anin-house developed pulsed laser writing system.We believe our work lays the foundation for laser-writing ultra-high-level(20 levels and even more)programmable photonic systems and metasurfaces based on phase change materials,which could catalyze diverse applications such as programmable neuromorphic photonics,biosensing,optical computing,photonic quantum computing,and reconfigurable metasurfaces.展开更多
In this work,a novel one-time-programmable memory unit based on a Schottky-type p-GaN diode is proposed.During the programming process,the junction switches from a high-resistance state to a low-resistance state throu...In this work,a novel one-time-programmable memory unit based on a Schottky-type p-GaN diode is proposed.During the programming process,the junction switches from a high-resistance state to a low-resistance state through Schottky junction breakdown,and the state is permanently preserved.The memory unit features a current ratio of more than 10^(3),a read voltage window of 6 V,a programming time of less than 10^(−4)s,a stability of more than 108 read cycles,and a lifetime of far more than 10 years.Besides,the fabrication of the device is fully compatible with commercial Si-based GaN process platforms,which is of great significance for the realization of low-cost read-only memory in all-GaN integration.展开更多
As the country continues to promote the development of intelligent manufacturing,all industries are carrying out enterprise automation upgrading,the Pearl River Delta Intelligent Manufacturing Conference held in March...As the country continues to promote the development of intelligent manufacturing,all industries are carrying out enterprise automation upgrading,the Pearl River Delta Intelligent Manufacturing Conference held in March 2024 provides a direction guide for each enterprise on how to integrate the intelligent manufacturing technology into each link and provide direction guidance for enterprises to create new models and new business formats.College teachers,in focusing on the teaching process,should closely match the enterprise and social needs and cultivate excellent students.As the core controller of automation control,the application of programmable controllers in teaching is particularly important.In practical classes,by setting progressive difficulty,project guidance,team collaboration,and other links,students can master the automation equipment design of programmable control in repeated practice.展开更多
Chip-scale programmable optical signal processors are often used to flexibly manipulate the optical signals for satisfying the demands in various applications,such as lidar,radar,and artificial intelligence.Silicon ph...Chip-scale programmable optical signal processors are often used to flexibly manipulate the optical signals for satisfying the demands in various applications,such as lidar,radar,and artificial intelligence.Silicon photonics has unique advantages of ultra-high integration density as well as CMOS compatibility,and thus makes it possible to develop large-scale programmable optical signal processors.The challenge is the high silicon waveguides propagation losses and the high calibration complexity for all tuning elements due to the random phase errors.In this paper,we propose and demonstrate a programmable silicon photonic processor for the first time by introducing low-loss multimode photonic waveguide spirals and low-random-phase-error Mach-Zehnder switches.The present chip-scale programmable silicon photonic processor comprises a 1×4 variable power splitter based on cascaded Mach-Zehnder couplers(MZCs),four Ge/Si photodetectors,four channels of thermally-tunable optical delaylines.Each channel consists of a continuously-tuning phase shifter based on a waveguide spiral with a micro-heater and a digitally-tuning delayline realized with cascaded waveguide-spiral delaylines and MZSs for 5.68 ps time-delay step.Particularly,these waveguide spirals used here are designed to be as wide as 2μm,enabling an ultralow propagation loss of 0.28 dB/cm.Meanwhile,these MZCs and MZSs are designed with 2-μm-wide arm waveguides,and thus the random phase errors in the MZC/MZS arms are negligible,in which case the calibration for these MZSs/MZCs becomes easy and furthermore the power consumption for compensating the phase errors can be reduced greatly.Finally,this programmable silicon photonic processor is demonstrated successfully to verify a number of distinctively different functionalities,including tunable time-delay,microwave photonic beamforming,arbitrary optical signal filtering,and arbitrary waveform generation.展开更多
This article presents an integrated current mode configurable analog block(CAB)system for field-programmable analog array(FPAA).The proposed architecture is based on the complementary metal-oxide semiconductor(CMOS)tr...This article presents an integrated current mode configurable analog block(CAB)system for field-programmable analog array(FPAA).The proposed architecture is based on the complementary metal-oxide semiconductor(CMOS)transistor level design where MOSFET transistors operating in the saturation region are adopted.The proposed CAB architecture is designed to implement six of thewidely used current mode operations in analog processing systems:addition,subtraction,integration,multiplication,division,and pass operation.The functionality of the proposed CAB is demonstrated through these six operations,where each operation is chosen based on the user’s selection in the CAB interface system.The architecture of the CAB system proposes an optimized way of designing and integrating only three functional cells with the interface circuitry to achieve the six operations.Furthermore,optimized programming and digital tuning circuitry are implemented in the architecture to control and interface with the functional cells.Moreover,these designed programming and tuning circuitries play an essential role in optimizing the performance of the proposed design.Simulation of the proposed CMOS Transistor Based CAB system is carried out using Tanner EDA Tools in 0.35μm standard CMOS technology.The design uses a±1.5 V power supply and results in maximum 3 dB bandwidth of 34.9 MHz and an approximate size of 0.0537 mm2.This demonstrates the advantages of the design over the current state-of-the-art designs presented for comparison in this article.Consequently,the proposed design has a clear aspect of simplicity,low power consumption,and high bandwidth operation,which makes it a suitable candidate for mobile telecommunications applications.展开更多
Cyberattacks targeting industrial control systems(ICS)are becoming more sophisticated and advanced than in the past.A programmable logic controller(PLC),a core component of ICS,controls and monitors sensors and actuat...Cyberattacks targeting industrial control systems(ICS)are becoming more sophisticated and advanced than in the past.A programmable logic controller(PLC),a core component of ICS,controls and monitors sensors and actuators in the field.However,PLC has memory attack threats such as program injection and manipulation,which has long been a major target for attackers,and it is important to detect these attacks for ICS security.To detect PLC memory attacks,a security system is required to acquire and monitor PLC memory directly.In addition,the performance impact of the security system on the PLC makes it difficult to apply to the ICS.To address these challenges,this paper proposes a system to detect PLC memory attacks by continuously acquiring and monitoring PLC memory.The proposed system detects PLC memory attacks by acquiring the program blocks and block information directly from the same layer as the PLC and then comparing them in bytes with previous data.Experiments with Siemens S7-300 and S7-400 PLC were conducted to evaluate the PLC memory detection performance and performance impact on PLC.The experimental results demonstrate that the proposed system detects all malicious organization block(OB)injection and data block(DB)manipulation,and the increment of PLC cycle time,the impact on PLC performance,was less than 1 ms.The proposed system detects PLC memory attacks with a simpler detection method than earlier studies.Furthermore,the proposed system can be applied to ICS with a small performance impact on PLC.展开更多
The drive towards shorter design cycles for analog integrated circuits has given impetus to the development of Field Programmable Analog Arrays(FPAAs),which are the analogue counterparts of Field Programmable Gate Arr...The drive towards shorter design cycles for analog integrated circuits has given impetus to the development of Field Programmable Analog Arrays(FPAAs),which are the analogue counterparts of Field Programmable Gate Arrays(FPGAs).In this paper,we present a new design methodology which using FPAA as a powerful analog front-end processing platform in the smart sensory microsystem.The proposed FPAA contains 16 homogeneous mixed-grained Configurable Analog Blocks(CABs) which house a variety of processing elements especially the proposed fine-grained Core Configurable Amplifiers(CCAs).The high flexible CABs allow the FPAA operating in both continuous-time and discrete-time approaches suitable to support variety of sensors.To reduce the nonideal parasitic effects and save area,the fat-tree interconnection network is adopted in this FPAA.The functionality of this FPAA is demonstrated through embedding of voltage and capacitive sensor signal readout circuits and a configurable band pass filter.The minimal detectable voltage and capacitor achieves 38 uV and 8.3 aF respectively within 100 Hz sensor bandwidth.The power consumption comparison of CCA in three applications shows that the FPAA has high power efficiency.And the simulation results also show that the FPAA has good tolerance with wide PVT variations.展开更多
The modelling, design and implementation of a high-speed programmable polyphase finite impulse response (FIR) filter with field programmable gate array (FPGA) technology are described. This FIR filter can run automati...The modelling, design and implementation of a high-speed programmable polyphase finite impulse response (FIR) filter with field programmable gate array (FPGA) technology are described. This FIR filter can run automatically according to the programmable configuration word including symmetry/asymmetry, odd/even taps, from 32 taps up to 256 taps. The filter with 12 bit signal and 12 bit coefficient word-length has been realized on a Xilinx VirtexⅡ-v1500 device and operates at the maximum sampling frequency of (160 MHz.)展开更多
Communication-dependent and software-based distributed energy resources(DERs)are extensively integrated into modern microgrids,providing extensive benefits such as increased distributed controllability,scalability,and...Communication-dependent and software-based distributed energy resources(DERs)are extensively integrated into modern microgrids,providing extensive benefits such as increased distributed controllability,scalability,and observability.However,malicious cyber-attackers can exploit various potential vulnerabilities.In this study,a programmable adaptive security scanning(PASS)approach is presented to protect DER inverters against various power-bot attacks.Specifically,three different types of attacks,namely controller manipulation,replay,and injection attacks,are considered.This approach employs both software-defined networking technique and a novel coordinated detection method capable of enabling programmable and scalable networked microgrids(NMs)in an ultra-resilient,time-saving,and autonomous manner.The coordinated detection method efficiently identifies the location and type of power-bot attacks without disrupting normal NM operations.Extensive simulation results validate the efficacy and practicality of the PASS for securing NMs.展开更多
We find extremely large low-magnetic-field magnetoresistance (~350% at 0.2 T and ~180% at 0.1 T) in germa- nium at room temperature and the magnetoresistanee is highly sensitive to the surface roughness. This unique...We find extremely large low-magnetic-field magnetoresistance (~350% at 0.2 T and ~180% at 0.1 T) in germa- nium at room temperature and the magnetoresistanee is highly sensitive to the surface roughness. This unique magnetoelectric property is applied to fabricate logic architecture which could perform basic Boolean logic in- cluding AND, OR, NOR and NAND. Our logic device may pave the way for a high performance microprocessor and may make the germanium family more advanced.展开更多
In many communication and signal routing applications, it is desirable to have a programmable analog filter. According to this practical demand, we consider the titanium oxide memristor, which is a kind of nano-scale ...In many communication and signal routing applications, it is desirable to have a programmable analog filter. According to this practical demand, we consider the titanium oxide memristor, which is a kind of nano-scale electron device with low power dissipation and nonvolatile memory. Such characteristics could be suitable for designing the desired filter. However, both the non-analytical relation between the memristance and the charges that pass through it, and the changeable V-I characteristics in physical tests make it difficult to accurately set the memristance to the target value. In this paper, the conductive mechanism of the memristor is analyzed, a method of continuously programming the memristance is proposed and simulated in a simulation program with integrated circuit emphasis, and its feasibility and compatibility, both in simu- lations and physical realizations, are demonstrated. This method is then utilized in a first-order active filter as an example to show its applications in programmable filters. This work also provides a practical tool for utilizing memristors as resistance programmable devices.展开更多
Four-dimensional(4D)printing is an advanced form of three-dimensional(3D)printing with controllable and programmable shape transformation over time.Actuators are used as a controlling factor with multi-stage shape rec...Four-dimensional(4D)printing is an advanced form of three-dimensional(3D)printing with controllable and programmable shape transformation over time.Actuators are used as a controlling factor with multi-stage shape recovery,with emerging opportunities to customize the mechanical properties of bio-inspired structures.The print pattern of shape memory polymer(SMP)fbers strongly afects the achievable resolution,and consequently infuences several other physical and mechanical properties of fabricated actuators.However,the deformations of bio-inspired structures due to actuator layout are more complex because of the presence of the coupling of multi-directional strain.In this study,the initial structure was designed from closed-shell behavior and divided into a general unit and actuator unit,the latter responsible for driving the transformation.Mutual stress confrontation between the actuator and the general unit was considered in the layout thermodynamic model,in order to eliminate the transformation produced by the uncontrolled shape memory behavior of the general unit.Three critical and efective strategies for the layout design of actuators were proposed and then applied to achieve the desired accurate deformation of 3D-printed bilayer structures.Finally,the proposed approach was validated and adopted for fabricating a complex shell-like gripper structure.展开更多
In order to obtain variable characteristics,the digital filter's type,number of taps and coefficients should be changed constantly such that the desired frequency-domain characteristics can be obtained.This paper ...In order to obtain variable characteristics,the digital filter's type,number of taps and coefficients should be changed constantly such that the desired frequency-domain characteristics can be obtained.This paper proposes a method for self-programmable variable digital filter(VDF) design based on field programmable gate array(FPGA).We implement a digital filter system by using custom embedded micro-processor,programmable finite impulse response(P-FIR) macro module,coefficient-loader,clock manager and analog/digital(A/D) or digital/analog(D/A) controller and other modules.The self-programmable VDF can provide the best solution for realization of digital filter algorithms,which are the low-pass,high-pass,band-pass and band-stop filter algorithms with variable frequency domain characteristics.The design examples with minimum 1 to maximum 32 taps FIR filter,based on Modelsim post-routed simulation and onboard running on XUPV5-LX110T,are provided to demonstrate the effectiveness of the proposed method.展开更多
Targeted genome editing is a continually evolving technology employing programmable nucleases to specifically change,insert,or remove a genomic sequence of interest.These advanced molecular tools include meganucleases...Targeted genome editing is a continually evolving technology employing programmable nucleases to specifically change,insert,or remove a genomic sequence of interest.These advanced molecular tools include meganucleases,zinc finger nucleases,transcription activator-like effector nucleases and RNA-guided engineered nucleases(RGENs),which create double-strand breaks at specific target sites in the genome,and repair DNA either by homologous recombination in the presence of donor DNA or via the error-prone non-homologous end-joining mechanism.A recently discovered group of RGENs known as CRISPR/Cas9 gene-editing systems allowed precise genome manipulation revealing a causal association between disease genotype and phenotype,without the need for the reengineering of the specific enzyme when targeting different sequences.CRISPR/Cas9 has been successfully employed as an ex vivo gene-editing tool in embryonic stem cells and patient-derived stem cells to understand pancreatic beta-cell development and function.RNA-guided nucleases also open the way for the generation of novel animal models for diabetes and allow testing the efficiency of various therapeutic approaches in diabetes,as summarized and exemplified in this manuscript.展开更多
In current wireless communication and electronic systems,digital signals and electromagnetic(EM)radiation are processed by different modules.Here,we propose a mechanism to fuse the modulation of digital signals and th...In current wireless communication and electronic systems,digital signals and electromagnetic(EM)radiation are processed by different modules.Here,we propose a mechanism to fuse the modulation of digital signals and the manipulation of EM radiation on a single programmable metasurface(PM).The PM consists of massive subwavelength-scale digital coding elements.A set of digital states of all elements forms simultaneous digital information roles for modulation and the wave-control sequence code of the PM.By designing digital coding sequences in the spatial and temporal domains,the digital information and farfield patterns of the PM can be programmed simultaneously and instantly in desired ways.For the experimental demonstration of the mechanism,we present a programmable wireless communication system.The same system can realize transmissions of digital information in single-channel modes with beamsteerable capability and multichannel modes with multiple independent information.The measured results show the excellent performance of the programmable system.This work provides excellent prospects for applications in fifth-or sixth-generation wireless communications and modern intelligent platforms for unmanned aircrafts and vehicles.展开更多
An intelligent fuzzy logic inference pipeline for the control of a dc-dc buck-boost converter was designed and built using a semi-custom VLSI chip. The fuzzy linguistics describing the switching topologies of the conv...An intelligent fuzzy logic inference pipeline for the control of a dc-dc buck-boost converter was designed and built using a semi-custom VLSI chip. The fuzzy linguistics describing the switching topologies of the converter was mapped into a look-up table that was synthesized into a set of Boolean equations. A VLSI chip–a field programmable gate array (FPGA) was used to implement the Boolean equations. Features include the size of RAM chip independent of number of rules in the knowledge base, on-chip fuzzification and defuzzification, faster response with speeds over giga fuzzy logic inferences per sec (FLIPS), and an inexpensive VLSI chip. The key application areas are: 1) on-chip integrated controllers;and 2) on-chip co-integration for entire system of sensors, circuits, controllers, and detectors for building complete instrument systems.展开更多
Field Programmable Gate Array(FPGA) and Single Instruction Multiple Data(SIMD) processing array share many architecture features. In both architectures, an array is employed to provide high speed computation. In this ...Field Programmable Gate Array(FPGA) and Single Instruction Multiple Data(SIMD) processing array share many architecture features. In both architectures, an array is employed to provide high speed computation. In this paper we show that the implementation of a Single Instruction Multiple Data (SIMD) machine the ABC 90 using the Field Programmable Gate Array (FPGA) is not completely suitable because of its characteristics. The comparison between the programmable gate arrays show that, they have many architectures features in common. Within this framework, we examine the differences and similarities between these array structures and touch upon techniques and lessons which can be done between these architectures in order to choose the appropriate Programmable gate array to implement a general purpose parallel computer. In this paper we introduce the principal of the Dynamically Programmable Date Array(DPGA) which combines the best feature of the FPGA and the SIMD arrays into a single array architecture. By the same way we show that the DPGA is more appropriate then the FPGA for wiring, hardwiring the general purpose parallel computers: SIMD and its implementation.展开更多
There is an increasing interest of using the Programmable arrays for performing different hardware. In this paper we give an alternative approach and the applications of the Programmable Gate Arrays. We show the field...There is an increasing interest of using the Programmable arrays for performing different hardware. In this paper we give an alternative approach and the applications of the Programmable Gate Arrays. We show the field and the domain where they are more adequate and wihch kind of Programmable array is more efficient to apply. The DPGA and the FPGA are both Programmable Gate Array. They have more possibilities then the conventional devices such as 64 bits microprocessor, however a microprocessor coupled with a programmable array has more opportunity and their implementation is increasing. It is impossible to enumerate all possible uses of Programmable Gate Array. However we use the parameters Latency and throughput. Finite State Machine(FSM), control of data path, processor coupled with a programmable array to build up an alternative approach of the devices and their applications.展开更多
Novel electromagnetic wave modulation by programmable dynamic metasurface promotes the device design freedom,while multibeam antennas have sparked tremendous interest in wireless communications.A programmable coding a...Novel electromagnetic wave modulation by programmable dynamic metasurface promotes the device design freedom,while multibeam antennas have sparked tremendous interest in wireless communications.A programmable coding antenna based on active metasurface elements(AMSEs)is proposed in this study,allowing scanning and state switching of multiple beams in real time.To obtain the planar array phase distribution in quick response,the aperture field superposition and discretization procedures are investigated.Without the need for a massive algorithm or elaborate design,this electronically controlled antenna with integrated radiation and phase-shift functions can flexibly manipulate the scattering state of multiple beams under field-programmable gate array(FPGA)control.Simulation and experimental results show that the multiple directional beams dynamically generated in the metasurface upper half space have good radiation performance,with the main lobe directions closely matching the predesigned angles.This metasurface antenna has great potential for future applications in multitarget radar,satellite navigation,and reconfigurable intelligent metasurfaces.展开更多
基金funded by the National Nature Science Foundation of China(Grant Nos.52175509 and 52130504)National Key Research and Development Program of China(2017YFF0204705)2021 Postdoctoral Innovation Research Plan of Hubei Province(0106100226)。
文摘Multi-level programmable photonic integrated circuits(PICs)and optical metasurfaces have gained widespread attention in many fields,such as neuromorphic photonics,opticalcommunications,and quantum information.In this paper,we propose pixelated programmable Si_(3)N_(4)PICs with record-high 20-level intermediate states at 785 nm wavelength.Such flexibility in phase or amplitude modulation is achieved by a programmable Sb_(2)S_(3)matrix,the footprint of whose elements can be as small as 1.2μm,limited only by the optical diffraction limit of anin-house developed pulsed laser writing system.We believe our work lays the foundation for laser-writing ultra-high-level(20 levels and even more)programmable photonic systems and metasurfaces based on phase change materials,which could catalyze diverse applications such as programmable neuromorphic photonics,biosensing,optical computing,photonic quantum computing,and reconfigurable metasurfaces.
基金supported in part by the National Key Research and Development Program of China under Grant 2022YFB3604400in part by the Youth Innovation Promotion Association of Chinese Academy Sciences (CAS)+4 种基金in part by the CAS-Croucher Funding Scheme under Grant CAS22801in part by National Natural Science Foundation of China under Grant 62334012, Grant 62074161, Grant 62004213, Grant U20A20208, and Grant 62304252in part by the Beijing Municipal Science and Technology Commission project under Grant Z201100008420009 and Grant Z211100007921018in part by the University of CASin part by the IMECAS-HKUST-Joint Laboratory of Microelectronics
文摘In this work,a novel one-time-programmable memory unit based on a Schottky-type p-GaN diode is proposed.During the programming process,the junction switches from a high-resistance state to a low-resistance state through Schottky junction breakdown,and the state is permanently preserved.The memory unit features a current ratio of more than 10^(3),a read voltage window of 6 V,a programming time of less than 10^(−4)s,a stability of more than 108 read cycles,and a lifetime of far more than 10 years.Besides,the fabrication of the device is fully compatible with commercial Si-based GaN process platforms,which is of great significance for the realization of low-cost read-only memory in all-GaN integration.
基金Guangdong Province Education Science Planning Project(Higher Education Special)“Construction and Practice of Applied Innovation Education System for Applied Undergraduate Mechanical Majors”(Project number:2023GXJK638)。
文摘As the country continues to promote the development of intelligent manufacturing,all industries are carrying out enterprise automation upgrading,the Pearl River Delta Intelligent Manufacturing Conference held in March 2024 provides a direction guide for each enterprise on how to integrate the intelligent manufacturing technology into each link and provide direction guidance for enterprises to create new models and new business formats.College teachers,in focusing on the teaching process,should closely match the enterprise and social needs and cultivate excellent students.As the core controller of automation control,the application of programmable controllers in teaching is particularly important.In practical classes,by setting progressive difficulty,project guidance,team collaboration,and other links,students can master the automation equipment design of programmable control in repeated practice.
基金We are grateful for financial supports from National Major Research and Development Program(No.2018YFB2200200)National Science Fund for Distinguished Young Scholars(61725503)+1 种基金Zhejiang Provincial Natural Science Foundation(LZ18F050001,LGF21F050003)National Natural Science Foundation of China(NSFC)(91950205,6191101294,11861121002,61905209,62175214,62111530147).
文摘Chip-scale programmable optical signal processors are often used to flexibly manipulate the optical signals for satisfying the demands in various applications,such as lidar,radar,and artificial intelligence.Silicon photonics has unique advantages of ultra-high integration density as well as CMOS compatibility,and thus makes it possible to develop large-scale programmable optical signal processors.The challenge is the high silicon waveguides propagation losses and the high calibration complexity for all tuning elements due to the random phase errors.In this paper,we propose and demonstrate a programmable silicon photonic processor for the first time by introducing low-loss multimode photonic waveguide spirals and low-random-phase-error Mach-Zehnder switches.The present chip-scale programmable silicon photonic processor comprises a 1×4 variable power splitter based on cascaded Mach-Zehnder couplers(MZCs),four Ge/Si photodetectors,four channels of thermally-tunable optical delaylines.Each channel consists of a continuously-tuning phase shifter based on a waveguide spiral with a micro-heater and a digitally-tuning delayline realized with cascaded waveguide-spiral delaylines and MZSs for 5.68 ps time-delay step.Particularly,these waveguide spirals used here are designed to be as wide as 2μm,enabling an ultralow propagation loss of 0.28 dB/cm.Meanwhile,these MZCs and MZSs are designed with 2-μm-wide arm waveguides,and thus the random phase errors in the MZC/MZS arms are negligible,in which case the calibration for these MZSs/MZCs becomes easy and furthermore the power consumption for compensating the phase errors can be reduced greatly.Finally,this programmable silicon photonic processor is demonstrated successfully to verify a number of distinctively different functionalities,including tunable time-delay,microwave photonic beamforming,arbitrary optical signal filtering,and arbitrary waveform generation.
基金This work was supported in part by the Geran Galakan Penyelidik Muda Grant(GGPM),Universiti Kebangsaan Malaysia,Selangor,Malaysia under grant GGPM-2021-055.
文摘This article presents an integrated current mode configurable analog block(CAB)system for field-programmable analog array(FPAA).The proposed architecture is based on the complementary metal-oxide semiconductor(CMOS)transistor level design where MOSFET transistors operating in the saturation region are adopted.The proposed CAB architecture is designed to implement six of thewidely used current mode operations in analog processing systems:addition,subtraction,integration,multiplication,division,and pass operation.The functionality of the proposed CAB is demonstrated through these six operations,where each operation is chosen based on the user’s selection in the CAB interface system.The architecture of the CAB system proposes an optimized way of designing and integrating only three functional cells with the interface circuitry to achieve the six operations.Furthermore,optimized programming and digital tuning circuitry are implemented in the architecture to control and interface with the functional cells.Moreover,these designed programming and tuning circuitries play an essential role in optimizing the performance of the proposed design.Simulation of the proposed CMOS Transistor Based CAB system is carried out using Tanner EDA Tools in 0.35μm standard CMOS technology.The design uses a±1.5 V power supply and results in maximum 3 dB bandwidth of 34.9 MHz and an approximate size of 0.0537 mm2.This demonstrates the advantages of the design over the current state-of-the-art designs presented for comparison in this article.Consequently,the proposed design has a clear aspect of simplicity,low power consumption,and high bandwidth operation,which makes it a suitable candidate for mobile telecommunications applications.
基金supported by the Korea WESTERN POWER(KOWEPO)(2022-Commissioned Research-11,Development of Cyberattack Detection Technology for New and Renewable Energy Control System Using AI(Artificial Intelligence),50%)the Institute of Information&Communications Technology Planning&Evaluation(IITP)grant funded by the Korea government(MSIT)(No.2021-0-01806,Development of Security by Design and Security Management Technology in Smart Factory,40%)the Gachon University Research Fund of 2023(GCU-202110280001,10%).
文摘Cyberattacks targeting industrial control systems(ICS)are becoming more sophisticated and advanced than in the past.A programmable logic controller(PLC),a core component of ICS,controls and monitors sensors and actuators in the field.However,PLC has memory attack threats such as program injection and manipulation,which has long been a major target for attackers,and it is important to detect these attacks for ICS security.To detect PLC memory attacks,a security system is required to acquire and monitor PLC memory directly.In addition,the performance impact of the security system on the PLC makes it difficult to apply to the ICS.To address these challenges,this paper proposes a system to detect PLC memory attacks by continuously acquiring and monitoring PLC memory.The proposed system detects PLC memory attacks by acquiring the program blocks and block information directly from the same layer as the PLC and then comparing them in bytes with previous data.Experiments with Siemens S7-300 and S7-400 PLC were conducted to evaluate the PLC memory detection performance and performance impact on PLC.The experimental results demonstrate that the proposed system detects all malicious organization block(OB)injection and data block(DB)manipulation,and the increment of PLC cycle time,the impact on PLC performance,was less than 1 ms.The proposed system detects PLC memory attacks with a simpler detection method than earlier studies.Furthermore,the proposed system can be applied to ICS with a small performance impact on PLC.
基金Supported by the CAS/SAFEA International Partnership Program for Creative Research Teams,National High Technology Research and Develop Program of China(2012AA012301)National Science and Technology Major Project of China(2013ZX03006004)
文摘The drive towards shorter design cycles for analog integrated circuits has given impetus to the development of Field Programmable Analog Arrays(FPAAs),which are the analogue counterparts of Field Programmable Gate Arrays(FPGAs).In this paper,we present a new design methodology which using FPAA as a powerful analog front-end processing platform in the smart sensory microsystem.The proposed FPAA contains 16 homogeneous mixed-grained Configurable Analog Blocks(CABs) which house a variety of processing elements especially the proposed fine-grained Core Configurable Amplifiers(CCAs).The high flexible CABs allow the FPAA operating in both continuous-time and discrete-time approaches suitable to support variety of sensors.To reduce the nonideal parasitic effects and save area,the fat-tree interconnection network is adopted in this FPAA.The functionality of this FPAA is demonstrated through embedding of voltage and capacitive sensor signal readout circuits and a configurable band pass filter.The minimal detectable voltage and capacitor achieves 38 uV and 8.3 aF respectively within 100 Hz sensor bandwidth.The power consumption comparison of CCA in three applications shows that the FPAA has high power efficiency.And the simulation results also show that the FPAA has good tolerance with wide PVT variations.
文摘The modelling, design and implementation of a high-speed programmable polyphase finite impulse response (FIR) filter with field programmable gate array (FPGA) technology are described. This FIR filter can run automatically according to the programmable configuration word including symmetry/asymmetry, odd/even taps, from 32 taps up to 256 taps. The filter with 12 bit signal and 12 bit coefficient word-length has been realized on a Xilinx VirtexⅡ-v1500 device and operates at the maximum sampling frequency of (160 MHz.)
基金This work was supported in part by the National Science Foundation,USA(ECCS-2018492,CNS-2006828,ECCS-2002897,and OIA-2040599).
文摘Communication-dependent and software-based distributed energy resources(DERs)are extensively integrated into modern microgrids,providing extensive benefits such as increased distributed controllability,scalability,and observability.However,malicious cyber-attackers can exploit various potential vulnerabilities.In this study,a programmable adaptive security scanning(PASS)approach is presented to protect DER inverters against various power-bot attacks.Specifically,three different types of attacks,namely controller manipulation,replay,and injection attacks,are considered.This approach employs both software-defined networking technique and a novel coordinated detection method capable of enabling programmable and scalable networked microgrids(NMs)in an ultra-resilient,time-saving,and autonomous manner.The coordinated detection method efficiently identifies the location and type of power-bot attacks without disrupting normal NM operations.Extensive simulation results validate the efficacy and practicality of the PASS for securing NMs.
基金Supported by the National Natural Science Foundation of China under Grant Nos 11174169,11234007 and 51471093
文摘We find extremely large low-magnetic-field magnetoresistance (~350% at 0.2 T and ~180% at 0.1 T) in germa- nium at room temperature and the magnetoresistanee is highly sensitive to the surface roughness. This unique magnetoelectric property is applied to fabricate logic architecture which could perform basic Boolean logic in- cluding AND, OR, NOR and NAND. Our logic device may pave the way for a high performance microprocessor and may make the germanium family more advanced.
基金supported by the National Natural Science Foundation of China(Grant Nos.61171017 and F010505)
文摘In many communication and signal routing applications, it is desirable to have a programmable analog filter. According to this practical demand, we consider the titanium oxide memristor, which is a kind of nano-scale electron device with low power dissipation and nonvolatile memory. Such characteristics could be suitable for designing the desired filter. However, both the non-analytical relation between the memristance and the charges that pass through it, and the changeable V-I characteristics in physical tests make it difficult to accurately set the memristance to the target value. In this paper, the conductive mechanism of the memristor is analyzed, a method of continuously programming the memristance is proposed and simulated in a simulation program with integrated circuit emphasis, and its feasibility and compatibility, both in simu- lations and physical realizations, are demonstrated. This method is then utilized in a first-order active filter as an example to show its applications in programmable filters. This work also provides a practical tool for utilizing memristors as resistance programmable devices.
基金the National Natural Science Foundation of China(Nos.51805472,51775489,and 51975386)the Natural Science Foundation of Zhejiang Province,China(No.LZ21E050004).
文摘Four-dimensional(4D)printing is an advanced form of three-dimensional(3D)printing with controllable and programmable shape transformation over time.Actuators are used as a controlling factor with multi-stage shape recovery,with emerging opportunities to customize the mechanical properties of bio-inspired structures.The print pattern of shape memory polymer(SMP)fbers strongly afects the achievable resolution,and consequently infuences several other physical and mechanical properties of fabricated actuators.However,the deformations of bio-inspired structures due to actuator layout are more complex because of the presence of the coupling of multi-directional strain.In this study,the initial structure was designed from closed-shell behavior and divided into a general unit and actuator unit,the latter responsible for driving the transformation.Mutual stress confrontation between the actuator and the general unit was considered in the layout thermodynamic model,in order to eliminate the transformation produced by the uncontrolled shape memory behavior of the general unit.Three critical and efective strategies for the layout design of actuators were proposed and then applied to achieve the desired accurate deformation of 3D-printed bilayer structures.Finally,the proposed approach was validated and adopted for fabricating a complex shell-like gripper structure.
基金Science &Technology Plan Foundation of Hunan Province,China(No.2010F3102)Science Research Foundation of Hunan Province,China(No.08C392)
文摘In order to obtain variable characteristics,the digital filter's type,number of taps and coefficients should be changed constantly such that the desired frequency-domain characteristics can be obtained.This paper proposes a method for self-programmable variable digital filter(VDF) design based on field programmable gate array(FPGA).We implement a digital filter system by using custom embedded micro-processor,programmable finite impulse response(P-FIR) macro module,coefficient-loader,clock manager and analog/digital(A/D) or digital/analog(D/A) controller and other modules.The self-programmable VDF can provide the best solution for realization of digital filter algorithms,which are the low-pass,high-pass,band-pass and band-stop filter algorithms with variable frequency domain characteristics.The design examples with minimum 1 to maximum 32 taps FIR filter,based on Modelsim post-routed simulation and onboard running on XUPV5-LX110T,are provided to demonstrate the effectiveness of the proposed method.
基金the Akdeniz University Scientific Research Commission and the Scientific and Technological Research Council of Turkey,No.TUBITAK-215S820.
文摘Targeted genome editing is a continually evolving technology employing programmable nucleases to specifically change,insert,or remove a genomic sequence of interest.These advanced molecular tools include meganucleases,zinc finger nucleases,transcription activator-like effector nucleases and RNA-guided engineered nucleases(RGENs),which create double-strand breaks at specific target sites in the genome,and repair DNA either by homologous recombination in the presence of donor DNA or via the error-prone non-homologous end-joining mechanism.A recently discovered group of RGENs known as CRISPR/Cas9 gene-editing systems allowed precise genome manipulation revealing a causal association between disease genotype and phenotype,without the need for the reengineering of the specific enzyme when targeting different sequences.CRISPR/Cas9 has been successfully employed as an ex vivo gene-editing tool in embryonic stem cells and patient-derived stem cells to understand pancreatic beta-cell development and function.RNA-guided nucleases also open the way for the generation of novel animal models for diabetes and allow testing the efficiency of various therapeutic approaches in diabetes,as summarized and exemplified in this manuscript.
基金supported by the Fund for International Cooperation and Exchange of National Natural Science Foundation of China(61761136007)the National Key Research and Development Program of China(2017YFA0700201,2017YFA0700202,and 2017YFA0700203)+3 种基金the National Natural Science Foundation of China(6217010363,61631007,61571117,61501112,61501117,61871109,61522106,61731010,61735010,61722106,61701107,and 61701108)the Natural Science Foundation of Jiangsu Province(BK20211161)the 111 Project(111-2-05)ZhiShan Young Scholar Program of Southeast University.
文摘In current wireless communication and electronic systems,digital signals and electromagnetic(EM)radiation are processed by different modules.Here,we propose a mechanism to fuse the modulation of digital signals and the manipulation of EM radiation on a single programmable metasurface(PM).The PM consists of massive subwavelength-scale digital coding elements.A set of digital states of all elements forms simultaneous digital information roles for modulation and the wave-control sequence code of the PM.By designing digital coding sequences in the spatial and temporal domains,the digital information and farfield patterns of the PM can be programmed simultaneously and instantly in desired ways.For the experimental demonstration of the mechanism,we present a programmable wireless communication system.The same system can realize transmissions of digital information in single-channel modes with beamsteerable capability and multichannel modes with multiple independent information.The measured results show the excellent performance of the programmable system.This work provides excellent prospects for applications in fifth-or sixth-generation wireless communications and modern intelligent platforms for unmanned aircrafts and vehicles.
文摘An intelligent fuzzy logic inference pipeline for the control of a dc-dc buck-boost converter was designed and built using a semi-custom VLSI chip. The fuzzy linguistics describing the switching topologies of the converter was mapped into a look-up table that was synthesized into a set of Boolean equations. A VLSI chip–a field programmable gate array (FPGA) was used to implement the Boolean equations. Features include the size of RAM chip independent of number of rules in the knowledge base, on-chip fuzzification and defuzzification, faster response with speeds over giga fuzzy logic inferences per sec (FLIPS), and an inexpensive VLSI chip. The key application areas are: 1) on-chip integrated controllers;and 2) on-chip co-integration for entire system of sensors, circuits, controllers, and detectors for building complete instrument systems.
文摘Field Programmable Gate Array(FPGA) and Single Instruction Multiple Data(SIMD) processing array share many architecture features. In both architectures, an array is employed to provide high speed computation. In this paper we show that the implementation of a Single Instruction Multiple Data (SIMD) machine the ABC 90 using the Field Programmable Gate Array (FPGA) is not completely suitable because of its characteristics. The comparison between the programmable gate arrays show that, they have many architectures features in common. Within this framework, we examine the differences and similarities between these array structures and touch upon techniques and lessons which can be done between these architectures in order to choose the appropriate Programmable gate array to implement a general purpose parallel computer. In this paper we introduce the principal of the Dynamically Programmable Date Array(DPGA) which combines the best feature of the FPGA and the SIMD arrays into a single array architecture. By the same way we show that the DPGA is more appropriate then the FPGA for wiring, hardwiring the general purpose parallel computers: SIMD and its implementation.
文摘There is an increasing interest of using the Programmable arrays for performing different hardware. In this paper we give an alternative approach and the applications of the Programmable Gate Arrays. We show the field and the domain where they are more adequate and wihch kind of Programmable array is more efficient to apply. The DPGA and the FPGA are both Programmable Gate Array. They have more possibilities then the conventional devices such as 64 bits microprocessor, however a microprocessor coupled with a programmable array has more opportunity and their implementation is increasing. It is impossible to enumerate all possible uses of Programmable Gate Array. However we use the parameters Latency and throughput. Finite State Machine(FSM), control of data path, processor coupled with a programmable array to build up an alternative approach of the devices and their applications.
文摘Novel electromagnetic wave modulation by programmable dynamic metasurface promotes the device design freedom,while multibeam antennas have sparked tremendous interest in wireless communications.A programmable coding antenna based on active metasurface elements(AMSEs)is proposed in this study,allowing scanning and state switching of multiple beams in real time.To obtain the planar array phase distribution in quick response,the aperture field superposition and discretization procedures are investigated.Without the need for a massive algorithm or elaborate design,this electronically controlled antenna with integrated radiation and phase-shift functions can flexibly manipulate the scattering state of multiple beams under field-programmable gate array(FPGA)control.Simulation and experimental results show that the multiple directional beams dynamically generated in the metasurface upper half space have good radiation performance,with the main lobe directions closely matching the predesigned angles.This metasurface antenna has great potential for future applications in multitarget radar,satellite navigation,and reconfigurable intelligent metasurfaces.