Adding Pseudo-Random Test Sequence Generator in the Test Simulator for DFT Approach

This paper presents modified version of a realistic test tool suitable to Design For Testability （DFT） and Built-ln Self Test （BIST） environments. A comprehensive tool is developed in the form of a test simulator. The simulator is capable of providing a required goal of test for the Circuit Under Test （CUT）. The simulator uses the approach of fault diagnostics with fault grading procedures to provide the optimum tests. The current version of the simulator embeds features of exhaustive and pseudo-random test generation schemes along with the search solutions of cost effective test goals. The simulator provides facilities of realizing all possible pseudo-random sequence generators with all possible combinations of seeds. The tool is developed on a common Personal Computer （PC） platform and hence no special software is required. Thereby, it is a low cost tool hence economical. The tool is very much suitable for determining realistic test sequences for a targeted goal of testing for any CUT. The developed tool incorporates flexible Graphical User Interface （GUI） procedures and can be operated without any special programming skill. The tool is debugged and tested with the results of many bench mark circuits. Further, this developed tool can be utilized for educational purposes for many courses such as fault-tolerant computing, fault diagnosis, digital electronics, and safe-reliable-testable digital logic designs.

A CLASS OF RANDOM NUMBER GENERATORS BASED ON WEYL SEQUENCE

The generation of good pseudo-random numbers is the base of many important fields in scientific computing, such as randomized algorithms and numerical solution of stochastic differential equations. In this paper, a class of random number generators （RNGs） based on Weyl sequence is proposed. The uniformity of those RNGs is proved theoretically. Statistical and numerical computations show the efficiency of the methods.

Pseudo-Random Test Generation for Large Combinational Circuits

In this paper,a simulation system of pseudo-random testing is described first to investigate the characteristics of pseudo-random testing.Several interesting experimental results are obtained.It is found out that initial states of pseudo-random sequences have little effect on fault coverage.Fixed connection between LFSR outputs and circuit inputs in which the number of LFSR stages m is less than the number of circuit inputs n leads to low fault coverage,and the fault coverage is reduced as m decreases.The local unrandomness of pseudo-random sequences is exposed clearly.Generally,when an LFSR is employed as a pseudo-random generator,there are at least as many LFSR stages as circuit inputs.However,for large circuits under test with hundreds of inputs,there are drawbacks of using an LFSR with hundreds of stages.In the paper,a new design for a pseudo-random pattern generator is proposed in which m<n.The relationship between test length and the number of LFSR stages is discussed in order to obtain necessary,fault coverage.It is shown that the design cannot only save LFSR hardware but also reduce test length without loss of fault coverage,and is easy to implement. The experimental results are provided for the 10 Benchmark Circuits to show the effectiveness of the generator.

Probabilistic Models for Estimation of Random and Pseudo-Random Test Length

A new probabilistic testability measure is presented to ease test length analyses of random testing and pseudorandom testing.The testability measure given in this paper is oriented to signal conflict of reconvergent fanouts.Test length analyses in this paper are based on a hard fault set,calculations of which are practicable and simple.Experimental results have been obtained to show the accuracy of this test length analyser in comparison with that of Savir,Chin and McCluskey,and Wunderlich by using a pseudorandom test generator combined with exhaustive fault simulation.

A New Software Reliability Framework —— A Extended Cleanroom Model

Cleanroom software engineering has been proven effective in improving software development quality while at the same time increasing reliability. To adapt to large software system development, the paper presents an extended the Cleanroom model, which integrates object-oriented method based on stimulus history, reversed engineering idea, automatic testing and reliability assessment into software development. The paper discusses the architecture and realizing technology of ECM.