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Sensitivity of Total-Dose Radiation Hardness of SIMOX Buried Oxides to Doses of Nitrogen Implantation into Buried Oxides 被引量:2
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作者 郑中山 刘忠立 +6 位作者 张国强 李宁 李国花 马红芝 张恩霞 张正选 王曦 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2005年第5期862-866,共5页
In order to improve the total-dose radiation har dness of the buried oxides(BOX) in the structure of separation-by-implanted-oxygen(SIMOX) silicon-on-insulator(SOI),nitrogen ions are implanted into the buried oxides w... In order to improve the total-dose radiation har dness of the buried oxides(BOX) in the structure of separation-by-implanted-oxygen(SIMOX) silicon-on-insulator(SOI),nitrogen ions are implanted into the buried oxides with two different doses,2×10 15 and 3×10 15 cm -2 ,respectively.The experimental results show that the radiation hardness of the buried oxides is very sensitive to the doses of nitrogen implantation for a lower dose of irradiation with a Co-60 source.Despite the small difference between the doses of nitrogen implantation,the nitrogen-implanted 2×10 15 cm -2 BOX has a much higher hardness than the control sample (i.e.the buried oxide without receiving nitrogen implantation) for a total-dose irradiation of 5×104rad(Si),whereas the nitrogen-implanted 3×10 15 cm -2 BOX has a lower hardness than uhe control sample.However,this sensitivity of radiation hardness to the doses of nitrogen implantation reduces with the increasing total-dose of irradiation (from 5×104 to 5×105rad (Si)).The radiation hardness of BOX is characterized by MOS high-frequency (HF) capacitance-voltage (C-V) technique after the top silicon layers are removed.In addition,the abnormal HF C-V curve of the metal-silicon-BOX-silicon(MSOS) structure is observed and explained. 展开更多
关键词 SIMOX buried oxide radiation-hardness nitrogen implantation
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0.8μm SOI CMOS抗辐射加固工艺辐射效应研究 被引量:1
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作者 马慧红 顾爱军 《电子与封装》 2015年第7期20-23,共4页
采用抗辐射0.8μm SOI CMOS加固技术,研制了抗辐射SOI CMOS器件和电路。利用Co60γ射线源对器件和电路的总剂量辐射效应进行了研究。对比抗辐射加固工艺前后器件的Id-Vg曲线以及前栅、背栅阈值随辐射总剂量的变化关系,得到1 Mrad(Si)总... 采用抗辐射0.8μm SOI CMOS加固技术,研制了抗辐射SOI CMOS器件和电路。利用Co60γ射线源对器件和电路的总剂量辐射效应进行了研究。对比抗辐射加固工艺前后器件的Id-Vg曲线以及前栅、背栅阈值随辐射总剂量的变化关系,得到1 Mrad(Si)总剂量辐射下器件前栅阈值电压漂移小于0.15 V。最后对加固和非加固的电路静态电流、动态电流、功能随辐射总剂量的变化情况进行了研究,结果表明抗辐射加固工艺制造的电路抗总剂量辐射性能达到500 krad(Si)。 展开更多
关键词 SOI radiation-hard ASIC SIMOX
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On Radioactivity–Exposed Nanophotodetector Optoreliability
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作者 Emmanuel A. Anagnostakis 《Journal of Modern Physics》 2011年第7期766-770,共5页
The optoelectronic reliability of representative radioactivity-exposed nanophotodetectors and the degree of functionally tolerable radioactivity-induced responsivity de-emphasis, against increasing cumulative radioact... The optoelectronic reliability of representative radioactivity-exposed nanophotodetectors and the degree of functionally tolerable radioactivity-induced responsivity de-emphasis, against increasing cumulative radioactivity-dose, is notionally considered and modelled, with a view towards experimental findings concerning p-i-n photosensors being exposed to regulated successive (α, β)-particle bombardments. 展开更多
关键词 radiation-hardness OPTOELECTRONIC Reliability PHOTODETECTORS PHOTORESPONSIVE Nanointerfaces Quantum Efficiency & Detection Yield
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A 12-bit 1MS/s SAR-ADC for multi-channel CdZnTe detectors
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作者 刘伟 魏廷存 +2 位作者 李博 郭潘杰 胡永才 《Journal of Semiconductors》 EI CAS CSCD 2015年第4期143-150,共8页
This paper presents a low power, area-efficient and radiation-hardened 12-bit 1 MS/s successive approx- imation register (SAR) analog-to-digital converter (ADC) for multi-channel CdZnTe (CZT) detector applicatio... This paper presents a low power, area-efficient and radiation-hardened 12-bit 1 MS/s successive approx- imation register (SAR) analog-to-digital converter (ADC) for multi-channel CdZnTe (CZT) detector applications. In order to improve the SAR-ADC's accuracy, a novel comparator is proposed in which the offset voltage is self- calibrated and also a new architecture for the unit capacitor array is proposed to reduce the capacitance mismatches in the charge-redistribution DAC. The ability to radiation-harden the SAR-ADC is enhanced through circuit and layout design technologies. The prototype chip was fabricated using a TSMC 0.35 μm 2P4M CMOS process. At a 3.3/5 V power supply and a sampling rate of 1 MS/s, the proposed SAR-ADC achieves a peak signal to noise and distortion ratio (SINAD) of 67.64 dB and consumes only 10 mW power. The core of the prototype chip occupies an active area of 1180 ×1080μm2. 展开更多
关键词 SAR ADC radiation-hardness low power CZT detectors
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