The structure of rapldly quenched Al-Si alloys (1 and 4 wt-%Si) was systematically studied by optical and transmission electron microscopy (TEM ) as welI as X-ray djffractjon (XRD). ExperimentaIresults show that rapid...The structure of rapldly quenched Al-Si alloys (1 and 4 wt-%Si) was systematically studied by optical and transmission electron microscopy (TEM ) as welI as X-ray djffractjon (XRD). ExperimentaIresults show that rapid solidification refines the grain size. extends the solid solubility of Si in Al and Introduces a high density ot defects which exist in the forms of vacancies, dislocations and dislocation loops. etc.. The decomposition process of the alloys was fol lowed by using differential scanning calorimeter (DSC) and the activation energy for precipitation of Si was obtained through Kissinger analysis. The precipitation behaviour of Supersaturated Si in both samples was further examined by TEM. It was found that Si mainly precipitated inside the grains in Al-1 wt-%Si alloy. while in Al-4 wt-%Si alloy. nearly all the Si precipitates distributed along the grain boundaries. This may be due to the structure difference between the alloys in as-quenched state展开更多
Development of graphene field effect transistors （GFETs） faces a serious challenge of graphene interface to the dielectric material. A single layer of intrinsic graphene has an average sheet resistance of the order ...Development of graphene field effect transistors （GFETs） faces a serious challenge of graphene interface to the dielectric material. A single layer of intrinsic graphene has an average sheet resistance of the order of 1-5 kΩ/□. The intrinsic nature of graphene leads to higher contact resistance yielding into the outstanding properties of the material. We design a graphene matrix with minimized sheet resistance of 0.185 kΩ/□ with Ag contacts. The developed matrices on silicon substrates provide a variety of transistor design options for subsequent fabrication. The graphene layer is developed over 400 nm nickel in such a way as to analyze hypersensitive electrical properties of the interface for exfoliation. This work identifies potential of the design in the applicability of few-layer GFETs with less process steps with the help of analyzing the effect of metal contact and post-process anneMing on its electrical fabrication.展开更多
文摘The structure of rapldly quenched Al-Si alloys (1 and 4 wt-%Si) was systematically studied by optical and transmission electron microscopy (TEM ) as welI as X-ray djffractjon (XRD). ExperimentaIresults show that rapid solidification refines the grain size. extends the solid solubility of Si in Al and Introduces a high density ot defects which exist in the forms of vacancies, dislocations and dislocation loops. etc.. The decomposition process of the alloys was fol lowed by using differential scanning calorimeter (DSC) and the activation energy for precipitation of Si was obtained through Kissinger analysis. The precipitation behaviour of Supersaturated Si in both samples was further examined by TEM. It was found that Si mainly precipitated inside the grains in Al-1 wt-%Si alloy. while in Al-4 wt-%Si alloy. nearly all the Si precipitates distributed along the grain boundaries. This may be due to the structure difference between the alloys in as-quenched state
文摘Development of graphene field effect transistors （GFETs） faces a serious challenge of graphene interface to the dielectric material. A single layer of intrinsic graphene has an average sheet resistance of the order of 1-5 kΩ/□. The intrinsic nature of graphene leads to higher contact resistance yielding into the outstanding properties of the material. We design a graphene matrix with minimized sheet resistance of 0.185 kΩ/□ with Ag contacts. The developed matrices on silicon substrates provide a variety of transistor design options for subsequent fabrication. The graphene layer is developed over 400 nm nickel in such a way as to analyze hypersensitive electrical properties of the interface for exfoliation. This work identifies potential of the design in the applicability of few-layer GFETs with less process steps with the help of analyzing the effect of metal contact and post-process anneMing on its electrical fabrication.
