30Gbit/s Parallel Optical Receiver Module

A 30Gbit/s receptor module is developed with a CMOS integrated receiver chip（IC） and a GaAs-based 1 × 12 photo detector array of PIN-type. Parallel technology is adopted in this module to realize a high-speed receiver module with medium speed devices. A high-speed printed circuit board（PCB） is designed and produced. The IC chip and the PD array are packaged on the PCB by chip-on-board technology. Flip chip alignment is used for the PD array accurately assembled on the module so that a plug-type optical port is built. Test results show that the module can receive parallel signals at 30Gbit/s. The sensitivity of the module is - 13.6dBm for 10^-13 BER.

Microwave Reflectometry on HL-2A Tokamak

One of the most important electron density diagnostics, microwave reflectometry, has been developed on many large and medium nuclear fusion devices in recent years . Not only the electron density profiles with high temporal and spatial resolutions, but also the profiles of plasma rotation and turbulence can be obtained with this diagnostic system.

Fabrication of optical fiber sensor based on double-layer SU-8 diaphragm and the partial discharge detection

In this paper, a partial discharge detection system is proposed using an optical fiber Fabry-Perot(FP) interferometric sensor, which is fabricated by photolithography. SU-8 photoresist is employed due to its low Young's modulus and potentially high sensitivity for ultrasound detection. The FP cavity is formed by coating the fiber end face with two layers of SU-8 so that the cavity can be controlled by the thickness of the middle layer of SU-8. Static pressure measurement experiments are done to estimate the sensing performance. The results show that the SU-8 based sensor has a sensitivity of 154.8 nm/kP a, which is much higher than that of silica based sensor under the same condition. Moreover, the sensor is demonstrated successfully to detect ultrasound from electrode discharge.

1.5μm, 8×12.5Gb/s of hybrid-integrated TOSA with isolators and ROSA for 100GbE application

Compact transmitter and receiver optical sub-assemblies（TOSA and ROSA） are fabricated in our laboratory and have an aggregated capacity of 100 Gb/s. Specially, directly modulated laser（DML） drivers with two layers of electrical circuit boards are designed to inject RF signals and bias currents separately. For all the lanes, the3 dB bandwidth of the cascade of the TOSA and ROSA exceeds 9 GHz, which allows the 12.5 Gb/s operation.With the 12.5 Gb/s × 8-lane operation, clear eye diagrams for back-to-back and 30-km amplified transmission with a dispersion compensation fiber are achieved. Low cost and simple processing technology make it possible to realize commercial production.

Acoustic emission detection using intensity-modulated DFB fiber laser sensor

The bonded distributed feedback（DFB） fiber laser（FL） acoustic emission sensor and the intensity response of the DFB-FL to external acoustic emissions are investigated. The dynamic sensitivity of the DFB-FL is calibrated by a referenced piezoelectric receiver. In the DFB-FL we used here, the minimum detectable signal is2 × 10^（-6）m∕s at 5 kHz. Using wavelet packet technology, the collected signals are analyzed, which confirms that an intensity-modulated DFB-FL sensor can be used to detect acoustic emission signals.

Design and analysis of an energy-efficient O-QPSK coherent IR-UWB transceiver with a 0.52° RMS phase-noise fractional synthesizer

This paper explores an energy-efficient pulsed ultra-wideband（UWB） radio-frequency（RF） front-end chip fabricated in 0.18-μm CMOS technology, including a transmitter, receiver, and fractional synthesizer. The transmitter adopts a digital offset quadrature phase-shift keying（O-QPSK） modulator and passive direct-phase multiplexing technology, which are energy-and hardware-efficient, to enhance the data rate for a given spectrum.A passive mixer and a capacitor cross-coupled（CCC） source-follower driving amplifier（DA） are also designed for the transmitter to further reduce the low power consumption. For the receiver, a power-aware low-noise amplifier（LNA） and a quadrature mixer are applied. The LNA adopts a CCC boost common-gate amplifier as the input stage, and its current is reused for the second stage to save power. The mixer uses a shared amplification stage for the following passive IQ mixer. Phase noise suppression of the phase-locked loop（PLL） is achieved by utilizing an even-harmonics-nulled series-coupled quadrature oscillator（QVCO） and an in-band noise-aware charge pump（CP） design. The transceiver achieves a measured data rate of 0.8 Gbps with power consumption of 16 m W and31.5 m W for the transmitter and the receiver, respectively. The optimized integrated phase noise of the PLL is0.52° at 4.025 GHz.