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用于高速逻辑电路优化的改进Retiming算法 被引量:1
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作者 申旦 林争辉 《计算机辅助设计与图形学学报》 EI CSCD 北大核心 2001年第6期481-484,共4页
时序重排是一种同步时序电路性能优化的重要方法 .文中提出了一种改进时序重排算法 ,使时序重排可以更有效地与其它组合优化算法结合起来 ,共同提高同步时序电路的速度 .在各种不同的测试电路上得到的实验结果显示 ,这种算法在与其它组... 时序重排是一种同步时序电路性能优化的重要方法 .文中提出了一种改进时序重排算法 ,使时序重排可以更有效地与其它组合优化算法结合起来 ,共同提高同步时序电路的速度 .在各种不同的测试电路上得到的实验结果显示 ,这种算法在与其它组合优化方法的结合上 。 展开更多
关键词 时序重排 超大规模集成电路 retiming算法 逻辑综合器综合 优化
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Incremental Min-Period Retiming Algorithm for FPGA Synthesis Based on Influence of Fan-Outs
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作者 郝亚男 杨海钢 +2 位作者 崔秀海 谭宜涛 路宝珠 《Transactions of Tianjin University》 EI CAS 2012年第4期259-265,共7页
An improved linear-time retiming algorithm is proposed to incrementally optimize the clock period, espe cially considering the influence of the in-out degree of the critical combinational elements. Firslly, the critic... An improved linear-time retiming algorithm is proposed to incrementally optimize the clock period, espe cially considering the influence of the in-out degree of the critical combinational elements. Firslly, the critical elements are selected from all the critical combinational elements to retime. Secondly, for the nodes that cannot be performed with such retiming, register sharing is implemented while the path delay is kept unchanged. The incremental algorithm can be applied with the technology mapping to minimize the critical path delay and obtain fewer registers in the re- timed circuit with the near-optimal clock period. Compared with Singh's incremental algorithm, experiments show that the proposed algorithm can reduce the flip-flop count by 11% and look-up table (LUT) count by 5% while improv- ing the minimum clock period by 6%. The runtime is also reduced by 9% of the design flow. 展开更多
关键词 linear-time retiming sequential optimization sharing register field programmable gate array (FPGA)
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Research and Implementation of SDH Retiming Mechanism
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作者 周联红 《High Technology Letters》 EI CAS 2001年第3期11-14,共4页
The research and implementation of SDH retiming mechanism were discussed. SDH system is more cost effective than PDH system for high bit rates. In SDH network, transport network channel have timing transparency when t... The research and implementation of SDH retiming mechanism were discussed. SDH system is more cost effective than PDH system for high bit rates. In SDH network, transport network channel have timing transparency when transporting PDH signals between two devices having similar interfaces. It is found that the implementation of SDH in the telecommunication networks improves the quality of mobile telecommunication. 展开更多
关键词 SDH SYNCHRONIZATION retiming FIFO
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基于动态可重构FPGA的容错技术研究 被引量:5
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作者 张超 刘峥 赵伟 《电子科技》 2011年第1期102-105,108,共5页
针对重构文件的大小、动态容错时隙的长短、实现的复杂性、模块间通信方式、冗余资源的比例与布局等关键问题进行了分析。并对一些突出问题,提出了基于算法和资源多级分块的解决方法,阐述了新方法的性能,及其具有的高灵活性高、粒度等... 针对重构文件的大小、动态容错时隙的长短、实现的复杂性、模块间通信方式、冗余资源的比例与布局等关键问题进行了分析。并对一些突出问题,提出了基于算法和资源多级分块的解决方法,阐述了新方法的性能,及其具有的高灵活性高、粒度等参数可选择、重构布线可靠性高、系统工作频率有保障的优点。 展开更多
关键词 容错 动态重构 retiming STARS
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一种快速带环数据流图的流水线调度算法
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作者 杨大宇 林争辉 《上海交通大学学报》 EI CAS CSCD 北大核心 2002年第12期1717-1720,1726,共5页
在带反馈环的数据流图的高层次综合调度中 ,提出了一种基于时间约束并考虑资源约束的调度算法 .该算法利用了数据流图中的迭代内及迭代间的优先约束 ,采用 retiming和流水线操作来进行并行的构造调度 .提出的基于待调度节点的 retiming... 在带反馈环的数据流图的高层次综合调度中 ,提出了一种基于时间约束并考虑资源约束的调度算法 .该算法利用了数据流图中的迭代内及迭代间的优先约束 ,采用 retiming和流水线操作来进行并行的构造调度 .提出的基于待调度节点的 retiming算法可以缩短常规的对调度空间搜索最优解的时间 ,从而快速地完成满足时间和空间约束的调度 . 展开更多
关键词 流水线调度算法 高层次综合调度 数据流图 反馈环 流水线操作 retiming算法 最优解
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Integrated Performance Measures for Bus Rapid Transit System and Traffic Signal Systems Using Trajectory Data
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作者 Jijo Kulathintekizhakethil Mathew Howell Li +2 位作者 Enrique Saldivar-Carrranza Matthew Duffy Darcy Michael Bullock 《Journal of Transportation Technologies》 2022年第4期833-860,共28页
Bus rapid transit (BRT) systems have been implemented in many cities over the past two decades. Widespread adoption of General Transit Feed Specification (GTFS), the deployment of high-fidelity bus GPS data tracking, ... Bus rapid transit (BRT) systems have been implemented in many cities over the past two decades. Widespread adoption of General Transit Feed Specification (GTFS), the deployment of high-fidelity bus GPS data tracking, and anonymized high-fidelity connected vehicle data from private vehicles have provided new opportunities for performance measures that can be used by both transit agencies and traffic signal system operators. This paper describes the use of trajectory-based data to develop performance measures for a BRT system in Indianapolis, Indiana. Over 3 million data records during the 3-month period between March and May 2022 are analyzed to develop visualizations and performance metrics. A methodology to estimate the average delay and schedule adherence is presented along a route comprised of 74 signals and 28 bus stations. Additionally, this research demonstrates how these performance measures can be used to evaluate dedicated and non-dedicated bus lanes with general traffic. Travel times and reliability of buses are compared with nearly 30 million private vehicle trips. Results show that median travel time for buses on dedicated bi-directional lanes is within one minute of general traffic and during peak periods the buses are often faster. Schedule adherence was observed to be more challenging, with approximately 3% of buses arriving within 1 minute on average during the 5AM hour and 5% of buses arriving 6 - 9 minutes late during the 5PM hour. The framework and performance measures presented in this research provide agencies and transportation professionals with tools to identify opportunities for adjustments and to justify investment decisions. 展开更多
关键词 Connected Vehicle Trajectory Bus Rapid Transit Performance Traffic Signal retiming Schedules
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利用SDH网络建立统一的同步网传送、分配平台
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作者 杨利刚 《电信建设》 2002年第6期48-53,共6页
讨论了北京通信同步网的发 展过程和现状、对现有PDH传送同 步信号的方式与SDH传送同步信号 的方式进行了比较、论述。提出了 利用SDH设备的Retiming功能,在SDH 传输系统上建立统一的同步网传 送、分配平台的观点。
关键词 同步网传送 同步网 PDH SDH retiming 同步网分配 同步数字体系
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U.2 NVMe SSD热插拔导致服务器蓝屏死机的解决方案 被引量:1
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作者 王爱梅 胡泽志 郑洪涛 《电子技术与软件工程》 2019年第18期135-136,共2页
本文将探索一种在服务器运行状态下热拔除固体硬盘,而能够避免蓝屏死机的方案。希望对U.2 NVMe SSD热插拔方案在服务器上的应用推广起到一定的帮助。
关键词 U.2 NVMe SSD 热插拔 retimer卡 NVMeswitch卡 hotplug
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Calaulation of Time-Optimal Control Law for Double Integrator System with Complex Constraints: Endpoint Backward Method
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作者 朱强 刘利频 +1 位作者 尹传忠 徐建闽 《Journal of Southwest Jiaotong University(English Edition)》 2006年第3期234-237,共4页
An endpoint backward method is proposed to calculate the time-optimal control law of double integrator system. First, the time intervals between the switch points and the endpoints are calculated. Then, the positions ... An endpoint backward method is proposed to calculate the time-optimal control law of double integrator system. First, the time intervals between the switch points and the endpoints are calculated. Then, the positions of switch points are decided according to the motion equation, and the switch line is formed. Theoretical analysis shows that this method can be used to solve the double integrator system with functional constraint target set and deal with the second order oscillation system. 展开更多
关键词 Time-opt/retimal control Bang-Bang control Double integrator system Endpoint backward
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面向高性能计算机光互连的低抖动Retimer电路
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作者 刘庆 王和明 +2 位作者 吕方旭 张庚 吕栋斌 《计算机工程与科学》 2024年第11期1940-1948,共9页
随着通信带宽的大幅提升,低抖动作为多场景应用中信号传输质量的关键指标,已成为信号完整性研究的重要方向。56 Gbaud的Retimer芯片是高性能计算机光互连数据传输的关键核心芯片,其抖动性能也制约着光模块高性能计算机的整体性能。针对... 随着通信带宽的大幅提升,低抖动作为多场景应用中信号传输质量的关键指标,已成为信号完整性研究的重要方向。56 Gbaud的Retimer芯片是高性能计算机光互连数据传输的关键核心芯片,其抖动性能也制约着光模块高性能计算机的整体性能。针对传统高速Retimer芯片抖动性能低的难题,首次提出了数据速率超过100 Gbps的低抖动Retimer电路。Retimer电路基于CDR+PLL架构,集成在光纤中继器中,具有均衡和全速率重定时功能;采用抖动消除的滤波电路,能在高噪声输入信号下取得良好的输出数据抖动性能,为解决传统Retimer直接采样转发导致输出数据抖动大的问题提供了技术支持。采用TSMC 28 nm CMOS工艺完成了基于CDR+PLL架构的低抖动Retimer电路设计。仿真结果表明,当输入112 Gbps PAM4时,Retimer的输出数据抖动为741 fs,相比于传统Retimer结构降低了31.4%。 展开更多
关键词 Retimer电路 时钟数据恢复(CDR) 锁相环(PLL) 低抖动
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Recent advances in traffic signal performance evaluation 被引量:5
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作者 Dallas Leitner Piro Meleby Lei Miao 《Journal of Traffic and Transportation Engineering(English Edition)》 EI CSCD 2022年第4期507-531,共25页
Signal retiming is a prominent way that transportation agencies use to fight congestion and change of traffic pattern.Performance evaluations of traffic conditions at signalized intersections and arterials provide act... Signal retiming is a prominent way that transportation agencies use to fight congestion and change of traffic pattern.Performance evaluations of traffic conditions at signalized intersections and arterials provide actionable data for agencies to make well-informed and prioritized signal retiming decisions.However,the abundance of data sources,the lack of standardized evaluation methods and oftentimes the shortage of resources make it a difficult endeavor.The review detailed in this paper examines the advances made in traffic signal performance evaluation.We establish the necessity for the evaluations,study the process of continuous improvement of traffic signal performance using the evaluations,and then examine multiple methodologies in a plethora of research endeavors.Particularly,we focus on probe vehicles and sensors data,the two major sources of data.We discuss how sensors are connected to signal controllers to provide relevant in-depth traffic data including speed and occupancy measures.We also review the nature of probe vehicles and the level of penetration.We then define and summarize performance measures derived from both sources,to aid in performance evaluations.For performance evaluation methods,we discuss the research studies and provide summaries including advantages and disadvantages of the methods used,as well as a holistic outlook for future research.This paper is aimed to provide a comprehensive review on the state-of-the-art to benefit researcher,traffic agencies,and commercial entities that thrive to improve safety and efficiency of traffic signals through performance evaluations. 展开更多
关键词 Intelligent transportation systems Traffic signal performance evaluation Traffic signal retiming Traffic signals optimization Intersection control evaluation
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