In this paper,a new scheme for image encryption is presented by reversible cellular automata.The presented scheme is applied in three individual steps.Firstly,the image is blocked and the pixels are substituted by a r...In this paper,a new scheme for image encryption is presented by reversible cellular automata.The presented scheme is applied in three individual steps.Firstly,the image is blocked and the pixels are substituted by a reversible cellular automaton.Then,image pixels are scrambled by an elementary cellular automata and finally the blocks are attached and pixels are substituted by an individual reversible cellular automaton.Due to reversibility of used cellular automata,decryption scheme can reversely be applied.The experimental results show that encrypted image is suitable visually and this scheme has satisfied quantitative performance.展开更多
Wireless Multimedia Sensor Network (WMSN) is an advancement of Wireless Sensor Network (WSN) that encapsulates WSN with multimedia information like image and video. The primary factors considered in the design and dep...Wireless Multimedia Sensor Network (WMSN) is an advancement of Wireless Sensor Network (WSN) that encapsulates WSN with multimedia information like image and video. The primary factors considered in the design and deployment of WSN are low power consumption, high speed and memory requirements. Security is indeed a major concern, in any communication system. Consequently, design of compact and high speed WMSN with cryptography algorithm for security, without compromising on sensor node performance is a challenge and this paper proposes a new lightweight symmetric key encryption algorithm based on 1 D cellular automata theory. Simulations are performed using MatLab and synthesized using Xilinx ISE. The proposed approach supports both software and hardware implementation and provides better performance compared to other existing algorithms in terms of number of slices, throughput and other hardware utilization.展开更多
Reversible logic has recently gained significant interest due to its inherent ability to reduce energy dissipation,which is the primary need for low-power digital circuits.One of the newest areas of relevant study is ...Reversible logic has recently gained significant interest due to its inherent ability to reduce energy dissipation,which is the primary need for low-power digital circuits.One of the newest areas of relevant study is reversible logic,which has applications in many areas,including nanotechnology,DNA computing,quantum computing,fault tolerance,and low-power complementary metal-oxide-semiconductor(CMOS).An electrical circuit is classified as reversible if it has an equal number of inputs and outputs,and a one-to-one relationship.A reversible circuit is conservative if the EXOR of the inputs and the EXOR of the outputs are equivalent.In addition,quantum-dot cellular automata(QCA)is one of the state-of-the-art approaches that can be used as an alternative to traditional technologies.Hence,we propose an efficient conservative gate with low power demand and high speed in this paper.First,we present a reversible gate called ANG(Ahmadpour Navimipour Gate).Then,two non-resistant QCA ANG and reversible fault-tolerant ANG structures are implemented in QCA technology.The suggested reversible gate is realized through the Miller algorithm.Subsequently,reversible fault-tolerant ANG is implemented by the 2DW clocking scheme.Furthermore,the power consumption of the suggested ANG is assessed under different energy ranges(0.5Ek,1.0Ek,and 1.5Ek).Simulations of the structures and analysis of their power consumption are performed using QCADesigner 2.0.03 and QCAPro software.The proposed gate shows great improvements compared to recent designs.展开更多
Designing logic circuits using complementary metal-oxide-semiconductor(CMOS)technology at the nano scale has been faced with various challenges recently.Undesirable leakage currents,the short-effect channel,and high e...Designing logic circuits using complementary metal-oxide-semiconductor(CMOS)technology at the nano scale has been faced with various challenges recently.Undesirable leakage currents,the short-effect channel,and high energy dissipation are some of the concerns.Quantum-dot cellular automata(QCA)represent an appropriate alternative for possible CMOS replacement in the future because it consumes an insignificant amount of energy compared to the standard CMOS.The key point of designing arithmetic circuits is based on the structure of a 1-bit full adder.A low-complexity full adder block is beneficial for developing various intricate structures.This paper represents scalable 1-bit QCA full adder structures based on cell interaction.Our proposed full adders encompass preference aspects of QCA design,such as a low number of cells used,low latency,and small area occupation.Also,the proposed structures have been expanded to larger circuits,including a 4-bit ripple carry adder(RCA),a 4-bit ripple borrow subtractor(RBS),an add/sub circuit,and a 2-bit array multiplier.All designs were simulated and verified using QCA Designer-E version 2.2.This tool can estimate the energy dissipation as well as evaluate the performance of the circuits.Simulation results showed that the proposed designs are efficient in complexity,area,latency,cost,and energy dissipation.展开更多
文摘In this paper,a new scheme for image encryption is presented by reversible cellular automata.The presented scheme is applied in three individual steps.Firstly,the image is blocked and the pixels are substituted by a reversible cellular automaton.Then,image pixels are scrambled by an elementary cellular automata and finally the blocks are attached and pixels are substituted by an individual reversible cellular automaton.Due to reversibility of used cellular automata,decryption scheme can reversely be applied.The experimental results show that encrypted image is suitable visually and this scheme has satisfied quantitative performance.
文摘Wireless Multimedia Sensor Network (WMSN) is an advancement of Wireless Sensor Network (WSN) that encapsulates WSN with multimedia information like image and video. The primary factors considered in the design and deployment of WSN are low power consumption, high speed and memory requirements. Security is indeed a major concern, in any communication system. Consequently, design of compact and high speed WMSN with cryptography algorithm for security, without compromising on sensor node performance is a challenge and this paper proposes a new lightweight symmetric key encryption algorithm based on 1 D cellular automata theory. Simulations are performed using MatLab and synthesized using Xilinx ISE. The proposed approach supports both software and hardware implementation and provides better performance compared to other existing algorithms in terms of number of slices, throughput and other hardware utilization.
文摘Reversible logic has recently gained significant interest due to its inherent ability to reduce energy dissipation,which is the primary need for low-power digital circuits.One of the newest areas of relevant study is reversible logic,which has applications in many areas,including nanotechnology,DNA computing,quantum computing,fault tolerance,and low-power complementary metal-oxide-semiconductor(CMOS).An electrical circuit is classified as reversible if it has an equal number of inputs and outputs,and a one-to-one relationship.A reversible circuit is conservative if the EXOR of the inputs and the EXOR of the outputs are equivalent.In addition,quantum-dot cellular automata(QCA)is one of the state-of-the-art approaches that can be used as an alternative to traditional technologies.Hence,we propose an efficient conservative gate with low power demand and high speed in this paper.First,we present a reversible gate called ANG(Ahmadpour Navimipour Gate).Then,two non-resistant QCA ANG and reversible fault-tolerant ANG structures are implemented in QCA technology.The suggested reversible gate is realized through the Miller algorithm.Subsequently,reversible fault-tolerant ANG is implemented by the 2DW clocking scheme.Furthermore,the power consumption of the suggested ANG is assessed under different energy ranges(0.5Ek,1.0Ek,and 1.5Ek).Simulations of the structures and analysis of their power consumption are performed using QCADesigner 2.0.03 and QCAPro software.The proposed gate shows great improvements compared to recent designs.
文摘Designing logic circuits using complementary metal-oxide-semiconductor(CMOS)technology at the nano scale has been faced with various challenges recently.Undesirable leakage currents,the short-effect channel,and high energy dissipation are some of the concerns.Quantum-dot cellular automata(QCA)represent an appropriate alternative for possible CMOS replacement in the future because it consumes an insignificant amount of energy compared to the standard CMOS.The key point of designing arithmetic circuits is based on the structure of a 1-bit full adder.A low-complexity full adder block is beneficial for developing various intricate structures.This paper represents scalable 1-bit QCA full adder structures based on cell interaction.Our proposed full adders encompass preference aspects of QCA design,such as a low number of cells used,low latency,and small area occupation.Also,the proposed structures have been expanded to larger circuits,including a 4-bit ripple carry adder(RCA),a 4-bit ripple borrow subtractor(RBS),an add/sub circuit,and a 2-bit array multiplier.All designs were simulated and verified using QCA Designer-E version 2.2.This tool can estimate the energy dissipation as well as evaluate the performance of the circuits.Simulation results showed that the proposed designs are efficient in complexity,area,latency,cost,and energy dissipation.
