An Extended Approach for Generating Unitary Matrices for Quantum Circuits

In this paper,we do research on generating unitary matrices for quantum circuits automatically.We consider that quantum circuits are divided into six types,and the unitary operator expressions for each type are offered.Based on this,we propose an algorithm for computing the circuit unitary matrices in detail.Then,for quantum logic circuits composed of quantum logic gates,a faster method to compute unitary matrices of quantum circuits with truth table is introduced as a supplement.Finally,we apply the proposed algorithm to different reversible benchmark circuits based on NCT library(including NOT gate,Controlled-NOT gate,Toffoli gate)and generalized Toffoli(GT)library and provide our experimental results.

Design and Implementation of Efficient Reversible Arithmetic and Logic Unit

In computing architecture, ALU plays a major role. Many promising applications are possible with ATMEGA microcontroller. ALU is a part of these microcontrollers. The performance of these microcontrollers can be improved by applying Reversible Logic and Vedic Mathematics. In this paper, an efficient reversible Arithmetic and Logic Unit with reversible Vedic Multiplier is proposed and the simulation results show its effectiveness in reducing quantum cost, number of gates, and the total number of logical calculations.

Design and Implementation of an Efficient Reversible Comparator Using TR Gate

Reversible logic is a new emerging technology with many promising applications in optical information processing, low power (Complementary Metal Oxide Semiconductor) CMOS design, (De Oxy RiboNucleic Acid) DNA computing, etc. In industrial automation, comparators play an important role in segregating faulty patterns from good ones. In previous works, these comparators have been implemented with more number of reversible gates and computational complexity. All these comparators use propagation technique to compare the data. This will reduce the efficiency of the comparators. To overcome the problem, this paper proposes an efficient comparator using (Thapliyal Ranganathan) TR gate utilizing full subtraction and half subtraction algorithm which will improve the computation efficiency. The comparator design using half subtraction algorithm shows an improvement in terms of quantum cost. The comparator design using full subtraction algorithm shows effectiveness in reducing number of reversible gates required and garbage output.

Programming cell entry of molecules via reversible synthetic DNA circuits on cell membrane

Cellular uptake of biomolecules is crucial for regulating cell function.However,powerful and biocompatible tools for dynamically manipulating the cell entry of single-stranded DNAs(ssDNAs)remain elusive.Herein,we constructed synthetic DNA circuits on the cell membrane to program the cell entry of ssDNAs,using toehold-mediated DNA strand displacement reactions.We found that the dimerization and trimerization of cholesterol-ssDNAs enhanced membrane-anchoring and cellular uptake of ssDNAs.Moreover,we demonstrated that de-dimerization and de-trimerization of cholesterol-ssDNAs could be accomplished by inputting recovery ssDNAs into the synthetic DNA circuits,which could simultaneously decrease the cellular uptake of ssDNAs.We speculate that operating the synthetic DNA circuits on the cell membrane will be a powerful strategy for regulating the cellular uptake of exogenous materials,which has important implications for bioimaging,drug delivery,and gene therapy.