Chip designers employ computer-aided design,circuit simulation,and design rule check systems.Lithography engineers employ model-based OPC(Optical Proximity Correction)and model-based print-simulation systems.Reticle i...Chip designers employ computer-aided design,circuit simulation,and design rule check systems.Lithography engineers employ model-based OPC(Optical Proximity Correction)and model-based print-simulation systems.Reticle inspection teams employ Aerial Image Measurement Systems®and Virtual Stepper®Systems.These teams are accustomed to evaluating and deploying state-of-the-art computational systems.When real-silicon fabrication begins,however,the teams responsible for line monitoring,wafer inspection,and yield attainment operate without the benefit of similarly advanced computational systems.In this paper we describe such a system and explore its applications and benefits.The system has received three U.S.patents[1-3]and brings together the significant potential of CAD(Computer Aided Design)layout(GDS,OASIS),Die-to-Database,and Machine Learning to build a dynamic,self-improving computational system.Featuring care area generation,advanced machine learning-based SEM(Scanning Electron Microscope)sampling that optimizes both DOI(Defect of Interest)capture rate and discovery of new defect types,comprehensive extraction of all Information of Interest(IOI)from all SEM images,detection of defect types not possible before,massive pattern fidelity analysis,full chip pattern decomposition and risk scoring via machine learning,innovative PWQ(Process Window Qualification)analysis and process window determination,risk assessment of new tape-outs,large scale in-wafer OPC verification and more,the system delivers a comprehensive pattern centric platform for process technology development and manufacturing.展开更多
Purpose–Over the past decade,the cost of product development has increased drastically,and this is due to the inability of most enterprises to locate suitable and optimal collaborators for knowledge sharing.Neverthel...Purpose–Over the past decade,the cost of product development has increased drastically,and this is due to the inability of most enterprises to locate suitable and optimal collaborators for knowledge sharing.Nevertheless,knowledge sharing is a mechanism that helps people find the best collaborators with relevant knowledge.Hence,a new approach for locating optimal collaborators with relevant knowledge is needed,which couldhelp enterprisein reducingcost andtime ina knowledge-sharingenvironment.Thepaper aimsto discuss these issues.Design/methodology/approach–One unique challenge in the domain of knowledge sharing is that collaborators do not possess the same number of events resident in the knowledge available for sharing.In this paper,the authors present a new approach for locating optimal collaborators in knowledge-sharing environment using the combinatorial algorithm(CA-KSE).Findings–The proposed pattern-matching approach implemented in Java is considered efficient for solving the issue peculiar to collaboration in knowledge-sharing domain.The authors benchmarked the proposed approach with its semi-global pairwise alignment and global alignment counterparts through scores comparison and the receiver operating characteristic curve.The results obtained from the comparisons showedthat CA-KSEis a perfect test havinganarea undercurveof 0.9659,comparedto the other approaches.Research limitations/implications–The paper has proposed an efficient algorithm,which is considered better than related methods,for matching several collaborators(more than two)in KS environment.The method could be deployed in medical field for gene analysis,software organizations for distributed development and academics for knowledge sharing.Originality/value–One sign of strength of this approach,compared to most sequence alignment approaches that can only match two collaborators at a time,is that it can match several collaborators at a faster rate.展开更多
文摘Chip designers employ computer-aided design,circuit simulation,and design rule check systems.Lithography engineers employ model-based OPC(Optical Proximity Correction)and model-based print-simulation systems.Reticle inspection teams employ Aerial Image Measurement Systems®and Virtual Stepper®Systems.These teams are accustomed to evaluating and deploying state-of-the-art computational systems.When real-silicon fabrication begins,however,the teams responsible for line monitoring,wafer inspection,and yield attainment operate without the benefit of similarly advanced computational systems.In this paper we describe such a system and explore its applications and benefits.The system has received three U.S.patents[1-3]and brings together the significant potential of CAD(Computer Aided Design)layout(GDS,OASIS),Die-to-Database,and Machine Learning to build a dynamic,self-improving computational system.Featuring care area generation,advanced machine learning-based SEM(Scanning Electron Microscope)sampling that optimizes both DOI(Defect of Interest)capture rate and discovery of new defect types,comprehensive extraction of all Information of Interest(IOI)from all SEM images,detection of defect types not possible before,massive pattern fidelity analysis,full chip pattern decomposition and risk scoring via machine learning,innovative PWQ(Process Window Qualification)analysis and process window determination,risk assessment of new tape-outs,large scale in-wafer OPC verification and more,the system delivers a comprehensive pattern centric platform for process technology development and manufacturing.
文摘Purpose–Over the past decade,the cost of product development has increased drastically,and this is due to the inability of most enterprises to locate suitable and optimal collaborators for knowledge sharing.Nevertheless,knowledge sharing is a mechanism that helps people find the best collaborators with relevant knowledge.Hence,a new approach for locating optimal collaborators with relevant knowledge is needed,which couldhelp enterprisein reducingcost andtime ina knowledge-sharingenvironment.Thepaper aimsto discuss these issues.Design/methodology/approach–One unique challenge in the domain of knowledge sharing is that collaborators do not possess the same number of events resident in the knowledge available for sharing.In this paper,the authors present a new approach for locating optimal collaborators in knowledge-sharing environment using the combinatorial algorithm(CA-KSE).Findings–The proposed pattern-matching approach implemented in Java is considered efficient for solving the issue peculiar to collaboration in knowledge-sharing domain.The authors benchmarked the proposed approach with its semi-global pairwise alignment and global alignment counterparts through scores comparison and the receiver operating characteristic curve.The results obtained from the comparisons showedthat CA-KSEis a perfect test havinganarea undercurveof 0.9659,comparedto the other approaches.Research limitations/implications–The paper has proposed an efficient algorithm,which is considered better than related methods,for matching several collaborators(more than two)in KS environment.The method could be deployed in medical field for gene analysis,software organizations for distributed development and academics for knowledge sharing.Originality/value–One sign of strength of this approach,compared to most sequence alignment approaches that can only match two collaborators at a time,is that it can match several collaborators at a faster rate.