In this work,two process-variation-tolerant schemes for a current-mode sense amplifier(CSA)of RRAM were proposed:(1)hybrid read reference generator(HRRG)that tracks process-voltage-temperature(PVT)variations and solve...In this work,two process-variation-tolerant schemes for a current-mode sense amplifier(CSA)of RRAM were proposed:(1)hybrid read reference generator(HRRG)that tracks process-voltage-temperature(PVT)variations and solve the nonlinear issue of the RRAM cells;(2)a two-stage offset-cancelled current sense amplifier(TSOCC-SA)with only two capacitors achieves a double sensing margin and a high tolerance of device mismatch.The simulation results in 28 nm CMOS technology show that the HRRG can provide a read reference that tracks PVT variations and solves the nonlinear issue of the RRAM cells.The proposed TSOCC-SA can tolerate over 64% device mismatch.展开更多
A novel asymmetrical current-based sensing scheme for 1T1C FRAM is proposed,in which the two input transistors are not the same size and a feedback NMOS is added at the reference side of the sense amplifier.Compared w...A novel asymmetrical current-based sensing scheme for 1T1C FRAM is proposed,in which the two input transistors are not the same size and a feedback NMOS is added at the reference side of the sense amplifier.Compared with the conventional symmetrical scheme in Ref.[8],the proposed scheme increases the sense margin of the readout current by 53.9%and decreases the sensing power consumption by 14.1%,at the cost of an additional 7.89%area of the sensing scheme.An experimental FRAM prototype utilizing the proposed asymmetrical scheme is implemented in a 0.35μm three metal process,in which the function of the prototype is verified.展开更多
基金supported in part by the National Key R&D Program of China under Grant No.2019YFB2204800in part by the Major Scientific Research Project of Zhejiang Lab(Grant No.2019KC0AD02)+1 种基金in part by the National Natural Science Foundation of China under Grants 61904200the Strategic Priority Research Program of the Chinese Academy of Sciences under Grant No.XDB44000000。
文摘In this work,two process-variation-tolerant schemes for a current-mode sense amplifier(CSA)of RRAM were proposed:(1)hybrid read reference generator(HRRG)that tracks process-voltage-temperature(PVT)variations and solve the nonlinear issue of the RRAM cells;(2)a two-stage offset-cancelled current sense amplifier(TSOCC-SA)with only two capacitors achieves a double sensing margin and a high tolerance of device mismatch.The simulation results in 28 nm CMOS technology show that the HRRG can provide a read reference that tracks PVT variations and solves the nonlinear issue of the RRAM cells.The proposed TSOCC-SA can tolerate over 64% device mismatch.
基金Project supported by the National High Technology Research and Development Program of China(No.2009AA01Z115)the Key National Science and Technology Specific Project of China(No.2009ZX02023-1-3)
文摘A novel asymmetrical current-based sensing scheme for 1T1C FRAM is proposed,in which the two input transistors are not the same size and a feedback NMOS is added at the reference side of the sense amplifier.Compared with the conventional symmetrical scheme in Ref.[8],the proposed scheme increases the sense margin of the readout current by 53.9%and decreases the sensing power consumption by 14.1%,at the cost of an additional 7.89%area of the sensing scheme.An experimental FRAM prototype utilizing the proposed asymmetrical scheme is implemented in a 0.35μm three metal process,in which the function of the prototype is verified.
