In order to support massive Machine Type Communication(mMTC) applications in future Fifth Generation(5G) systems,a key technical challenge is to design a highly effective multiple access protocol for massive connectio...In order to support massive Machine Type Communication(mMTC) applications in future Fifth Generation(5G) systems,a key technical challenge is to design a highly effective multiple access protocol for massive connection requests and huge traffic load from all kinds of smart devices,e.g.bike,watch,phone,ring,glasses,shoes,etc..To solve this hard problem in distributed scenarios with massive competing devices,this paper proposes and evaluates a Neighbor-Aware Multiple Access(NAMA) protocol,which is scalable and adaptive to different connectivity size and traffic load.By exploiting acknowledgement signals broadcasted from the neighboring devices with successful packet transmissions,NAMA is able to turn itself from a contention-based random access protocol to become a contention-free deterministic access protocol with particular transmission schedules for all neighboring devices after a short transition period.The performance of NAMA is fully evaluated from random state to deterministic state through extensive computer simulations under different network sizes and Contention Window(CW)settings.Compared with traditional IEEE802.11 Distributed Coordination Function(DCF),for a crowded network with 50 devices,NAMA can greatly improve system throughput and energy efficiency by more than 110%and210%,respectively,while reducing average access delay by 53%in the deterministic state.展开更多
---Double data rate synchronous dynamic random access memory （DDR3） has become one of the most mainstream applications in current server and computer systems. In order to quickly set up a system-level signal integri...---Double data rate synchronous dynamic random access memory （DDR3） has become one of the most mainstream applications in current server and computer systems. In order to quickly set up a system-level signal integrity （SI） simulation flow for the DDR3 interface, two system-level SI simulation methodologies, which are board-level S-parameter extraction in the frequency-domain and system-level simulation assumptions in the time domain, are introduced in this paper. By comparing the flow of Speed2000 and PowerSI/Hspice, PowerSI is chosen for the printed circuit board （PCB） board-level S-parameter extraction, while Tektronix oscilloscope （TDS7404） is used for the DDR3 waveform measurement. The lab measurement shows good agreement between simulation and measurement. The study shows that the combination of PowerSI and Hspice is recommended for quick system-level DDR3 SI simulation.展开更多
基金funded by the National Natural Science Foundation of China (Grant No.61231009)the National HighTech R&D Program of China(863)(Grant No.2014AA01A701)+5 种基金the National Science and Technology Major Project(Grant No. 2015ZX03001033-003)Ministry of Science and Technology International Cooperation Project(Grant No.2014DFE10160)the Science and Technology Commission of Shanghai Municipality(Grant No.14ZR1439600)the EU H2020 5G Wireless project(Grant No.641985)the EU FP7 QUICK project(Grant No. PIRSES-GA-2013-612652)the EPSRC TOUCAN project(Grant No.EP/L020009/1)
文摘In order to support massive Machine Type Communication(mMTC) applications in future Fifth Generation(5G) systems,a key technical challenge is to design a highly effective multiple access protocol for massive connection requests and huge traffic load from all kinds of smart devices,e.g.bike,watch,phone,ring,glasses,shoes,etc..To solve this hard problem in distributed scenarios with massive competing devices,this paper proposes and evaluates a Neighbor-Aware Multiple Access(NAMA) protocol,which is scalable and adaptive to different connectivity size and traffic load.By exploiting acknowledgement signals broadcasted from the neighboring devices with successful packet transmissions,NAMA is able to turn itself from a contention-based random access protocol to become a contention-free deterministic access protocol with particular transmission schedules for all neighboring devices after a short transition period.The performance of NAMA is fully evaluated from random state to deterministic state through extensive computer simulations under different network sizes and Contention Window(CW)settings.Compared with traditional IEEE802.11 Distributed Coordination Function(DCF),for a crowded network with 50 devices,NAMA can greatly improve system throughput and energy efficiency by more than 110%and210%,respectively,while reducing average access delay by 53%in the deterministic state.
基金supported by the National Natural Science Foundation of China under Grant No.61161001
文摘---Double data rate synchronous dynamic random access memory （DDR3） has become one of the most mainstream applications in current server and computer systems. In order to quickly set up a system-level signal integrity （SI） simulation flow for the DDR3 interface, two system-level SI simulation methodologies, which are board-level S-parameter extraction in the frequency-domain and system-level simulation assumptions in the time domain, are introduced in this paper. By comparing the flow of Speed2000 and PowerSI/Hspice, PowerSI is chosen for the printed circuit board （PCB） board-level S-parameter extraction, while Tektronix oscilloscope （TDS7404） is used for the DDR3 waveform measurement. The lab measurement shows good agreement between simulation and measurement. The study shows that the combination of PowerSI and Hspice is recommended for quick system-level DDR3 SI simulation.
