Slip on the surface of silicon wafers under laser irradiation:Scale effect

The slip mechanism on the surface of silicon wafers under laser irradiation was studied by numerical simulations and experiments. Firstly, the slip was explained by an analysis of the generalized stacking fault energy and the associated restoring forces. Activation of unexpected {110} slip planes was predicted to be a surface phenomenon. Experimentally,{110} slip planes were activated by changing doping concentrations of wafers and laser parameters respectively. Slip planes were {110} when slipping started within several atomic layers under the surface and turned into {111} with deeper slip.The scale effect was shown to be an intrinsic property of silicon.

Research on the Adsorption of Methylene Blue with Rice Husk Ash Aided by Ion Beam Etching Technique

[Objective] The aim was to study the mechanism of the removal effect of methylene blue(MB) by rice husk ash(RHA).[Method] The effects of contact time and pH on the adsorption of MB by rice husk ash were investigated,and the mechanism was discussed.[Result] RHA exhibited a remarkable ability on the adsorption of MB.The process of adsorption reached the equilibrium after 30 min,at about pH 9.The adsorption effect was explored with the aid of ion beam etching technique,which displayed that there were two main adsorption manners.One was the electrostatic interactions,through which the negatively charged RHA could adsorb the positively charged MB,the other was the porous effect due to the huge specific surface area of the micro/nano-scale porous silica in RHA,and MB could be adsorbed and deposited into the pores.[Conclusion] RHA could be used in the treatment of textile wastewater.Ion beam technology might be used as an effective way to investigate the adsorption effect.

Scaling dependence of memory windows and different carrier charging behaviors in Si nanocrystal nonvolatile memory devices

Based on the charge storage mode,it is important to investigate the scaling dependence of memory performance in silicon nanocrystal（Si-NC） nonvolatile memory（NVM） devices for its scaling down limit.In this work,we made eight kinds of test key cells with different gate widths and lengths by 0.13-μm node complementary metal oxide semiconductor（CMOS） technology.It is found that the memory windows of eight kinds of test key cells are almost the same of about1.64 V @ ±7 V/1 ms,which are independent of the gate area,but mainly determined by the average size（12 nm） and areal density（1.8×10^（11）/cm^2） of Si-NCs.The program/erase（P/E） speed characteristics are almost independent of gate widths and lengths.However,the erase speed is faster than the program speed of test key cells,which is due to the different charging behaviors between electrons and holes during the operation processes.Furthermore,the data retention characteristic is also independent of the gate area.Our findings are useful for further scaling down of Si-NC NVM devices to improve the performance and on-chip integration.