A novel structure of low-voltage trigger silicon-controlled rectifiers(LVTSCRs) with low trigger voltage and high holding voltage is proposed for electrostatic discharge(ESD) protection. The proposed ESD protection de...A novel structure of low-voltage trigger silicon-controlled rectifiers(LVTSCRs) with low trigger voltage and high holding voltage is proposed for electrostatic discharge(ESD) protection. The proposed ESD protection device possesses an ESD implant and a floating structure. This improvement enhances the current discharge capability of the gate-grounded NMOS and weakens the current gain of the silicon-controlled rectifier current path. According to the simulation results, the proposed device retains a low trigger voltage characteristic of LVTSCRs and simultaneously increases the holding voltage to 5.53 V, providing an effective way to meet the ESD protection requirement of the 5 V CMOS process.展开更多
A robust electron device called the enhanced gated-diode-triggered silicon-controlled rectifier (EGDTSCR) for electrostatic discharge (ESD) protection applications has been proposed and implemented in a 0.18-μm 5-V/2...A robust electron device called the enhanced gated-diode-triggered silicon-controlled rectifier (EGDTSCR) for electrostatic discharge (ESD) protection applications has been proposed and implemented in a 0.18-μm 5-V/24-V BCD process. The proposed EGDTSCR is constructed by adding two gated diodes into a conventional ESD device called the modified lateral silicon-controlled rectifier (MLSCR). With the shunting effect of the surface gated diode path, the proposed EGDTSCR, with a width of 50 μm, exhibits a higher failure current (i.e., 3.82 A) as well as a higher holding voltage (i.e., 10.21 V) than the MLSCR.展开更多
A novel polysilicon-assisted silicon-controlled rectifier （SCR） is presented and analyzed in this paper, which is fabricated in HHNEC＇s 0.18μm EEPROM process. The polysilicon-assisted SCRs take advantage of polysi...A novel polysilicon-assisted silicon-controlled rectifier （SCR） is presented and analyzed in this paper, which is fabricated in HHNEC＇s 0.18μm EEPROM process. The polysilicon-assisted SCRs take advantage of polysilicon layer to help bypass electro-static discharge （E S D） current without occupying extra layout area. TLP current-voltage （I-V） measurement results show that given the same layout areas, robustness performance of polysilicon-assisted SCRs can be improved to 3 times of conventional MLSCR＇s. Moreover, one-finger such polysilicon-assisted SCRs, which occupy only 947 [3mz layout area, can undergo 7-kV HBM ESD stress. Results further demonstrate that the S-type I-V characteristics of polysilicon-assisted SCRs are adjustable to different operating conditions by changing the device dimensions. Compared with traditional SCRs, this new SCR can bypass more ESD currents and consumes smaller IC area.展开更多
A novel dual direction silicon-controlled rectifier(DDSCR)with an additional P-type doping and gate(APGDDSCR)is proposed and demonstrated.Compared with the conventional low-voltage trigger DDSCR(LVTDDSCR)that has posi...A novel dual direction silicon-controlled rectifier(DDSCR)with an additional P-type doping and gate(APGDDSCR)is proposed and demonstrated.Compared with the conventional low-voltage trigger DDSCR(LVTDDSCR)that has positive and negative holding voltages of 13.371 V and 14.038 V,respectively,the new DDSCR has high positive and negative holding voltages of 18.781 V and 18.912 V in a single finger device,respectively,and it exhibits suitable enough positive and negative holding voltages of 14.60 V and 14.319 V in a four-finger device for±12-V application.The failure current of APGDDSCR is almost the same as that of LVT-DDSCR in the single finger device,and the four-finger APGDDSCR can achieve positive and negative human-body model(HBM)protection capabilities of 22.281 kV and 23.45 kV,respectively,under 40-V voltage of core circuit failure,benefitting from the additional structure.The new structure can generate a snapback voltage on gate A to increase the current gain of the parasitic PNP in holding voltage.Thus,a sufficiently high holding voltage increased by the structure can ensure that a multi-finger device can also reach a sufficient holding voltage,it is equivalent to solving the non-uniform triggering problem of multi-finger device.The operating mechanism and the gate voltage are both discussed and verified in two-dimensional(2D)simulation and experiemnt.展开更多
This paper presents a new phenomenon,where the holding-voltage of a silicon-controlled rectifier acts as an electrostatic-discharge protection drift in diverse film thicknesses in silicon-on-insulator（SOI） technolog...This paper presents a new phenomenon,where the holding-voltage of a silicon-controlled rectifier acts as an electrostatic-discharge protection drift in diverse film thicknesses in silicon-on-insulator（SOI） technology. The phenomenon was demonstrated through fabricated chips in 0.18μm SOI technology.The drift of the holding voltage was then simulated,and its mechanism is discussed comprehensively through ISE TCAD simulations.展开更多
基金supported by the National Natural Science Foundation of China (Grant No. 61904110)。
文摘A novel structure of low-voltage trigger silicon-controlled rectifiers(LVTSCRs) with low trigger voltage and high holding voltage is proposed for electrostatic discharge(ESD) protection. The proposed ESD protection device possesses an ESD implant and a floating structure. This improvement enhances the current discharge capability of the gate-grounded NMOS and weakens the current gain of the silicon-controlled rectifier current path. According to the simulation results, the proposed device retains a low trigger voltage characteristic of LVTSCRs and simultaneously increases the holding voltage to 5.53 V, providing an effective way to meet the ESD protection requirement of the 5 V CMOS process.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61874098 and 61974017)the Fundamental Research Project for Central Universities,China(Grant No.ZYGX2018J025).
文摘A robust electron device called the enhanced gated-diode-triggered silicon-controlled rectifier (EGDTSCR) for electrostatic discharge (ESD) protection applications has been proposed and implemented in a 0.18-μm 5-V/24-V BCD process. The proposed EGDTSCR is constructed by adding two gated diodes into a conventional ESD device called the modified lateral silicon-controlled rectifier (MLSCR). With the shunting effect of the surface gated diode path, the proposed EGDTSCR, with a width of 50 μm, exhibits a higher failure current (i.e., 3.82 A) as well as a higher holding voltage (i.e., 10.21 V) than the MLSCR.
文摘A novel polysilicon-assisted silicon-controlled rectifier （SCR） is presented and analyzed in this paper, which is fabricated in HHNEC＇s 0.18μm EEPROM process. The polysilicon-assisted SCRs take advantage of polysilicon layer to help bypass electro-static discharge （E S D） current without occupying extra layout area. TLP current-voltage （I-V） measurement results show that given the same layout areas, robustness performance of polysilicon-assisted SCRs can be improved to 3 times of conventional MLSCR＇s. Moreover, one-finger such polysilicon-assisted SCRs, which occupy only 947 [3mz layout area, can undergo 7-kV HBM ESD stress. Results further demonstrate that the S-type I-V characteristics of polysilicon-assisted SCRs are adjustable to different operating conditions by changing the device dimensions. Compared with traditional SCRs, this new SCR can bypass more ESD currents and consumes smaller IC area.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61774129,61827812,and 61704145)the Huxiang High-level Talent Gathering Project from the Hunan Science and Technology Department,China(Grant No.2019RS1037)the Changsha Science and Technology Plan Key Projects,China(Grant Nos.kq1801035 and kq1703001).
文摘A novel dual direction silicon-controlled rectifier(DDSCR)with an additional P-type doping and gate(APGDDSCR)is proposed and demonstrated.Compared with the conventional low-voltage trigger DDSCR(LVTDDSCR)that has positive and negative holding voltages of 13.371 V and 14.038 V,respectively,the new DDSCR has high positive and negative holding voltages of 18.781 V and 18.912 V in a single finger device,respectively,and it exhibits suitable enough positive and negative holding voltages of 14.60 V and 14.319 V in a four-finger device for±12-V application.The failure current of APGDDSCR is almost the same as that of LVT-DDSCR in the single finger device,and the four-finger APGDDSCR can achieve positive and negative human-body model(HBM)protection capabilities of 22.281 kV and 23.45 kV,respectively,under 40-V voltage of core circuit failure,benefitting from the additional structure.The new structure can generate a snapback voltage on gate A to increase the current gain of the parasitic PNP in holding voltage.Thus,a sufficiently high holding voltage increased by the structure can ensure that a multi-finger device can also reach a sufficient holding voltage,it is equivalent to solving the non-uniform triggering problem of multi-finger device.The operating mechanism and the gate voltage are both discussed and verified in two-dimensional(2D)simulation and experiemnt.
基金Project supported by the National Natural Science Foundation of China(No.60927006)
文摘This paper presents a new phenomenon,where the holding-voltage of a silicon-controlled rectifier acts as an electrostatic-discharge protection drift in diverse film thicknesses in silicon-on-insulator（SOI） technology. The phenomenon was demonstrated through fabricated chips in 0.18μm SOI technology.The drift of the holding voltage was then simulated,and its mechanism is discussed comprehensively through ISE TCAD simulations.
