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A low-power high-quality CMOS image sensor using 1.5 V 4T pinned photodiode and dual-CDS column-parallel single-slope ADC
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作者 Wenjing Xu Jie Chen +3 位作者 Zhangqu Kuang Li Zhou Ming Chen Chengbin Zhang 《Journal of Semiconductors》 EI CAS CSCD 2022年第8期53-59,共7页
This paper presents a low-power high-quality CMOS image sensor(CIS)using 1.5 V 4T pinned photodiode(4T-PPD)and dual correlated double sampling(dual-CDS)column-parallel single-slope ADC.A five-finger shaped pixel layer... This paper presents a low-power high-quality CMOS image sensor(CIS)using 1.5 V 4T pinned photodiode(4T-PPD)and dual correlated double sampling(dual-CDS)column-parallel single-slope ADC.A five-finger shaped pixel layer is proposed to solve image lag caused by low-voltage 4T-PPD.Dual-CDS is used to reduce random noise and the nonuniformity between columns.Dual-mode counting method is proposed to improve circuit robustness.A prototype sensor was fabricated using a 0.11μm CMOS process.Measurement results show that the lag of the five-finger shaped pixel is reduced by 80%compared with the conventional rectangular pixel,the chip power consumption is only 36 mW,the dynamic range is 67.3 dB,the random noise is only 1.55 e^(-)_(rms),and the figure-of-merit is only 1.98 e^(-)·nJ,thus realizing low-power and high-quality imaging. 展开更多
关键词 CMOS image sensor 4T pinned photodiode single-slope ADC correlated double sample counting method
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10-Bit Single-Slope ADC with Error Calibration for TDI CMOS Image Sensor
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作者 高岑 姚素英 +2 位作者 杨志勋 高静 徐江涛 《Transactions of Tianjin University》 EI CAS 2013年第4期300-306,共7页
A 10-bit single-slope analog-to-digital converter (ADC) for time-delay-integration CMOS image sensor was proposed. A programmable ramp generator was applied to accomplish the error calibration and improve the linearit... A 10-bit single-slope analog-to-digital converter (ADC) for time-delay-integration CMOS image sensor was proposed. A programmable ramp generator was applied to accomplish the error calibration and improve the linearity. The ADC was fabricated in a 180 nm 1P4M CMOS process. Experimental results indicate that the differential nonlinearity and integral nonlinearity were 0.51/-0.53 LSB and 0.63/-0.71 LSB, respectively. The sampling rate of the ADC was 32 kHz. 展开更多
关键词 single-slope ADC error calibration CMOS image sensor
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High Speed Column-Parallel CDS/ADC Circuit with Nonlinearity Compensation for CMOS Image Sensors
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作者 姚素英 杨志勋 +1 位作者 赵士彬 徐江涛 《Transactions of Tianjin University》 EI CAS 2011年第2期79-84,共6页
A high speed column-parallel CDS/ADC circuit with nonlinearity compensation is proposed in this paper.The correlated double sampling (CDS) and analog-to-digital converter (ADC) functions are integrated in a threephase... A high speed column-parallel CDS/ADC circuit with nonlinearity compensation is proposed in this paper.The correlated double sampling (CDS) and analog-to-digital converter (ADC) functions are integrated in a threephase column-parallel circuit based on two floating gate inverters and switched-capacitor network.The conversion rate of traditional single-slope ADC is speeded up by dividing quantization to coarse step and fine step.A storage capacitor is used to store the result of coarse step and locate the section of ramp signal of fine step,which can reduce the clock step from 2 n to 2 (n/2+1).The floating gate inverters are implemented to reduce the power consumption.Its induced nonlinear offset is cancelled by introducing a compensation module to the input of inverter,which can equalize the coupling path in three phases of the proposed circuit.This circuit is designed and simulated for CMOS image sensor with 640×480 pixel array using Chartered 0.18μm process.Simulation results indicate that the resolution can reach 10-bit and the maximum frame rate can reach 200 frames/s with a main clock of 10MHz.The power consumption of this circuit is less than 36.5μW with a 3.3V power supply.The proposed CDS/ADC circuit is suitable for high resolution and high speed image sensors. 展开更多
关键词 CMOS image sensor two-step single-slope ADC nonlinear offset compensation high speed low power consumption
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